USPTO Art Unit 2899 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19047173METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEFebruary 2025April 2025Allow200NoNo
190041333D SEMICONDUCTOR DEVICE AND STRUCTURE INCLUDING POWER DISTRIBUTION GRIDSDecember 2024June 2025Allow500NoNo
18873329METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MEMBERDecember 2024March 2025Allow300NoNo
18967029SYSTEMS AND METHODS FOR COOLING ELECTRONIC CIRCUITSDecember 2024May 2025Allow510NoNo
18954308EMBEDDED COMPONENT INTERPOSER OR SUBSTRATE COMPRISING DISPLACEMENT COMPENSATION TRACES (DCTs) AND METHOD OF MAKING THE SAMENovember 2024May 2025Allow610NoNo
18947649THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE INCLUDING SIMPLIFIED SOURCE/DRAIN CONTACT AREANovember 2024February 2025Allow300NoNo
18928253BOND FORCE CONCENTRATOROctober 2024March 2025Allow410YesNo
18907840HIGH-VOLTAGE SEMICONDUCTOR DEVICE STRUCTURESOctober 2024April 2025Allow610NoNo
18907770LATERALLY-DIFFUSED METAL-OXIDE-SEMICONDUCTOR DEVICES WITH A FIELD PLATEOctober 2024February 2025Allow411NoNo
18886289SEMICONDUCTOR DEVICE INCLUDING INTERCONNECT STRUCTURE WITH PLANARIZATION STOP LAYERSeptember 2024December 2024Allow300NoNo
18883078OPTICALLY FUNCTIONAL MULTILAYER STRUCTURE AND RELATED METHOD OF MANUFACTURESeptember 2024June 2025Allow920YesNo
18882721Power Semiconductor Apparatus and Bonding Method ThereofSeptember 2024February 2025Allow511NoNo
18824948SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOFSeptember 2024March 2025Allow611YesNo
18821747LEAD FRAME AND METHOD FOR STACKING DISCRETE COMPONENTS TO BE EMBEDDED IN SEMICONDUCTOR DEVICEAugust 2024November 2024Allow200NoNo
18841018PURE COPPER MATERIAL, INSULATING SUBSTRATE, AND ELECTRONIC DEVICEAugust 2024February 2025Allow600NoNo
18811589WAFER WARPAGE REGULATION EPOXY FUNCTIONAL FILM, AND PREPARATION METHOD AND APPLICATION THEREOFAugust 2024January 2025Allow500NoNo
18802233IC STRUCTURE WITH MFMIS MEMORY CELL AND CMOS TRANSISTORAugust 2024March 2025Allow710NoNo
18796069Electrostatic Discharge Protection Structure, Semiconductor Power Device and Manufacturing Method ThereofAugust 2024April 2025Allow801NoNo
18793277OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELSAugust 2024January 2025Allow500NoNo
18835123PHOTOCURABLE RESIN COMPOSITION CONTAINING SELF-CROSSLINKABLE POLYMERAugust 2024February 2025Allow700NoNo
18784639FLUID CHANNEL GEOMETRY OPTIMIZATIONS TO IMPROVE COOLING EFFICIENCYJuly 2024April 2025Allow830YesNo
18729437SURFACE RELIEF WAVEGUIDES WITH HIGH REFRACTIVE INDEX RESISTJuly 2024October 2024Allow300NoNo
18771052SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUSJuly 2024May 2025Allow1110NoNo
18766529PROCESS FOR MANUFACTURING AN ELECTROLUMINESCENT DEVICEJuly 2024December 2024Allow510YesNo
18764192ELECTRONIC DEVICEJuly 2024April 2025Allow1010YesNo
18761785ANTI-FLARE SEMICONDUCTOR PACKAGES AND RELATED METHODSJuly 2024May 2025Allow1010NoNo
18761884ARCHITECTURE FOR COMPUTING SYSTEM PACKAGEJuly 2024February 2025Allow700NoNo
18758069HIGH-VOLTAGE SEMICONDUCTOR DEVICE STRUCTURESJune 2024October 2024Allow310NoNo
18756363MEMORY ARRAY CIRCUIT AND METHOD OF MANUFACTURING SAMEJune 2024May 2025Allow1010NoNo
18753873IMAGING DEVICEJune 2024March 2025Allow800NoNo
18751101ELECTRICAL INTERCONNECTS FOR PACKAGES CONTAINING PHOTONIC INTEGRATED CIRCUITSJune 2024February 2025Allow700NoNo
18751086ELECTRICAL INTERCONNECTS FOR PACKAGES CONTAINING PHOTONIC INTEGRATED CIRCUITSJune 2024January 2025Allow700NoNo
18748007METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIERJune 2024March 2025Allow920NoNo
18746717APPARATUS AND METHOD FOR MANUFACTURING METAL GATE STRUCTURESJune 2024May 2025Allow1110NoNo
18743313METHOD OF PRODUCING ASSEMBLY OF STACKED ELEMENTS HAVING RESIN LAYER WITH FILLERSJune 2024June 2025Allow1210YesNo
18739890CLEAVE SYSTEMS HAVING SPRING MEMBERS FOR CLEAVING A SEMICONDUCTOR STRUCTURE AND METHODS FOR CLEAVING SUCH STRUCTURESJune 2024February 2025Allow800YesNo
18739882Heat Dissipation StructuresJune 2024May 2025Allow1110NoNo
18738256PATTERNING INTERCONNECTS AND OTHER STRUCTURES BY PHOTO-SENSITIZING METHODJune 2024April 2025Allow1010NoNo
18736766SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAMEJune 2024March 2025Allow900NoNo
18717235HERRINGBONE MICROSTRUCTURE SURFACE PATTERN FOR FLEXOGRAPHIC PRINTING PLATESJune 2024March 2025Allow910NoNo
18732009METHOD FOR FABRICATING ELECTRONIC PACKAGEJune 2024June 2025Allow1210NoNo
18680896USING SPECTROSCOPIC MEASUREMENTS FOR SUBSTRATE TEMPERATURE MONITORINGMay 2024January 2025Allow700NoNo
18679437MAGNETORESISTIVE RANDOM ACCESS MEMORYMay 2024January 2025Allow710NoNo
18674581MANIFOLD DESIGNS FOR EMBEDDED LIQUID COOLING IN A PACKAGEMay 2024October 2024Allow510NoNo
18674129UNIT PIXEL HAVING LIGHT EMITTING DEVICE, PIXEL MODULE AND DISPLAYING APPARATUSMay 2024December 2024Allow700NoNo
18670779SEMICONDUCTOR STRUCTUREMay 2024March 2025Allow1010NoNo
18670872LASER PROCESSING SYSTEM INTEGRATED WITH MBE DEVICEMay 2024November 2024Allow610NoNo
18670309INTEGRATED CIRCUIT PACKAGES TO MINIMIZE STRESS ON A SEMICONDUCTOR DIEMay 2024June 2025Allow1310NoNo
18670209LED DEVICE AND LIGHT EMITTING APPARATUS INCLUDING THE SAMEMay 2024December 2024Allow700YesNo
18670390Fabric Die to Fabric Die Interconnect for Modularized Integrated Circuit DevicesMay 2024April 2025Allow1110NoNo
18668505DISPLAY DEVICE HAVING A BENDING REGIONMay 2024June 2025Allow1310NoNo
18668941SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUSMay 2024April 2025Allow1110NoNo
18664595METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICEMay 2024April 2025Allow1110NoNo
18661994Laser-Based Processing for Semiconductor WafersMay 2024January 2025Allow911NoNo
18661083MANUFACTURING OPTICALLY ACCESSIBLE CO-PACKAGED OPTICSMay 2024August 2024Allow400NoNo
18709423DISPLAY DEVICEMay 2024May 2025Allow1220NoNo
18659400SEMICONDUCTOR PACKAGE INCLUDING NON-CONDUCTIVE FILM AND METHOD FOR FORMING THE SAMEMay 2024June 2025Allow1310YesNo
18660179WARPAGE-REDUCING SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD OF THE SAMEMay 2024March 2025Allow1010NoNo
18657928METHOD FOR MAKING DMOS DEVICES INCLUDING A SUPERLATTICE AND FIELD PLATE FOR DRIFT REGION DIFFUSIONMay 2024April 2025Allow1120NoNo
18655989REDISTRIBUTION LINES WITH PROTECTION LAYERS AND METHOD FORMING SAMEMay 2024June 2025Allow1300NoNo
18656112LIGHT EMITTING DEVICE PACKAGE AND DISPLAY DEVICE HAVING THE SAMEMay 2024June 2025Allow1300NoNo
18652551APPARATUSES INCLUDING INTERCONNECT STRUCTURES INCLUDING DIELECTRIC MATERIAL SURROUNDED BY CONDUCTIVE MATERIAL, AND RELATED MEMORY DEVICESMay 2024March 2025Allow1110NoNo
18648933SEMICONDUCTOR DEVICEApril 2024March 2025Allow1100NoNo
18649086PHOTORESIST LAYER OUTGASSING PREVENTIONApril 2024April 2025Allow1110NoNo
18643474INTERPOSER, METHOD FOR FABRICATING THE SAME, AND SEMICONDUCTOR PACKAGE HAVING THE SAMEApril 2024April 2025Allow1110YesNo
18642173BUMP STRUCTURE AND METHOD OF MAKING THE SAMEApril 2024June 2025Allow1300NoNo
18640167HYBRID BONDING WITH UNIFORM PATTERN DENSITYApril 2024May 2025Allow1301NoNo
18637959HAFNIUM NITRIDE ADHESION LAYERApril 2024February 2025Allow1011NoNo
18636306SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAMEApril 2024January 2025Allow910NoNo
18635274SEMICONDUCTOR DEVICE STRUCTURE WITH CONDUCTIVE BUMPSApril 2024May 2025Allow1310NoNo
18635347Integrated Circuit with a Fin and Gate Structure and Method Making the SameApril 2024January 2025Allow900NoNo
18634665ELECTRONIC DEVICE PACKAGE AND FABRICATING METHOD THEREOFApril 2024October 2024Allow600NoNo
18634295INTEGRATED CIRCUIT INCLUDING TRANSISTORS AND A METHOD OF MANUFACTURING THE SAMEApril 2024April 2025Allow1210NoNo
18701014SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND DISPLAY DEVICEApril 2024April 2025Allow1220NoNo
18633488SHIELDED INDUCTOR STRUCTURES AND METHODS OF FORMING THE SAMEApril 2024March 2025Allow1111NoNo
18632548SEMICONDUCTOR PACKAGES USING PACKAGE IN PACKAGE SYSTEMS AND RELATED METHODSApril 2024May 2025Allow1310NoNo
18631900SEMICONDUCTOR PACKAGE AND METHOD OF FORMING SAMEApril 2024February 2025Allow1000NoNo
18631966INTEGRATED CIRCUIT PACKAGE AND METHODApril 2024March 2025Allow1100NoNo
18629384Self Aligned Contact SchemeApril 2024March 2025Allow1110NoNo
18629424DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED MULTI-DIE INTERCONNECT BRIDGEApril 2024June 2025Allow1410YesNo
18627896SEMICONDUCTOR CHIP HAVING STEPPED CONDUCTIVE PILLARSApril 2024May 2025Allow1310NoNo
18628347DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAMEApril 2024May 2025Allow1310NoNo
18628111UNDERLAYER FOR PHOTORESIST ADHESION AND DOSE REDUCTIONApril 2024June 2025Allow1410NoNo
18626579SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGEApril 2024June 2025Allow1410YesNo
18626592SEMICONDUCTOR DEVICEApril 2024September 2024Allow610NoNo
18626594SEMICONDUCTOR DEVICEApril 2024June 2024Allow200NoNo
18626475HEAT TREATMENT DEVICE AND TREATMENT METHODApril 2024February 2025Allow1110NoNo
18625061GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP APPROACHApril 2024April 2025Allow1210NoNo
18622977SINGULATION SYSTEMS AND RELATED METHODSMarch 2024March 2025Allow1200YesNo
18622955DISPLAY APPARATUSMarch 2024June 2025Allow1410NoNo
18622153POWER MODULE SEMICONDUCTOR DEVICE AND INVERTER EQUIPMENT, AND FABRICATION METHOD OF THE POWER MODULE SEMICONDUCTOR DEVICE, AND METALLIC MOLDMarch 2024February 2025Allow1020NoNo
18617137DATA PROCESSING SYSTEMS INCLUDING OPTICAL COMMUNICATION MODULESMarch 2024November 2024Allow800NoNo
18615151SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUSMarch 2024June 2025Allow1410NoNo
18614499OLED PANEL LOWER PART PROTECTION FILM, AND ORGANIC LIGHT-EMITTING DISPLAY APPARATUS COMPRISING SAMEMarch 2024December 2024Allow900NoNo
18612193SEMICONDUCTOR PACKAGE INCLUDING A REDISTRIBUTION SUBSTRATE AND A METHOD OF FABRICATING THE SAMEMarch 2024April 2025Allow1310NoNo
18611835SEMICONDUCTOR DEVICEMarch 2024April 2025Allow1310NoNo
18610102DISPLAY DEVICE WITH BLOCK MEMBERSMarch 2024March 2025Allow1220NoNo
18608878SONOS memory cell structure and fabricating method of the sameMarch 2024November 2024Allow700NoNo
18605526NORMAL-INCIDENCE IN-SITU PROCESS MONITOR SENSORMarch 2024November 2024Allow800YesNo
18604752DISPLAY DEVICE AND SEMICONDUCTOR DEVICEMarch 2024October 2024Allow700NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2899.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
89
Examiner Affirmed
52
(58.4%)
Examiner Reversed
37
(41.6%)
Reversal Percentile
82.3%
Higher than average

What This Means

With a 41.6% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
287
Allowed After Appeal Filing
107
(37.3%)
Not Allowed After Appeal Filing
180
(62.7%)
Filing Benefit Percentile
72.9%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 37.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2899 - Prosecution Statistics Summary

Executive Summary

Art Unit 2899 is part of Group 2890 in Technology Center 2800. This art unit has examined 11,729 patent applications in our dataset, with an overall allowance rate of 90.6%. Applications typically reach final disposition in approximately 21 months.

Comparative Analysis

Art Unit 2899's allowance rate of 90.6% places it in the 91% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2899 receive an average of 1.49 office actions before reaching final disposition (in the 24% percentile). The median prosecution time is 21 months (in the 92% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.