Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 19224621 | LARGE-AREA/WAFER-SCALE CMOS-COMPATIBLE 2D-MATERIAL INTERCALATION DOPING TOOLS, PROCESSES, AND METHODS, INCLUDING INTERCALATION DOPING OF SYNTHESIZED AND PATTERNED GRAPHENE | May 2025 | February 2026 | Allow | 9 | 2 | 0 | No | No |
| 19047173 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | February 2025 | April 2025 | Allow | 2 | 0 | 0 | No | No |
| 18887789 | SEMICONDUCTOR DEVICE INCLUDING BACKSIDE CONTACT STRUCTURE FORMED BASED ON WIDE PLACEHOLDER STRUCTURE | September 2024 | February 2026 | Allow | 17 | 4 | 1 | Yes | No |
| 18664595 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE | May 2024 | April 2025 | Allow | 11 | 1 | 0 | No | No |
| 18660179 | WARPAGE-REDUCING SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD OF THE SAME | May 2024 | March 2025 | Allow | 10 | 1 | 0 | No | No |
| 18640167 | HYBRID BONDING WITH UNIFORM PATTERN DENSITY | April 2024 | May 2025 | Allow | 13 | 0 | 1 | No | No |
| 18634295 | INTEGRATED CIRCUIT INCLUDING TRANSISTORS AND A METHOD OF MANUFACTURING THE SAME | April 2024 | April 2025 | Allow | 12 | 1 | 0 | No | No |
| 18625061 | GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP APPROACH | April 2024 | April 2025 | Allow | 12 | 1 | 0 | No | No |
| 18609238 | SYSTEMS AND METHODS FOR DEPOSITING LOW-K DIELECTRIC FILMS | March 2024 | September 2025 | Allow | 18 | 2 | 0 | No | No |
| 18609875 | METHOD FOR FORMING A CRYSTALLINE PROTECTIVE POLYSILICON LAYER | March 2024 | February 2026 | Allow | 23 | 0 | 1 | No | No |
| 18436365 | VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR FOR 3-DIMENSIONAL MEMORY ARRAYS | February 2024 | January 2025 | Allow | 11 | 1 | 0 | No | No |
| 18416585 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE | January 2024 | October 2024 | Allow | 9 | 1 | 0 | No | No |
| 18403523 | FORMATION OF TRANSISTOR GATES | January 2024 | February 2025 | Allow | 14 | 1 | 0 | No | No |
| 18530759 | METHOD FOR FABRICATING LAYER STRUCTURE HAVING TARGET TOPOLOGICAL PROFILE | December 2023 | October 2024 | Allow | 10 | 1 | 0 | No | No |
| 18523637 | NON-PLANAR INTEGRATED CIRCUIT STRUCTURES HAVING MITIGATED SOURCE OR DRAIN ETCH FROM REPLACEMENT GATE PROCESS | November 2023 | January 2025 | Allow | 14 | 1 | 0 | No | No |
| 18513545 | METHODS FOR WAFER BONDING | November 2023 | October 2024 | Allow | 11 | 1 | 0 | No | No |
| 18502110 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR DEVICE | November 2023 | January 2025 | Allow | 14 | 1 | 0 | No | No |
| 18384455 | INTEGRATED ASSEMBLIES AND METHODS OF FORMING INTEGRATED ASSEMBLIES | October 2023 | December 2024 | Allow | 13 | 1 | 0 | No | No |
| 18378688 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | October 2023 | September 2024 | Allow | 11 | 0 | 0 | No | No |
| 18474730 | WIRING SUBSTRATE, WIRING STRUCTURE USING WIRING SUBSTRATE, ELECTRONIC COMPONENT MOUNTING PACKAGE, AND ELECTRONIC MODULE | September 2023 | November 2025 | Allow | 26 | 0 | 0 | No | No |
| 18472261 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | September 2023 | November 2024 | Allow | 14 | 1 | 0 | No | No |
| 18370198 | CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION | September 2023 | November 2024 | Allow | 14 | 1 | 0 | No | No |
| 18447685 | PARTIAL METAL GRAIN SIZE CONTROL TO IMPROVE CMP LOADING EFFECT | August 2023 | March 2025 | Allow | 19 | 0 | 1 | Yes | No |
| 18232289 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE | August 2023 | January 2025 | Allow | 17 | 1 | 0 | No | No |
| 18366460 | REDUCING K VALUES OF DIELECTRIC FILMS THROUGH ANNEAL | August 2023 | May 2025 | Allow | 21 | 2 | 0 | No | No |
| 18230712 | SURFACE OXIDATION CONTROL OF METAL GATES USING CAPPING LAYER | August 2023 | January 2025 | Allow | 17 | 1 | 0 | No | No |
| 18230052 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | August 2023 | September 2024 | Allow | 14 | 1 | 0 | No | No |
| 18364574 | SELF-ALIGNED CONTACT STRUCTURES | August 2023 | October 2025 | Allow | 27 | 3 | 0 | No | No |
| 18362187 | MULTI-STAGE ETCHING PROCESS FOR CONTACT FORMATION IN A SEMICONDUCTOR DEVICE | July 2023 | December 2025 | Allow | 29 | 1 | 0 | No | No |
| 18357163 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | July 2023 | November 2025 | Allow | 28 | 3 | 1 | Yes | No |
| 18223923 | SPOT HEATING BY MOVING A BEAM WITH HORIZONTAL ROTARY MOTION | July 2023 | November 2024 | Allow | 16 | 1 | 1 | No | No |
| 18216468 | SPIN ON CARBON COMPOSITION AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE | June 2023 | July 2024 | Allow | 13 | 1 | 0 | No | No |
| 18201474 | METHOD FOR REDUCING CONTACT RESISTANCE | May 2023 | August 2025 | Allow | 27 | 0 | 0 | No | No |
| 18197833 | SYSTEMS AND METHODS FOR THE USE OF FRAUD PREVENTION FLUID TO PREVENT CHIP FRAUD | May 2023 | May 2024 | Allow | 12 | 1 | 1 | Yes | No |
| 18311016 | Semiconductor Device and Method | May 2023 | May 2025 | Allow | 24 | 1 | 1 | No | No |
| 18304367 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | April 2023 | December 2025 | Allow | 32 | 0 | 1 | No | No |
| 18302434 | Low-k Feature Formation Processes and Structures Formed Thereby | April 2023 | November 2024 | Allow | 19 | 2 | 0 | No | No |
| 18123596 | Void Elimination for Gap-Filling In High-Aspect Ratio Trenches | March 2023 | May 2024 | Allow | 14 | 1 | 0 | No | No |
| 18186567 | Profile Control In Forming Epitaxy Regions for Transistors | March 2023 | June 2024 | Allow | 15 | 1 | 0 | No | No |
| 18178140 | Dummy Fin Profile Control to Enlarge Gate Process Window | March 2023 | June 2024 | Allow | 15 | 1 | 0 | No | No |
| 18177324 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR | March 2023 | February 2026 | Allow | 36 | 1 | 1 | No | No |
| 18173818 | LARGE DIMENSION METAL GATE FIELD-EFFECT TRANSISTOR (FET) WITH METAL GATE DUMMY STRUCTURES | February 2023 | February 2026 | Allow | 36 | 1 | 1 | Yes | No |
| 18173981 | Process Method for Improving Reliability of Metal Gate High-Voltage Device | February 2023 | August 2025 | Allow | 30 | 0 | 0 | No | No |
| 18171678 | SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME | February 2023 | October 2025 | Allow | 31 | 0 | 1 | No | No |
| 18170387 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | February 2023 | October 2025 | Allow | 32 | 0 | 1 | Yes | No |
| 18108526 | ARSENIC-DOPED EPITAXIAL SOURCE/DRAIN REGIONS FOR NMOS | February 2023 | May 2024 | Allow | 15 | 1 | 0 | No | No |
| 18165007 | Gate Formation Of Semiconductor Devices | February 2023 | September 2024 | Allow | 19 | 1 | 1 | No | No |
| 18156470 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME | January 2023 | August 2025 | Allow | 31 | 0 | 1 | No | No |
| 18092219 | METHODS FOR FORMING A TOPOGRAPHICALLY SELECTIVE SILICON OXIDE FILM BY A CYCLICAL PLASMA-ENHANCED DEPOSITION PROCESS | December 2022 | June 2024 | Allow | 17 | 1 | 0 | No | No |
| 18070748 | FORMING A PARTIALLY SILICIDED ELEMENT | November 2022 | January 2026 | Allow | 37 | 1 | 1 | No | No |
| 17991380 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | November 2022 | March 2024 | Allow | 15 | 1 | 0 | No | No |
| 17922506 | METHOD FOR FORMING THERMAL OXIDE FILM ON SEMICONDUCTOR SUBSTRATE | October 2022 | August 2025 | Allow | 33 | 0 | 1 | No | No |
| 17961617 | MANUFACTURING METHOD FOR LIQUID CRYSTAL DISPLAY DEVICE | October 2022 | March 2024 | Allow | 17 | 1 | 0 | No | No |
| 17951589 | LDMOS DEVICE AND METHOD FOR FABRICATING THE SAME | September 2022 | April 2025 | Allow | 30 | 0 | 1 | No | No |
| 17901642 | METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE | September 2022 | July 2025 | Allow | 34 | 0 | 1 | No | No |
| 17896734 | SYSTEMS AND METHODS FOR DEPOSITING LOW-K DIELECTRIC FILMS | August 2022 | August 2025 | Allow | 36 | 1 | 0 | No | No |
| 17894575 | INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE AND RELATED METHODS | August 2022 | November 2025 | Allow | 38 | 1 | 1 | Yes | No |
| 17893209 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF | August 2022 | May 2025 | Allow | 33 | 0 | 1 | No | No |
| 17893796 | Method of Forming 3-Dimensional Spacer | August 2022 | June 2025 | Allow | 33 | 0 | 1 | No | No |
| 17888649 | INTEGRATED CIRCUIT INCLUDING TRANSISTORS AND A METHOD OF MANUFACTURING THE SAME | August 2022 | December 2023 | Allow | 16 | 1 | 0 | No | No |
| 17819770 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | August 2022 | October 2025 | Allow | 38 | 1 | 1 | No | No |
| 17819660 | METHOD OF PROCESSING WAFER | August 2022 | February 2025 | Allow | 30 | 0 | 0 | Yes | No |
| 17888314 | STAIRCASE ETCH CONTROL IN FORMING THREE-DIMENSIONAL MEMORY DEVICE | August 2022 | June 2024 | Allow | 22 | 2 | 0 | Yes | No |
| 17818571 | FIN HEIGHT AND STI DEPTH FOR PERFORMANCE IMPROVEMENT IN SEMICONDUCTOR DEVICES HAVING HIGH-MOBILITY P-CHANNEL TRANSISTORS | August 2022 | October 2025 | Allow | 39 | 2 | 1 | Yes | No |
| 17878622 | SUBSTRATE PROCESSING SYSTEM AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME | August 2022 | December 2025 | Allow | 40 | 2 | 1 | Yes | No |
| 17878201 | CAPACITOR STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME | August 2022 | July 2025 | Allow | 36 | 1 | 1 | No | No |
| 17876487 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | July 2022 | August 2024 | Allow | 25 | 1 | 1 | No | No |
| 17815915 | ISOLATION REGIONS WITHIN A MEMORY DIE | July 2022 | January 2026 | Allow | 41 | 2 | 1 | No | No |
| 17868786 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | July 2022 | June 2025 | Allow | 35 | 2 | 0 | No | No |
| 17867835 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE | July 2022 | June 2025 | Allow | 35 | 1 | 1 | No | No |
| 17868294 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | July 2022 | July 2025 | Allow | 36 | 1 | 0 | No | No |
| 17854852 | SHALLOW TRENCH ISOLATION STRUCTURE WITH NITRIDE PULLBACK BY IMPLANTATION TREATMENT | June 2022 | August 2025 | Allow | 38 | 0 | 1 | No | No |
| 17787604 | DISPLAY SUBSTRATE, PREPARATION METHOD THEREFOR, AND DISPLAY APPARATUS | June 2022 | June 2025 | Allow | 35 | 1 | 0 | No | No |
| 17841479 | CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION | June 2022 | June 2023 | Allow | 12 | 0 | 0 | No | No |
| 17805557 | Fan-Out Interconnect Structure and Methods Forming the Same | June 2022 | March 2024 | Allow | 21 | 2 | 0 | No | No |
| 17832675 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | June 2022 | May 2024 | Allow | 23 | 2 | 1 | Yes | No |
| 17827648 | METAL-INSULATOR-METAL (MIM) CAPACITOR MODULE WITH OUTER ELECTRODE EXTENSION | May 2022 | January 2025 | Allow | 32 | 0 | 1 | No | No |
| 17825798 | Gate Structure Fabrication Techniques for Reducing Gate Structure Warpage | May 2022 | June 2025 | Allow | 37 | 2 | 0 | No | No |
| 17751406 | SEMICONDUCTOR APPARATUS AND DEVICE | May 2022 | March 2025 | Allow | 34 | 1 | 0 | No | No |
| 17778274 | LIGHT EMITTING DIODE DISPLAY DEVICE AND METHOD OF FABRICATING LIGHT EMITTING DIODE DISPLAY DEVICE | May 2022 | September 2024 | Allow | 28 | 0 | 0 | No | No |
| 17746263 | MANUFACTURING METHOD OF DISPLAY DEVICE AND HOLDING SUBSTRATE | May 2022 | May 2025 | Allow | 36 | 2 | 0 | No | No |
| 17745612 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME | May 2022 | December 2024 | Allow | 31 | 0 | 1 | No | No |
| 17776127 | uLED CHIP, uLED SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, EL INSPECTION METHOD FOR uLED SUBSTRATE, AND EL INSPECTION APPARATUS | May 2022 | September 2024 | Allow | 29 | 0 | 0 | Yes | No |
| 17775772 | Composite Wavelength Converter | May 2022 | April 2025 | Allow | 35 | 1 | 1 | No | No |
| 17735832 | DISPLAY DEVICE | May 2022 | February 2026 | Allow | 46 | 3 | 1 | Yes | No |
| 17770253 | DISPLAY PANEL, MANUFACTURING METHOD AND DISPLAY DEVICE | April 2022 | February 2025 | Allow | 34 | 1 | 0 | No | No |
| 17696277 | SUBSTRATE POLISHING APPARATUS, SUBSTRATE POLISHING METHOD USING THE SAME, AND SEMICONDUCTOR FABRICATION METHOD INCLUDING THE SAME | March 2022 | May 2025 | Allow | 38 | 1 | 1 | No | No |
| 17688103 | SEMICONDUCTOR MANUFACTURING DEVICE AND METHOD OF USING THE SAME | March 2022 | February 2025 | Allow | 35 | 0 | 1 | No | No |
| 17682234 | AIR-REPLACED SPACER FOR SELF-ALIGNED CONTACT SCHEME | February 2022 | March 2024 | Allow | 24 | 1 | 1 | No | No |
| 17651881 | Hybrid Bonding with Uniform Pattern Density | February 2022 | January 2024 | Allow | 23 | 2 | 1 | No | No |
| 17636113 | THIN-FILM COMPONENTS FOR INTEGRATED CIRCUITS | February 2022 | June 2025 | Allow | 40 | 2 | 0 | No | No |
| 17674297 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF PROCESSING SUBSTRATE, RECORDING MEDIUM, AND SUBSTRATE PROCESSING APPARATUS | February 2022 | February 2026 | Allow | 48 | 2 | 1 | No | No |
| 17648420 | METHOD OF FORMING OXIDE LAYER AND SEMICONDUCTOR STRUCTURE | January 2022 | October 2024 | Abandon | 33 | 1 | 0 | No | No |
| 17644135 | WAFER BONDING METHOD AND BONDED WAFER | December 2021 | April 2025 | Allow | 40 | 0 | 1 | No | No |
| 17531245 | METHOD FOR MAKING HIGH-VOLTAGE THICK GATE OXIDE | November 2021 | December 2023 | Allow | 25 | 1 | 0 | No | No |
| 17455246 | IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME | November 2021 | October 2024 | Allow | 35 | 1 | 1 | Yes | No |
| 17442141 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | September 2021 | March 2025 | Allow | 41 | 1 | 1 | No | No |
| 17480055 | DISPLAY SUBSTRATE AND DISPLAY APPARATUS | September 2021 | October 2024 | Allow | 37 | 1 | 0 | No | No |
| 17480075 | PIXEL ARRANGEMENT STRUCTURE AND DISPLAY PANEL | September 2021 | June 2024 | Allow | 33 | 1 | 0 | No | No |
| 17475646 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ETCHING METHOD | September 2021 | August 2024 | Abandon | 35 | 2 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner STEVENSON, ANDRE C.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 63.6% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
Examiner STEVENSON, ANDRE C works in Art Unit 2899 and has examined 208 patent applications in our dataset. With an allowance rate of 98.6%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 22 months.
Examiner STEVENSON, ANDRE C's allowance rate of 98.6% places them in the 92% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.
On average, applications examined by STEVENSON, ANDRE C receive 1.39 office actions before reaching final disposition. This places the examiner in the 21% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.
The median time to disposition (half-life) for applications examined by STEVENSON, ANDRE C is 22 months. This places the examiner in the 89% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.
Conducting an examiner interview provides a -1.5% benefit to allowance rate for applications examined by STEVENSON, ANDRE C. This interview benefit is in the 9% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 31.0% of applications are subsequently allowed. This success rate is in the 63% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 60.9% of cases where such amendments are filed. This entry rate is in the 86% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.
When applicants request a pre-appeal conference (PAC) with this examiner, 66.7% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 56% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.
This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 96% percentile among all examiners. Of these withdrawals, 44.4% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.
When applicants file petitions regarding this examiner's actions, 28.6% are granted (fully or in part). This grant rate is in the 16% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 2.4% of allowed cases (in the 77% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 2.9% of allowed cases (in the 73% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.