USPTO Examiner CLINTON EVAN GARRETT - Art Unit 2899

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18909899MANUFACTURING METHOD OF SEMICONDUCTOR SUBSTRATEOctober 2024September 2025Abandon1120NoNo
18907840HIGH-VOLTAGE SEMICONDUCTOR DEVICE STRUCTURESOctober 2024April 2025Allow610NoNo
18882721Power Semiconductor Apparatus and Bonding Method ThereofSeptember 2024February 2025Allow511NoNo
18824948SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOFSeptember 2024March 2025Allow611YesNo
18820847SEMICONDUCTOR DEVICE INCLUDING METAL LINES HAVING MULTI-LAYER STRUCTUREAugust 2024March 2026Allow1951YesNo
18773873LIGHT-EMITTING DEVICEJuly 2024October 2025Allow1500NoNo
18769153PACKAGE STRUCTUREJuly 2024March 2026Allow2010NoNo
18748007METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIERJune 2024March 2025Allow920NoNo
18742278INTERPOSER INCLUDING A COPPER EDGE SEAL RING STRUCTURE AND METHODS OF FORMING THE SAMEJune 2024January 2026Allow1910NoNo
18676343PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOFMay 2024February 2026Allow2110NoNo
18661994Laser-Based Processing for Semiconductor WafersMay 2024January 2025Allow911NoNo
18648069METHODS OF REDUCING CAPACITANCE IN FIELD-EFFECT TRANSISTORSApril 2024January 2026Allow2110NoNo
18645381PACKAGE SUBSTRATEApril 2024January 2026Allow2110NoNo
18642173BUMP STRUCTURE AND METHOD OF MAKING THE SAMEApril 2024June 2025Allow1300NoNo
18640838ELECTRONIC PACKAGE AND FABRICATING METHOD THEREOFApril 2024October 2025Allow1820NoNo
18635315CHIPLET INTERPOSERApril 2024October 2025Allow1810NoNo
18605947Packaged Semiconductor Device Including Liquid-Cooled Lid and Methods of Forming the SameMarch 2024February 2026Allow2330NoNo
18597222SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTUREMarch 2024July 2025Allow1620NoNo
18590965LAMINATION PROCESS, AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE USING A CHUCKFebruary 2024July 2025Allow1710NoNo
18432092SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOFFebruary 2024August 2024Allow710NoNo
18393265LIGHT IRRADIATION TYPE HEAT TREATMENT METHOD AND HEAT TREATMENT APPARATUSDecember 2023February 2025Allow1410NoNo
18392368EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKINGDecember 2023August 2025Abandon2020YesNo
185438193DIC WITH HEAT DISSIPATION STRUCTURE AND WARPAGE CONTROLDecember 2023February 2025Allow1411NoNo
18538458SEMICONDUCTOR PACKAGEDecember 2023May 2025Allow1710NoNo
18530626METHOD OF FORMING SEMICONDUCTOR STRUCTUREDecember 2023March 2026Allow2700NoNo
18520971PACKAGE STRUCTURENovember 2023June 2025Allow1910NoNo
18521284HETEROGENEOUS BONDING STRUCTURE AND METHOD FORMING SAMENovember 2023August 2025Allow2020NoNo
18519290SYSTEMS AND METHODS FOR HOMOGENOUS INTERMIXING OF PRECURSORS IN ALLOY ATOMIC LAYER DEPOSITIONNovember 2023February 2025Allow1510NoNo
18517489Stacking Via Structures for Stress ReductionNovember 2023October 2025Allow2320NoNo
18510646PACKAGE STRUCTURENovember 2023August 2025Allow2120NoNo
18508173MANUFACTURING METHOD OF INTEGRATED SUBSTRATE STRUCTURENovember 2023January 2025Allow1410NoNo
18380981CYCLICAL DEPOSITION METHOD AND APPARATUS FOR FILLING A RECESS FORMED WITHIN A SUBSTRATE SURFACEOctober 2023January 2025Allow1510NoNo
18376652ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFOctober 2023January 2025Allow1610NoNo
18367039METHOD OF FABRICATING A SEMICONDUCTOR PACKAGESeptember 2023February 2025Allow1710YesNo
18235255CUTTING DISPLAY PANELAugust 2023January 2026Allow2900NoNo
18366908High Aspect Ratio Gate Structure FormationAugust 2023December 2025Allow2830NoNo
18446229Semiconductor Package and Method of Forming SameAugust 2023January 2026Allow2940NoNo
18446291Semiconductor Devices and Methods of ManufacturingAugust 2023March 2025Allow1910NoNo
18365206ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEAugust 2023August 2024Allow1320NoNo
18363750LAMINATION PROCESS, AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE USING A CHUCKAugust 2023May 2025Allow2220YesNo
18360066INTEGRATED CHIP WITH INTER-WIRE CAVITIESJuly 2023June 2024Allow1110NoNo
18358038METHOD OF FABRICATING PACKAGEJuly 2023September 2024Allow1400NoNo
18357184PACKAGE STRUCTURE AND METHODS OF MANUFACTURING THE SAMEJuly 2023October 2024Allow1520YesNo
18357385SEMICONDUCTOR DEVICEJuly 2023March 2026Allow3210NoNo
18356839MULTI-COMPONENT MODULES (MCMs) INCLUDING CONFIGURABLE ELECTROMAGNETIC ISOLATION (EMI) SHIELD STRUCTURES AND RELATED METHODSJuly 2023June 2024Allow1110NoNo
18223525DEVICE PACKAGEJuly 2023June 2024Allow1110NoNo
18344039CHIP PACKAGE STRUCTUREJune 2023June 2024Allow1110NoNo
18336303SEMICONDUCTOR PACKAGE WITH RIVETING STRUCTURE BETWEEN TWO RINGS AND METHOD FOR FORMING THE SAMEJune 2023November 2024Allow1721NoNo
18336258PACKAGE STRUCTUREJune 2023October 2024Allow1611NoNo
18321659METHODS OF FORMING MICROELECTRONIC DEVICESMay 2023June 2024Allow1310NoNo
18196513SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICESMay 2023August 2024Allow1520NoNo
18317048ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEMay 2023September 2024Allow1620NoNo
18143983SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAMEMay 2023September 2024Allow1620YesNo
18307277SEMICONDUCTOR PACKAGEApril 2023June 2024Allow1410YesNo
18305913Thermally Enhanced FCBGA PackageApril 2023June 2024Allow1430NoNo
18301420SEMICONDUCTOR PACKAGEApril 2023April 2024Allow1210YesNo
18109392SEMICONDUCTOR PACKAGEFebruary 2023January 2026Allow3510NoNo
18168319DIE EMBEDDED IN SUBSTRATE WITH STRESS BUFFERFebruary 2023May 2024Allow1520YesNo
18166450INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOFFebruary 2023February 2026Allow3711YesNo
18164554SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFFebruary 2023August 2024Allow1920NoNo
18163033HIGH DENSITY INTERCONNECTION USING FANOUT INTERPOSER CHIPLETFebruary 2023January 2025Allow2330YesNo
18155705PACKAGE STRUCTURE INCLUDING IPD AND METHOD OF FORMING THE SAMEJanuary 2023July 2024Allow1820YesNo
18089458METHOD AND SYSTEM FOR MANUFACTURING A SEMICONDUCTOR PACKAGE STRUCTUREDecember 2022August 2024Allow2020NoNo
18086185SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICESDecember 2022November 2025Allow3501NoNo
18077149PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOFDecember 2022January 2026Allow3811NoNo
18062445DOUBLE-SIDED MULTICHIP PACKAGESDecember 2022November 2025Allow3510NoNo
18062166MULTICHIP PACKAGES WITH 3D INTEGRATIONDecember 2022February 2026Allow3821NoNo
18070552POWER SEMICONDUCTOR MODULE, METHOD FOR ASSEMBLING A POWER SEMICONDUCTOR MODULE AND HOUSING FOR A POWER SEMICONDUCTOR MODULENovember 2022August 2025Allow3201NoNo
18070825INTEGRATED CIRCUIT PACKAGE, ELECTRONIC DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOFNovember 2022January 2026Allow4811NoNo
17994880SEMICONDUCTOR PACKAGENovember 2022July 2025Allow3210NoNo
18058991Microelectronic Package RDL Patterns to Reduce Stress in RDLs Across ComponentsNovember 2022July 2025Allow3110NoNo
18058436SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICENovember 2022June 2025Allow3101NoNo
17973690SEMICONDUCTOR DEVICE PACKAGESOctober 2022July 2025Allow3310YesNo
17959314ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOFOctober 2022December 2025Allow3821NoNo
17821272FLEXIBLE INTERPOSER FOR SEMICONDUCTOR DIESAugust 2022July 2025Allow3510YesNo
17892137SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFAugust 2022December 2025Allow3921NoNo
17891449METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, METHOD OF PROCESSING SUBSTRATE, AND RECORDING MEDIUMAugust 2022June 2024Allow2210NoNo
17886997DISPLAY DEVICEAugust 2022October 2025Allow3820NoNo
17886097INSULATED GATE BIPOLAR TRANSISTOR AND DIODEAugust 2022March 2025Abandon3130NoNo
17814527PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOFJuly 2022October 2025Allow3911NoNo
17871375INTERPOSER INCLUDING STEPPED SURFACES AND METHODS OF FORMING THE SAMEJuly 2022May 2025Allow3411YesNo
17870931METHODS FOR FORMING A METALLIC FILM ON A SUBSTRATE BY CYCLICAL DEPOSITION AND RELATED SEMICONDUCTOR DEVICE STRUCTURESJuly 2022July 2024Allow2420NoNo
17813873Semiconductor Devices and Methods of ManufacturingJuly 2022August 2024Allow2541NoNo
17865305BUMP STRUCTURE AND METHOD OF MAKING THE SAMEJuly 2022January 2024Allow1810NoNo
17859411SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEJuly 2022March 2025Allow3310NoNo
17790706DISPLAY DEVICEJuly 2022June 2025Allow3510NoNo
17855040SUBSTRATE HAVING ONE OR MORE ELECTRICAL INTERCONNECTSJune 2022February 2026Allow4311NoNo
17850393Methods Of Reducing Capacitance In Field-Effect TransistorsJune 2022March 2024Allow2130YesNo
17841007Packaged Semiconductor Device Including Liquid-Cooled Lid and Methods of Forming the SameJune 2022December 2023Allow1820NoNo
17824709METHOD OF MANUFACTURING DISPLAY PANELMay 2022August 2025Allow3920NoNo
17737966Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die Connectivity over package substratesMay 2022June 2025Allow3711NoNo
17707183GLASS CORE SUBSTRATE PRINTED CIRCUIT BOARD FOR WARPAGE REDUCTIONMarch 2022August 2025Allow4010NoNo
17692750SEMICONDUCTOR DEVICE INCLUDING EPITAXIAL ELECTRODE LAYER AND DIELECTRIC EPITAXIAL STRUCTURE AND METHOD OF MANUFACTURING THE SAMEMarch 2022February 2025Allow3510NoNo
17691403EMBEDDED PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOFMarch 2022July 2025Allow4011NoNo
17669914SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAMEFebruary 2022March 2025Allow3720NoNo
17630194ELECTRONIC ELEMENT MOUNTING SUBSTRATE, ELECTRONIC DEVICE, ELECTRONIC MODULE, AND METHOD FOR MANUFACTURING ELECTRONIC ELEMENT MOUNTING SUBSTRATEJanuary 2022December 2024Allow3410NoNo
17579252INTERCONNECTION ARRAY DEVICE WITH SUPPORTJanuary 2022May 2025Allow4021YesNo
17577687PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT PACKAGE INCLUDING THE SAMEJanuary 2022October 2024Allow3310NoNo
17574245METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING METHOD, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUMJanuary 2022February 2025Allow3720NoNo
17568913ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFJanuary 2022September 2024Allow3221NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner CLINTON, EVAN GARRETT.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
1
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
14.6%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
1
(100.0%)
Filing Benefit Percentile
7.7%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner CLINTON, EVAN GARRETT - Prosecution Strategy Guide

Executive Summary

Examiner CLINTON, EVAN GARRETT works in Art Unit 2899 and has examined 83 patent applications in our dataset. With an allowance rate of 90.4%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 32 months.

Allowance Patterns

Examiner CLINTON, EVAN GARRETT's allowance rate of 90.4% places them in the 74% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by CLINTON, EVAN GARRETT receive 1.86 office actions before reaching final disposition. This places the examiner in the 43% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by CLINTON, EVAN GARRETT is 32 months. This places the examiner in the 52% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +11.1% benefit to allowance rate for applications examined by CLINTON, EVAN GARRETT. This interview benefit is in the 45% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 30.3% of applications are subsequently allowed. This success rate is in the 60% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 53.3% of cases where such amendments are filed. This entry rate is in the 79% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 19% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 100.0% are granted (fully or in part). This grant rate is in the 92% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 34% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.