USPTO Art Unit 2898 Prosecution Statistics

Art Unit Information

Art Unit: 2898
Group: 2890
Tech Center: 2800
Total Cases: 14,703
Last Active: June 2025

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19253263RELAXED WURTZITE INGAN LAYERSJune 2025November 2025Allow410NoNo
19199129CRASH MITIGATION IN ACTIVE MEMS COOLING SYSTEMSMay 2025October 2025Allow602NoNo
19180420METHOD OF PREPARING A STRUCTURED SUBSTRATE FOR DIRECT BONDINGApril 2025November 2025Allow701NoNo
18976344CHIP COOLING PLATFORM BASED ON MICRO-NANO STRUCTUREDecember 2024January 2025Allow200NoNo
18960184Embedded Digital Sensor StructureNovember 2024May 2025Allow511YesNo
18957152METAL OXIDE SEMICONDUCTOR-BASED LIGHT EMITTING DEVICENovember 2024July 2025Allow811YesNo
18855536BONDING WIREOctober 2024March 2025Allow500NoNo
18855293VERTICAL FIELD EFFECT DEVICE AND METHOD OF MANUFACTURINGOctober 2024February 2025Allow400YesNo
18896610METHOD FOR THE PRODUCTION OF IMPROVED SIC-SUBSTRATES AND SIC-EPILAYERSSeptember 2024September 2025Allow1121NoNo
18889464SEMICONDUCTOR DEVICE INCLUDING OVERLAPPING ELECTRODESSeptember 2024June 2025Allow920YesNo
18888284Device Structure for Inducing Layout Dependent Threshold Voltage ShiftSeptember 2024March 2025Allow600NoNo
18796736DISPLAY DEVICEAugust 2024January 2026Allow1800NoNo
18790739SEMICONDUCTOR DEVICEJuly 2024September 2024Allow200NoNo
18780607SEMICONDUCTOR DEVICE INCLUDING END INSULATING LAYERJuly 2024August 2025Allow1330YesNo
18779427METAL-INSULATOR-METAL DEVICE WITH IMPROVED PERFORMANCEJuly 2024September 2025Allow1410NoNo
18727080Array Substrate and Liquid Crystal Display PanelJuly 2024August 2025Allow1420NoNo
18760442SEMICONDUCTOR STORAGE DEVICE WITH OVERLAPPING CONTACTS AND SURROUNDING INSULATING LAYERJuly 2024October 2025Allow1510NoNo
18760980SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEMJuly 2024March 2025Allow900NoNo
18757573MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE INCLUDING GATE OXIDE LAYERJune 2024April 2025Allow1000NoNo
18758239METHOD FOR TRANSPORTING WAFERSJune 2024March 2026Allow2110NoNo
18756235METHOD AND STRUCTURES PERTAINING TO IMPROVED FERROELECTRIC RANDOM-ACCESS MEMORY (FeRAM)June 2024January 2026Allow1811NoNo
18757483METHOD OF FORMING MEMORY DEVICEJune 2024August 2025Allow1401NoNo
18755727HIGH ELECTRON MOBILITY TRANSISTOR STRUCTURE AND METHOD OF FABRICATING THE SAMEJune 2024June 2025Allow1200NoNo
18757386INTERFACIAL DUAL PASSIVATION LAYER FOR A FERROELECTRIC DEVICE AND METHODS OF FORMING THE SAMEJune 2024January 2026Allow1800NoNo
18751695SEMICONDUCTOR DEVICE STRUCTURE WITH MOVABLE MEMBRANEJune 2024September 2025Allow1510YesNo
18739152HETEROGENEOUS INTEGRATION OF COMPONENTS ONTO COMPACT DEVICES USING MOIRÉ BASED METROLOGY AND VACUUM BASED PICK-AND-PLACEJune 2024January 2025Allow700NoNo
18738787PARKING SPACE DETECTION METHOD AND SYSTEMJune 2024April 2025Allow1010NoNo
18736560HIGH VOLTAGE SEMICONDUCTOR DEVICE INCLUDING BURIED OXIDE LAYERJune 2024April 2025Allow1110NoNo
18735187PACKAGE AND MANUFACTURING METHOD THEREOFJune 2024June 2025Allow1301NoNo
18732879SEMICONDUCTOR DEVICE AND METHODJune 2024January 2025Allow700NoNo
18732121SYSTEM AND METHOD FOR RAILROAD TIE MANAGEMENTJune 2024January 2025Allow700NoNo
18731895IMAGE SENSORJune 2024May 2025Allow1111NoNo
18679722DISPLAY APPARATUS AND METHOD OF FABRICATING DISPLAY APPARATUSMay 2024September 2025Allow1610YesNo
18679537PIEZOELECTRIC BIOSENSOR AND RELATED METHOD OF FORMATIONMay 2024March 2025Allow1010NoNo
18677913SEMICONDUCTOR STRUCTUREMay 2024July 2025Allow1411NoNo
18677991METHOD OF MANUFACTURING A TRENCH CAPACITOR WITH WAFER BOWMay 2024January 2025Allow800NoNo
18677952FERROELECTRIC MEMORY DEVICE AND METHOD OF FORMING THE SAMEMay 2024February 2026Allow2110YesNo
18677474STRUCTURE AND METHOD TO IMPROVE FAV RIE PROCESS MARGIN AND ELECTROMIGRATIONMay 2024January 2026Allow2000NoNo
18676539MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICEMay 2024June 2025Allow1320NoNo
18675249SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAMEMay 2024February 2026Allow2010NoNo
18674953SEMICONDUCTOR STRUCTUREMay 2024July 2025Allow1310NoNo
18673411DISPLAY DEVICEMay 2024April 2025Allow1110YesNo
18672104METHOD FOR METAL GATE CUT AND STRUCTURE THEREOFMay 2024February 2025Allow900NoNo
18671947MEMORY DEVICE AND FORMATION METHOD THEREOFMay 2024March 2025Allow900NoNo
18671580Air Gap Seal for Interconnect Air Gap and Method of Fabricating ThereofMay 2024January 2026Allow2011NoNo
18670140SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFMay 2024March 2025Allow1001NoNo
18668432METHOD FOR PREPARING SEMICONDUCTOR DEVICE STRUCTURE HAVING FEATURES OF DIFFERENT DEPTHSMay 2024May 2025Allow1210NoNo
18669156RADIO FREQUENCY (RF) SEMICONDUCTOR DEVICES INCLUDING A GROUND PLANE LAYER HAVING A SUPERLATTICEMay 2024May 2025Allow1210YesNo
18668816INTEGRATED CIRCUIT STRUCTUREMay 2024December 2025Allow1811NoNo
18666835SEMICONDUCTOR DEVICEMay 2024March 2025Allow1010NoNo
18667347TWO-ROTATION GATE-EDGE DIODE LEAKAGE REDUCTION FOR MOS TRANSISTORSMay 2024April 2025Allow1100NoNo
18663715DISPLAY DEVICEMay 2024March 2025Allow1010YesNo
18661700METHOD OF FABRICATING PACKAGE STRUCTUREMay 2024October 2025Allow1710NoNo
18660550INTEGRATED CIRCUIT SEMICONDUCTOR DEVICEMay 2024December 2024Allow710NoNo
18657927Forming 3D Transistors Using 2D Van Der WAALS MaterialsMay 2024February 2026Allow2111NoNo
18658201Three-dimensional Heterogeneous Integrated Millimeter-wave System Package StructureMay 2024December 2025Abandon2021NoNo
18657243SELF-ALIGNED INTERCONNECT WITH PROTECTION LAYERMay 2024January 2026Allow2111NoNo
18657752SEMICONDUCTOR DEVICE WITH SOURCE/DRAIN EPITAXIAL LAYERMay 2024January 2026Allow2110NoNo
18655341MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEMay 2024March 2025Allow1010NoNo
18656134SEMICONDUCTOR DEVICESMay 2024March 2025Allow1110NoNo
18655356METHOD FOR FORMING SEMICONDUCTOR STRUCTUREMay 2024February 2026Allow2120NoNo
18654658STRUCTURE AND METHOD FOR FORMING INTEGRATED HIGH DENSITY MIM CAPACITORMay 2024December 2024Allow800NoNo
18653243DBI TO SI BONDING FOR SIMPLIFIED HANDLE WAFERMay 2024January 2025Allow800NoNo
18652013SEMICONDUCTOR POWER DEVICE AND METHOD FOR PRODUCING SAMEMay 2024July 2025Allow1420NoNo
18652094Semiconductor Component Including an Electronic Component Based on Polycrystalline SiliconMay 2024July 2025Allow1520NoNo
18649366MICROELECTRONIC DEVICES WITH SOURCE REGION VERTICAL EXTENSION BETWEEN UPPER AND LOWER CHANNEL REGIONS, AND RELATED METHODSApril 2024July 2025Allow1410YesNo
18648515INTERCONNECT STRUCTUREApril 2024September 2025Allow1721YesNo
18648971BONDED SEMICONDUCTOR DEVICES HAVING PROCESSOR AND DYNAMIC RANDOM-ACCESS MEMORY AND METHODS FOR FORMING THE SAMEApril 2024June 2025Allow1311NoNo
18705273SEMICONDUCTOR COMPONENT WITH DAMPED BONDING SURFACES IN A PACKAGE WITH ENCAPSULATED PINSApril 2024June 2025Allow1420YesNo
18646280MICRO-DEVICE STRUCTURES WITH ETCH HOLESApril 2024May 2025Allow1300NoNo
18645947SEMICONDUCTOR DEVICEApril 2024February 2025Allow1010NoNo
18646015STACKED INTEGRATED CIRCUIT DEVICESApril 2024April 2025Allow1110NoNo
18645743Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting DeviceApril 2024January 2025Allow800YesNo
18644109Electronic device including detection element and insulation layer recess structureApril 2024December 2025Allow2020YesNo
18643260SEMICONDUCTOR MEMORY DEVICEApril 2024January 2025Allow900NoNo
18641719POWER RAIL AND SIGNAL CONDUCTING LINE ARRANGEMENTApril 2024January 2025Allow900NoNo
18641745Interconnect Structure Including Contact Via Over Barrier LayerApril 2024August 2025Allow1610NoNo
18641532DISPLAY DEVICE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOFApril 2024January 2026Allow2111YesNo
18640142DUAL MICRO-ELECTRO MECHANICAL SYSTEM AND MANUFACTURING METHOD THEREOFApril 2024December 2025Allow2011NoNo
18640867STACKED SEMICONDUCTOR DIE ARCHITECTURE WITH MULTIPLE LAYERS OF DISAGGREGATIONApril 2024June 2025Allow1410NoNo
18639156DISPLAY DEVICEApril 2024March 2025Allow1100NoNo
18637744PIXEL DEVICE ON DEEP TRENCH ISOLATION (DTI) STRUCTURE FOR IMAGE SENSORApril 2024April 2025Allow1110NoNo
18637539BONDING STRUCTURES IN SEMICONDUCTOR PACKAGED DEVICE AND METHOD OF FORMING SAMEApril 2024June 2025Allow1410YesNo
18636979NANOROD LIGHT EMITTING DEVICE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY APPARATUS INCLUDING THE SAMEApril 2024April 2025Allow1210YesNo
18633866MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOFApril 2024July 2025Allow1520NoNo
18633060IMAGE SENSOR AND ELECTRONIC APPARATUSApril 2024January 2026Allow2120NoNo
18632810IMAGE SENSOR AND METHOD OF FABRICATING THE SAMEApril 2024May 2025Allow1330YesNo
18630628Display PanelApril 2024February 2025Allow1110NoNo
18630585THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-MODULATED ACTIVE REGION AND METHODS FOR FORMING THE SAMEApril 2024November 2025Allow1911NoNo
18627932LIGHT-EMITTING DEVICEApril 2024January 2025Allow1010NoNo
18624725METAL LAYER PROTECTION DURING WET ETCHINGApril 2024January 2025Allow900NoNo
18624721SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEApril 2024July 2025Allow1520YesNo
18622511LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALINGMarch 2024March 2025Allow1110YesNo
18619330DISPLAY SUBSTRATE AND DISPLAY DEVICEMarch 2024January 2025Allow1010NoNo
18616199ISOLATION STRUCTURE AND MEMORY DEVICEMarch 2024February 2026Allow2340NoNo
18615681SEMICONDUCTOR DEVICE WITH DUAL SLIT STRUCTURES AND OFFSET CONTACT PLUG FOR ENHANCED VERTICAL CONNECTIVITYMarch 2024September 2025Allow1820NoNo
18612228INTER BLOCK FOR RECESSED CONTACTS AND METHODS FORMING SAMEMarch 2024March 2025Allow1101NoNo
18611843SEMICONDUCTOR DEVICEMarch 2024March 2025Allow1201NoNo
18610267REDUCED PITCH MEMORY SUBSYSTEM FOR MEMORY DEVICEMarch 2024March 2025Allow1210NoNo
18609234INTEGRATED CIRCUITMarch 2024April 2025Allow1301NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2898.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
93
Examiner Affirmed
52
(55.9%)
Examiner Reversed
41
(44.1%)
Reversal Percentile
89.3%
Higher than average

What This Means

With a 44.1% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
443
Allowed After Appeal Filing
188
(42.4%)
Not Allowed After Appeal Filing
255
(57.6%)
Filing Benefit Percentile
91.7%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 42.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2898 - Prosecution Statistics Summary

Executive Summary

Art Unit 2898 is part of Group 2890 in Technology Center 2800. This art unit has examined 14,703 patent applications in our dataset, with an overall allowance rate of 89.8%. Applications typically reach final disposition in approximately 23 months.

Comparative Analysis

Art Unit 2898's allowance rate of 89.8% places it in the 89% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2898 receive an average of 1.57 office actions before reaching final disposition (in the 26% percentile). The median prosecution time is 23 months (in the 89% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.