USPTO Examiner WALL VINCENT - Art Unit 2898

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18757386INTERFACIAL DUAL PASSIVATION LAYER FOR A FERROELECTRIC DEVICE AND METHODS OF FORMING THE SAMEJune 2024January 2026Allow1800NoNo
18677952FERROELECTRIC MEMORY DEVICE AND METHOD OF FORMING THE SAMEMay 2024February 2026Allow2110YesNo
18675249SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAMEMay 2024February 2026Allow2010NoNo
18657927Forming 3D Transistors Using 2D Van Der WAALS MaterialsMay 2024February 2026Allow2111NoNo
18658201Three-dimensional Heterogeneous Integrated Millimeter-wave System Package StructureMay 2024December 2025Abandon2021NoNo
18641532DISPLAY DEVICE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOFApril 2024January 2026Allow2111YesNo
18630585THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-MODULATED ACTIVE REGION AND METHODS FOR FORMING THE SAMEApril 2024November 2025Allow1911NoNo
18594397Methods of Forming Conductive Pipes Between Neighboring Features, and Integrated Assemblies Having Conductive Pipes Between Neighboring FeaturesMarch 2024August 2025Allow1821YesNo
18592390INTEGRATED CIRCUIT STRUCTURE HAVING TAP CELLFebruary 2024September 2025Allow1910YesNo
18431342FREQUENCY TUNING OF MULTI-QUBIT SYSTEMSFebruary 2024April 2025Allow1501NoNo
18425644Monolithic Segmented LED Array Architecture With Islanded Epitaxial GrowthJanuary 2024September 2025Allow1910NoNo
18404676Embedded Flash Memory Device with Floating Gate Embedded in a SubstrateJanuary 2024July 2025Allow1911NoNo
18506383PHASE-CHANGE MEMORY CELL HAVING A COMPACT STRUCTURENovember 2023August 2025Allow2111NoNo
18497930SEMICONDUCTOR DEVICEOctober 2023August 2025Allow2111NoNo
18493856SIDEWALL SPACER STRUCTURE TO INCREASE SWITCHING PERFORMANCE OF FERROELECTRIC MEMORY DEVICEOctober 2023October 2025Allow2421YesNo
18473174MEMORY DEVICE AND METHOD FOR MAKING SAMESeptember 2023March 2025Allow1800NoNo
18448186METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEAugust 2023September 2025Abandon2520NoNo
18448692DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEAugust 2023August 2025Allow2411NoNo
18232670WRAP-AROUND TRENCH CONTACT STRUCTURE AND METHODS OF FABRICATIONAugust 2023June 2025Allow2210YesNo
18366826DOUBLE GATE FERROELECTRIC FIELD EFFECT TRANSISTOR DEVICES AND METHODS FOR FORMING THE SAMEAugust 2023October 2025Allow2611YesNo
18231322FIELD EFFECT TRANSISTOR WITH SHALLOW TRENCH ISOLATION FEATURES WITHIN SOURCE/DRAIN REGIONSAugust 2023March 2025Allow1920YesNo
18230737VERTICAL ACCESS TRANSISTORS AND METHODS FOR FORMING THE SAMEAugust 2023March 2025Allow1911YesNo
18230846MULTI-GATE SELECTOR SWITCHES FOR MEMORY CELLS AND METHODS OF FORMING THE SAMEAugust 2023October 2025Allow2721NoNo
18363189FERROELECTRIC MEMORY DEVICES HAVING IMPROVED FERROELECTRIC PROPERTIES AND METHODS OF MAKING THE SAMEAugust 2023June 2025Allow2311NoNo
18362092THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MANUFACTUREJuly 2023January 2025Allow1810NoNo
18228309TRANSISTOR STRUCTUREJuly 2023September 2025Allow2620NoNo
18359940DRAIN SHARING FOR MEMORY CELL THIN FILM ACCESS TRANSISTORS AND METHODS FOR FORMING THE SAMEJuly 2023October 2025Allow2621YesNo
18359960ACCESS TRANSISTOR INCLUDING A METAL OXIDE BARRIER LAYER AND METHODS FOR FORMING THE SAMEJuly 2023July 2025Allow2311YesNo
18360605BACKSIDE ILLUMINATED IMAGE SENSOR DEVICE WITH SHIELDING LAYER AND FORMING METHODJuly 2023December 2024Allow1710NoNo
18359405THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-MODULATED ACTIVE REGION AND METHODS FOR FORMING THE SAMEJuly 2023June 2025Allow2311NoNo
18359015THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAMEJuly 2023April 2025Allow2111YesNo
18359308INTERFACE FILM TO MITIGATE SIZE EFFECT OF MEMORY DEVICEJuly 2023February 2025Allow1921YesNo
18357276METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJuly 2023July 2024Allow1210YesNo
18224152DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND MANUFACTURING METHOD OF DISPLAY DEVICEJuly 2023December 2024Allow1711NoNo
18212018Semiconductor Device And Method For Manufacturing Semiconductor DeviceJune 2023February 2025Allow2002NoNo
18336883DISPLAY DEVICE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOFJune 2023June 2025Allow2421NoNo
18336892DISPLAY DEVICE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOFJune 2023December 2025Allow3031NoNo
18336105FERROELECTRIC MEMORY DEVICE AND METHOD OF FORMING THE SAMEJune 2023September 2024Allow1510NoNo
18336196DISPLAY DEVICE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOFJune 2023May 2025Allow2321NoNo
18209323VERTICAL GALLIUM OXIDE (GA2O3) POWER FETSJune 2023November 2024Allow1720YesNo
18207821MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEJune 2023November 2025Allow2900NoNo
18330885Gate Structure Passivating Species Drive-In Method and Structure Formed TherebyJune 2023March 2025Allow2130YesNo
18327439Three-Dimensional Memory Device and MethodJune 2023November 2024Allow1721NoNo
18325176POLARIZATION ENHANCEMENT STRUCTURE FOR ENLARGING MEMORY WINDOWMay 2023August 2024Allow1421YesNo
18317958VERTICAL METAL OXIDE SEMICONDUCTOR CHANNEL SELECTOR TRANSISTOR AND METHODS OF FORMING THE SAMEMay 2023April 2024Allow1110NoNo
18036727TRANSISTOR AND SEMICONDUCTOR DEVICEMay 2023February 2026Allow3310NoNo
18316217DISPLAY DEVICEMay 2023June 2025Allow2540YesNo
18142206SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEMay 2023August 2024Allow1611NoNo
18309951Method and Device for Reducing Metal Burrs When Sawing Semiconductor PackagesMay 2023April 2024Allow1230YesNo
18300661METHOD OF SELECTIVE FILM DEPOSITION AND SEMICONDUCTOR FEATURE MADE BY THE METHODApril 2023May 2024Allow1311NoNo
18181272NOVEL BUFFER LAYER STRUCTURE TO IMPROVE GAN SEMICONDUCTORSMarch 2023June 2024Allow1511NoNo
18117357MEMORY CELL AND METHODS THEREOFMarch 2023December 2024Abandon2221YesNo
18114643MEMORY CELL, CAPACITIVE MEMORY STRUCTURE, AND METHODS THEREOFFebruary 2023April 2024Allow1301YesNo
18022425Multifunctional MZO-Based Negative Capacitance Thin Film Transistor on Glass or Flexible SubstratesFebruary 2023August 2025Allow3000NoNo
18166062FIELD EFFECT TRANSISTORFebruary 2023May 2024Allow1520YesNo
18158176TRANSISTORJanuary 2023October 2025Allow3301NoNo
18156747Monolithic Segmented LED Array Architecture With Islanded Epitaxial GrowthJanuary 2023December 2023Allow1111NoNo
18152574SEMICONDUCTOR DEVICEJanuary 2023February 2026Allow3710NoNo
18152597Ferroelectric Memory Device and Method of Forming the SameJanuary 2023December 2025Allow3501NoNo
18093588DISPLAY DEVICEJanuary 2023August 2025Allow3210NoNo
18092973SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY CELL INCLUDING THE SAMEJanuary 2023December 2025Allow3611YesNo
18149715TRANSISTOR DEVICE WITH MULTI-LAYER CHANNEL STRUCTUREJanuary 2023February 2026Allow3821NoNo
18149034DISPLAY PANELDecember 2022October 2025Allow3310NoNo
18069077VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED BACKSIDE TRENCH EPITAXYDecember 2022January 2026Allow3720YesNo
18065091SEMICONDUCTOR DEVICEDecember 2022April 2025Allow2800NoNo
18072441SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR STORAGE DEVICENovember 2022July 2024Allow1920YesNo
17984535SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMENovember 2022March 2026Allow4021NoNo
17951283IMAGING DEVICE, MANUFACTURING METHOD, AND ELECTRONIC DEVICESeptember 2022August 2024Abandon2221NoNo
17949632SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICESeptember 2022December 2024Allow2721NoNo
17823464THREE-DIMENSIONAL MEMORY STRING ARRAY OF THIN-FILM FERROELECTRIC TRANSISTORS FORMED WITH AN OXIDE SEMICONDUCTOR CHANNEL IN A CHANNEL LAST PROCESSAugust 2022February 2026Allow4111NoNo
17898224METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEAugust 2022December 2025Allow4001NoNo
17884285Memory Array Gate StructuresAugust 2022March 2024Allow1910NoNo
17882545SEMICONDUCOR DEVICE AND METHOD OF FABRICATING THE SAMEAugust 2022December 2025Allow4021YesNo
17880803FERROELECTRIC MEMORY DEVICE AND METHOD OF FORMING THE SAMEAugust 2022March 2024Allow1920YesNo
17880971ELECTROLUMINESCENT DISPLAY DEVICEAugust 2022November 2025Allow3911YesNo
17874377Forming 3D Transistors Using 2D Van Der WAALS MaterialsJuly 2022February 2024Allow1811NoNo
17814648Three-Dimensional Memory Device with Ferroelectric MaterialJuly 2022March 2024Allow2011YesNo
17856202SEMICONDUCTOR DEVICEJuly 2022April 2024Abandon2221YesNo
17842457SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND SEMICONDUCTOR DEVICE MANUFACTURING METHODJune 2022November 2025Allow4121NoNo
17784864SCHOTTKY BARRIER DIODEJune 2022October 2025Allow4030YesNo
17805955SEMICONDUCTOR DEVICE WITH ENCLOSED CAVITY AND METHOD THEREFORJune 2022May 2025Allow3601NoNo
17719233MULTI-CHIP 3D STACKING PACKAGING STRUCTURE AND PACKAGING METHOD WITH HIGH HEAT DISSIPATION EFFICIENCYApril 2022June 2025Abandon3910NoNo
17679390SEMICONDUCTOR DEVICEFebruary 2022March 2025Allow3610NoNo
17624934Semiconductor Device and Manufacturing Method of the Semiconductor DeviceJanuary 2022March 2026Allow5041NoNo
17562662MULTILAYERED MAGNETIC FREE LAYER STRUCTURE FOR SPIN-TRANSFER TORQUE (STT) MRAMDecember 2021January 2026Allow4841YesYes
17535276MANUFACTURING METHOD OF SEMICONDUCTOR DEVICENovember 2021March 2024Allow2810YesNo
17613393SEMICONDUCTOR DEVICENovember 2021April 2025Abandon4110NoNo
17530014SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOFNovember 2021December 2024Abandon3621NoNo
17529211VERTICAL TRANSISTOR STRUCTURES AND METHODS UTILIZING DEPOSITED MATERIALSNovember 2021May 2025Allow4121YesNo
17529051VERTICAL TRANSISTOR STRUCTURES AND METHODS UTILIZING SELECTIVE FORMATIONNovember 2021October 2024Allow3411YesNo
174551462D Channel Transistors with Low Contact ResistanceNovember 2021August 2024Allow3311YesNo
17515969SEMICONDUCTOR DEVICE AND SEMICONDUCTOR APPARATUS INCLUDING THE SAMENovember 2021May 2025Abandon4341YesNo
17515024APPARATUS AND METHOD INCLUDING MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELLOctober 2021November 2024Allow3631YesNo
17504923SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAMEOctober 2021November 2024Abandon3740NoNo
17493082GALLIUM OXIDE SUBSTRATE AND METHOD OF MANUFACTURING GALLIUM OXIDE SUBSTRATEOctober 2021May 2025Abandon4331YesNo
17491841COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICEOctober 2021September 2024Allow3520YesYes
17485848ACCESS TRANSISTOR INCLUDING A METAL OXIDE BARRIER LAYER AND METHODS FOR FORMING THE SAMESeptember 2021July 2024Abandon3421YesNo
17598167DISPLAY DEVICESeptember 2021December 2024Allow3810NoNo
17483900ACCESS TRANSISTORS IN A DUAL GATE LINE CONFIGURATION AND METHODS FOR FORMING THE SAMESeptember 2021April 2025Allow4221YesNo
17481470FERROELECTRIC MEMORY DEVICES HAVING IMPROVED FERROELECTRIC PROPERTIES AND METHODS OF MAKING THE SAMESeptember 2021February 2026Allow5371YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner WALL, VINCENT.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
6
Examiner Affirmed
4
(66.7%)
Examiner Reversed
2
(33.3%)
Reversal Percentile
53.5%
Higher than average

What This Means

With a 33.3% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
21
Allowed After Appeal Filing
7
(33.3%)
Not Allowed After Appeal Filing
14
(66.7%)
Filing Benefit Percentile
53.8%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 33.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner WALL, VINCENT - Prosecution Strategy Guide

Executive Summary

Examiner WALL, VINCENT works in Art Unit 2898 and has examined 96 patent applications in our dataset. With an allowance rate of 69.8%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 43 months.

Allowance Patterns

Examiner WALL, VINCENT's allowance rate of 69.8% places them in the 32% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by WALL, VINCENT receive 3.82 office actions before reaching final disposition. This places the examiner in the 96% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by WALL, VINCENT is 43 months. This places the examiner in the 17% percentile for prosecution speed. Applications take longer to reach final disposition with this examiner compared to most others.

Interview Effectiveness

Conducting an examiner interview provides a +18.6% benefit to allowance rate for applications examined by WALL, VINCENT. This interview benefit is in the 61% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 17.6% of applications are subsequently allowed. This success rate is in the 16% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 12.8% of cases where such amendments are filed. This entry rate is in the 13% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 72.7% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 59% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 62.5% of appeals filed. This is in the 41% percentile among all examiners. Of these withdrawals, 50.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 142.9% are granted (fully or in part). This grant rate is in the 97% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 28% percentile). This examiner makes examiner's amendments less often than average. You may need to make most claim amendments yourself.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 23.9% of allowed cases (in the 94% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Expect multiple rounds of prosecution: This examiner issues more office actions than average. Address potential issues proactively in your initial response and consider requesting an interview early in prosecution.
  • Plan for RCE after final rejection: This examiner rarely enters after-final amendments. Budget for an RCE in your prosecution strategy if you receive a final rejection.
  • Plan for extended prosecution: Applications take longer than average with this examiner. Factor this into your continuation strategy and client communications.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.