USPTO Examiner AU BAC H - Art Unit 2898

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18666835SEMICONDUCTOR DEVICEMay 2024March 2025Allow1010NoNo
18656134SEMICONDUCTOR DEVICESMay 2024March 2025Allow1110NoNo
18655341MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEMay 2024March 2025Allow1010NoNo
18654658STRUCTURE AND METHOD FOR FORMING INTEGRATED HIGH DENSITY MIM CAPACITORMay 2024December 2024Allow800NoNo
18639156DISPLAY DEVICEApril 2024March 2025Allow1100NoNo
18619330DISPLAY SUBSTRATE AND DISPLAY DEVICEMarch 2024January 2025Allow1010NoNo
18609234INTEGRATED CIRCUITMarch 2024April 2025Allow1301NoNo
18439486DUAL-PORT SRAM STRUCTUREFebruary 2024January 2025Allow1110NoNo
18426243SEMICONDUCTOR WAFER WITH DEVICES HAVING DIFFERENT TOP LAYER THICKNESSESJanuary 2024January 2025Allow1210NoNo
18422726INTEGRATED CIRCUIT DEVICEJanuary 2024September 2024Allow800NoNo
18403495SEMICONDUCTOR DEVICEJanuary 2024September 2024Allow900NoNo
18402941TECHNIQUES TO INHIBIT DELAMINATION FROM FLOWABLE GAP-FILL DIELECTRICJanuary 2024December 2024Allow1110NoNo
18402295SEMICONDUCTOR DEVICESJanuary 2024January 2025Allow1310NoNo
18402407Fin Field-Effect Transistor Device Having Contact Plugs with Re-Entrant ProfileJanuary 2024January 2025Allow1210NoNo
18400745FRONT END OF LINE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODSDecember 2023February 2025Allow1410NoNo
18542240TRANSISTOR CONFIGURATIONS FOR MULTI-DECK MEMORY DEVICESDecember 2023January 2025Allow1310NoNo
18537638ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOFDecember 2023November 2024Allow1110NoNo
18530049SEMICONDUCTOR MEMORY DEVICEDecember 2023January 2025Allow1310NoNo
18520326SILICIDE STRUCTURES IN TRANSISTORS AND METHODS OF FORMINGNovember 2023September 2024Allow1010NoNo
18481120ETCH PROFILE CONTROL OF VIA OPENINGOctober 2023June 2025Allow2030NoNo
18474822INTEGRATED CIRCUITSeptember 2023January 2025Allow1610NoNo
18472249SEMICONDUCTOR PACKAGESeptember 2023March 2025Allow1810NoNo
18366369Semiconductor Device and MethodAugust 2023September 2024Allow1410NoNo
18362067TOP ELECTRODE LAST SCHEME FOR MEMORY CELL TO PREVENT METAL REDEPOSITJuly 2023August 2024Allow1310NoNo
18355379PACKAGE AND MANUFACTURING METHOD THEREOFJuly 2023January 2025Allow1811NoNo
18347850SEMICONDUCTOR DEVICEJuly 2023June 2024Allow1110NoNo
18343036Fingerprint Sensor Device and MethodJune 2023April 2025Allow2111NoNo
18214378SEMICONDUCTOR DEVICES WITH RECESSED PADS FOR DIE STACK INTERCONNECTIONSJune 2023May 2024Allow1000NoNo
18340079HYBRID INTERCONNECT STRUCTURE FOR SELF ALIGNED VIAJune 2023September 2024Allow1510NoNo
18309460INTERCONNECT STRUCTURES AND METHODS OF FABRICATION THEREOFApril 2023September 2024Allow1701NoNo
18305528INTERCONNECT STRUCTURE AND METHOD FOR MANUFACTURING THE INTERCONNECT STRUCTUREApril 2023January 2025Allow2111NoNo
18303855SEMICONDUCTOR DEVICE AND METHODApril 2023April 2025Allow2420YesNo
18135563Metal Loss Prevention In Conductive StructuresApril 2023September 2024Allow1711NoNo
18179083Method of Forming RDLS and Structure Formed ThereofMarch 2023January 2025Allow2320NoNo
18068374SEMICONDUCTOR DEVICE STRUCTURE WITH CAP LAYERDecember 2022May 2024Allow1720YesNo
18064783Semiconductor Device and MethodDecember 2022March 2024Allow1610NoNo
18059742Tiled Lateral BJTNovember 2022December 2023Allow1300NoNo
17976450METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEOctober 2022March 2024Allow1610NoNo
18050424DEVICES INCLUDING HETEROGENEOUS CHANNELS, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODSOctober 2022September 2024Allow2311NoNo
17969835Combined MOS/MIS Capacitor AssemblyOctober 2022June 2025Allow3201NoNo
18048005METHOD OF PRODUCING AN INTEGRATED CIRCUIT CHIP INCLUDING A BACK-SIDE POWER DELIVERY NETWORKOctober 2022March 2025Allow2900NoNo
18047264DISPLAY DEVICEOctober 2022February 2025Allow2830NoNo
17958296FIRST LAYER INTERCONNECT FIRST ON CARRIER APPROACH FOR EMIB PATCHSeptember 2022March 2025Allow3040NoNo
17816051METHOD OF MAKING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICEJuly 2022March 2024Allow2011NoNo
17876083Semiconductor Device and MethodJuly 2022July 2024Allow2410YesNo
17875625SEMICONDUCTOR STRUCTURE WITH AIR GAP AND METHOD FOR MANUFACTURING THE SAMEJuly 2022June 2025Allow3401NoNo
17815854SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAMEJuly 2022May 2025Allow3301NoNo
17874694Semiconductor Device and MethodJuly 2022June 2024Allow2320NoNo
17874176THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOFJuly 2022March 2024Allow2000NoNo
17872701Structure and Method for Forming Integrated High Density Mim CapacitorJuly 2022February 2024Allow1810NoNo
17872825Semiconductor Device and MethodJuly 2022February 2024Allow1810NoNo
17868065INTEGRATED CIRCUITJuly 2022December 2023Allow1700NoNo
17860345MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOFJuly 2022January 2024Allow1820NoNo
17857965SEMICONDUCTOR STRUCTURE, FABRICATION METHOD AND THREE-DIMENSIONAL MEMORYJuly 2022March 2025Allow3211NoNo
17853803EDGE-TRIMMING METHODS FOR WAFER BONDING AND DICINGJune 2022January 2025Allow3120YesNo
17789150DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY APPARATUSJune 2022April 2025Allow3310NoNo
17848191VERTICALLY STACKED FINFETS & SHARED GATE PATTERNINGJune 2022May 2024Allow2321NoNo
17787985DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME, DISPLAY APPARATUS AND TILED DISPLAY APPARATUSJune 2022December 2024Allow3000NoNo
17841901METHOD FOR IMPROVING PROFILE OF INTERCONNECT STRUCTUREJune 2022March 2025Allow3311NoNo
17837434SKIP-LEVEL TSV WITH HYBRID DIELECTRIC SCHEME FOR BACKSIDE POWER DELIVERYJune 2022May 2025Allow3501NoNo
17834939FERROELECTRIC TUNNEL JUNCTIONS WITH CONDUCTIVE ELECTRODES HAVING ASYMMETRIC NITROGEN OR OXYGEN PROFILESJune 2022May 2025Allow3501NoNo
17834571LIGHT EMITTING MODULE AND METHOD FOR MANUFACTURING LIGHT EMITTING MODULEJune 2022March 2025Allow3410NoNo
17782545OPTOELECTRONIC DEVICE AND METHOD FOR PRODUCING AN OPTOELECTRONIC DEVICEJune 2022June 2025Allow3611NoNo
17740168METHODS OF MANUFACTURE OF ADVANCED WAFER BONDED HETEROJUNCTION BIPOLAR TRANSISTORSMay 2022August 2024Allow2701NoNo
17711370WAFER STRUCTURE AND SEMICONDUCTOR DEVICEApril 2022September 2024Allow3000NoNo
17656752TEST STRUCTURE OF WAFER AND METHOD OF MANUFACTURING TEST STRUCTURE OF WAFERMarch 2022March 2025Allow3611YesNo
17705343SEMICONDUCTOR DEVICESMarch 2022June 2025Allow3900NoNo
17654829MODULEMarch 2022June 2025Allow3911YesNo
17692346SPACER-BASED SELF-ALIGNED INTERCONNECT FEATURESMarch 2022June 2025Allow3900NoNo
17634379LIGHT-EMITTING ELEMENTFebruary 2022March 2025Allow3711NoNo
17631932METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEFebruary 2022December 2024Allow3410NoNo
17583783METHOD OF MANUFACTURING SEMICONDUCTOR DEVICESJanuary 2022December 2024Allow3410YesNo
17580725SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2022June 2024Allow2901NoNo
17578509OPENING STRUCTURE AND FORMING METHOD THEREOF, CONTACT PLUG STRUCTURE AND FORMING METHOD THEREOFJanuary 2022September 2024Allow3211YesNo
17577410SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAMEJanuary 2022September 2024Allow3201NoNo
17648138CONDUCTIVE FEATURES HAVING VARYING RESISTANCEJanuary 2022March 2024Allow2600NoNo
17576910METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICEJanuary 2022March 2025Allow3811NoNo
17572657PACKAGE DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2022July 2024Allow3010NoNo
17625985IMAGE SENSORJanuary 2022October 2024Abandon3310NoNo
17567368DISPLAY DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2022March 2024Allow2700NoNo
17543518DIAGONAL VIAS IN SEMICONDUCTOR STRUCTURESDecember 2021March 2025Allow4021NoNo
17532680LIGHT EMITTING DISPLAY APPARATUSNovember 2021March 2025Allow4011NoNo
17530561SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAMENovember 2021March 2024Allow2810NoNo
17454249METHOD OF MANUFACTURING SEMICONDUCTOR DEVICENovember 2021March 2024Allow2900NoNo
17516589MANUFACTURING METHOD FOR INTEGRATING GATE DIELECTRIC LAYERS OF DIFFERENT THICKNESSESNovember 2021December 2023Allow2600NoNo
17451967METHOD FOR MANUFACTURING MASK STRUCTURE, SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFOctober 2021June 2024Allow3210YesNo
17501084SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFOctober 2021January 2024Allow2730NoNo
17446398RUTHENIUM-BASED LINER FOR A COPPER INTERCONNECTAugust 2021June 2024Allow3410YesNo
17388033SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2021March 2024Allow3111NoNo
17380067CHIP-SUBSTRATE COMPOSITE SEMICONDUCTOR DEVICEJuly 2021March 2025Allow4431NoNo
17373258MICROELECTRONIC DEVICES WITH ACTIVE SOURCE/DRAIN CONTACTS IN TRENCH IN SYMMETRICAL DUAL-BLOCK STRUCTURE, AND RELATED SYSTEMS AND METHODSJuly 2021July 2024Allow3611NoNo
17353400SYSTEM AND METHOD FOR MULTIPLE STEP DIRECTIONAL PATTERNINGJune 2021March 2025Allow4422YesNo
17332553Metal Hard Masks for Reducing Line BendingMay 2021August 2024Allow3930YesNo
17325090FRONT END OF LINE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODSMay 2021May 2024Allow3631NoNo
17324626DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEMay 2021April 2024Allow3550YesNo
17323234DISPLAY DEVICEMay 2021January 2024Allow3211NoNo
17158859MICROELECTRONIC DEVICES WITH DOPANT EXTENSIONS NEAR A GIDL REGION BELOW A TIER STACK, AND RELATED METHODS AND SYSTEMSJanuary 2021December 2023Allow3511NoNo
17144717BACKSIDE OR FRONTSIDE THROUGH SUBSTRATE VIA (TSV) LANDING ON METALJanuary 2021March 2024Allow3841NoNo
17255888DISPLAY SUBSTRATE AND DISPLAY DEVICEDecember 2020January 2024Allow3710NoNo
17254458ELECTRONIC ELEMENT MOUNTING SUBSTRATE, ELECTRONIC DEVICE, AND ELECTRONIC MODULEDecember 2020September 2024Abandon4420NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner AU, BAC H.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
1
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
13.9%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
1
(100.0%)
Filing Benefit Percentile
6.1%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner AU, BAC H - Prosecution Strategy Guide

Executive Summary

Examiner AU, BAC H works in Art Unit 2898 and has examined 257 patent applications in our dataset. With an allowance rate of 99.2%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 27 months.

Allowance Patterns

Examiner AU, BAC H's allowance rate of 99.2% places them in the 97% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by AU, BAC H receive 1.29 office actions before reaching final disposition. This places the examiner in the 24% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by AU, BAC H is 27 months. This places the examiner in the 58% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.9% benefit to allowance rate for applications examined by AU, BAC H. This interview benefit is in the 15% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 35.3% of applications are subsequently allowed. This success rate is in the 74% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 32.8% of cases where such amendments are filed. This entry rate is in the 40% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 14% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 14% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 5.9% are granted (fully or in part). This grant rate is in the 6% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 13.6% of allowed cases (in the 98% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.