Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18666835 | SEMICONDUCTOR DEVICE | May 2024 | March 2025 | Allow | 10 | 1 | 0 | No | No |
| 18656134 | SEMICONDUCTOR DEVICES | May 2024 | March 2025 | Allow | 11 | 1 | 0 | No | No |
| 18655341 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | May 2024 | March 2025 | Allow | 10 | 1 | 0 | No | No |
| 18654658 | STRUCTURE AND METHOD FOR FORMING INTEGRATED HIGH DENSITY MIM CAPACITOR | May 2024 | December 2024 | Allow | 8 | 0 | 0 | No | No |
| 18639156 | DISPLAY DEVICE | April 2024 | March 2025 | Allow | 11 | 0 | 0 | No | No |
| 18619330 | DISPLAY SUBSTRATE AND DISPLAY DEVICE | March 2024 | January 2025 | Allow | 10 | 1 | 0 | No | No |
| 18609234 | INTEGRATED CIRCUIT | March 2024 | April 2025 | Allow | 13 | 0 | 1 | No | No |
| 18439486 | DUAL-PORT SRAM STRUCTURE | February 2024 | January 2025 | Allow | 11 | 1 | 0 | No | No |
| 18426243 | SEMICONDUCTOR WAFER WITH DEVICES HAVING DIFFERENT TOP LAYER THICKNESSES | January 2024 | January 2025 | Allow | 12 | 1 | 0 | No | No |
| 18422726 | INTEGRATED CIRCUIT DEVICE | January 2024 | September 2024 | Allow | 8 | 0 | 0 | No | No |
| 18403495 | SEMICONDUCTOR DEVICE | January 2024 | September 2024 | Allow | 9 | 0 | 0 | No | No |
| 18402941 | TECHNIQUES TO INHIBIT DELAMINATION FROM FLOWABLE GAP-FILL DIELECTRIC | January 2024 | December 2024 | Allow | 11 | 1 | 0 | No | No |
| 18402295 | SEMICONDUCTOR DEVICES | January 2024 | January 2025 | Allow | 13 | 1 | 0 | No | No |
| 18402407 | Fin Field-Effect Transistor Device Having Contact Plugs with Re-Entrant Profile | January 2024 | January 2025 | Allow | 12 | 1 | 0 | No | No |
| 18400745 | FRONT END OF LINE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS | December 2023 | February 2025 | Allow | 14 | 1 | 0 | No | No |
| 18542240 | TRANSISTOR CONFIGURATIONS FOR MULTI-DECK MEMORY DEVICES | December 2023 | January 2025 | Allow | 13 | 1 | 0 | No | No |
| 18537638 | ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF | December 2023 | November 2024 | Allow | 11 | 1 | 0 | No | No |
| 18530049 | SEMICONDUCTOR MEMORY DEVICE | December 2023 | January 2025 | Allow | 13 | 1 | 0 | No | No |
| 18520326 | SILICIDE STRUCTURES IN TRANSISTORS AND METHODS OF FORMING | November 2023 | September 2024 | Allow | 10 | 1 | 0 | No | No |
| 18481120 | ETCH PROFILE CONTROL OF VIA OPENING | October 2023 | June 2025 | Allow | 20 | 3 | 0 | No | No |
| 18474822 | INTEGRATED CIRCUIT | September 2023 | January 2025 | Allow | 16 | 1 | 0 | No | No |
| 18472249 | SEMICONDUCTOR PACKAGE | September 2023 | March 2025 | Allow | 18 | 1 | 0 | No | No |
| 18366369 | Semiconductor Device and Method | August 2023 | September 2024 | Allow | 14 | 1 | 0 | No | No |
| 18362067 | TOP ELECTRODE LAST SCHEME FOR MEMORY CELL TO PREVENT METAL REDEPOSIT | July 2023 | August 2024 | Allow | 13 | 1 | 0 | No | No |
| 18355379 | PACKAGE AND MANUFACTURING METHOD THEREOF | July 2023 | January 2025 | Allow | 18 | 1 | 1 | No | No |
| 18347850 | SEMICONDUCTOR DEVICE | July 2023 | June 2024 | Allow | 11 | 1 | 0 | No | No |
| 18343036 | Fingerprint Sensor Device and Method | June 2023 | April 2025 | Allow | 21 | 1 | 1 | No | No |
| 18214378 | SEMICONDUCTOR DEVICES WITH RECESSED PADS FOR DIE STACK INTERCONNECTIONS | June 2023 | May 2024 | Allow | 10 | 0 | 0 | No | No |
| 18340079 | HYBRID INTERCONNECT STRUCTURE FOR SELF ALIGNED VIA | June 2023 | September 2024 | Allow | 15 | 1 | 0 | No | No |
| 18309460 | INTERCONNECT STRUCTURES AND METHODS OF FABRICATION THEREOF | April 2023 | September 2024 | Allow | 17 | 0 | 1 | No | No |
| 18305528 | INTERCONNECT STRUCTURE AND METHOD FOR MANUFACTURING THE INTERCONNECT STRUCTURE | April 2023 | January 2025 | Allow | 21 | 1 | 1 | No | No |
| 18303855 | SEMICONDUCTOR DEVICE AND METHOD | April 2023 | April 2025 | Allow | 24 | 2 | 0 | Yes | No |
| 18135563 | Metal Loss Prevention In Conductive Structures | April 2023 | September 2024 | Allow | 17 | 1 | 1 | No | No |
| 18179083 | Method of Forming RDLS and Structure Formed Thereof | March 2023 | January 2025 | Allow | 23 | 2 | 0 | No | No |
| 18068374 | SEMICONDUCTOR DEVICE STRUCTURE WITH CAP LAYER | December 2022 | May 2024 | Allow | 17 | 2 | 0 | Yes | No |
| 18064783 | Semiconductor Device and Method | December 2022 | March 2024 | Allow | 16 | 1 | 0 | No | No |
| 18059742 | Tiled Lateral BJT | November 2022 | December 2023 | Allow | 13 | 0 | 0 | No | No |
| 17976450 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | October 2022 | March 2024 | Allow | 16 | 1 | 0 | No | No |
| 18050424 | DEVICES INCLUDING HETEROGENEOUS CHANNELS, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS | October 2022 | September 2024 | Allow | 23 | 1 | 1 | No | No |
| 17969835 | Combined MOS/MIS Capacitor Assembly | October 2022 | June 2025 | Allow | 32 | 0 | 1 | No | No |
| 18048005 | METHOD OF PRODUCING AN INTEGRATED CIRCUIT CHIP INCLUDING A BACK-SIDE POWER DELIVERY NETWORK | October 2022 | March 2025 | Allow | 29 | 0 | 0 | No | No |
| 18047264 | DISPLAY DEVICE | October 2022 | February 2025 | Allow | 28 | 3 | 0 | No | No |
| 17958296 | FIRST LAYER INTERCONNECT FIRST ON CARRIER APPROACH FOR EMIB PATCH | September 2022 | March 2025 | Allow | 30 | 4 | 0 | No | No |
| 17816051 | METHOD OF MAKING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | July 2022 | March 2024 | Allow | 20 | 1 | 1 | No | No |
| 17876083 | Semiconductor Device and Method | July 2022 | July 2024 | Allow | 24 | 1 | 0 | Yes | No |
| 17875625 | SEMICONDUCTOR STRUCTURE WITH AIR GAP AND METHOD FOR MANUFACTURING THE SAME | July 2022 | June 2025 | Allow | 34 | 0 | 1 | No | No |
| 17815854 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME | July 2022 | May 2025 | Allow | 33 | 0 | 1 | No | No |
| 17874694 | Semiconductor Device and Method | July 2022 | June 2024 | Allow | 23 | 2 | 0 | No | No |
| 17874176 | THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOF | July 2022 | March 2024 | Allow | 20 | 0 | 0 | No | No |
| 17872701 | Structure and Method for Forming Integrated High Density Mim Capacitor | July 2022 | February 2024 | Allow | 18 | 1 | 0 | No | No |
| 17872825 | Semiconductor Device and Method | July 2022 | February 2024 | Allow | 18 | 1 | 0 | No | No |
| 17868065 | INTEGRATED CIRCUIT | July 2022 | December 2023 | Allow | 17 | 0 | 0 | No | No |
| 17860345 | MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOF | July 2022 | January 2024 | Allow | 18 | 2 | 0 | No | No |
| 17857965 | SEMICONDUCTOR STRUCTURE, FABRICATION METHOD AND THREE-DIMENSIONAL MEMORY | July 2022 | March 2025 | Allow | 32 | 1 | 1 | No | No |
| 17853803 | EDGE-TRIMMING METHODS FOR WAFER BONDING AND DICING | June 2022 | January 2025 | Allow | 31 | 2 | 0 | Yes | No |
| 17789150 | DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY APPARATUS | June 2022 | April 2025 | Allow | 33 | 1 | 0 | No | No |
| 17848191 | VERTICALLY STACKED FINFETS & SHARED GATE PATTERNING | June 2022 | May 2024 | Allow | 23 | 2 | 1 | No | No |
| 17787985 | DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME, DISPLAY APPARATUS AND TILED DISPLAY APPARATUS | June 2022 | December 2024 | Allow | 30 | 0 | 0 | No | No |
| 17841901 | METHOD FOR IMPROVING PROFILE OF INTERCONNECT STRUCTURE | June 2022 | March 2025 | Allow | 33 | 1 | 1 | No | No |
| 17837434 | SKIP-LEVEL TSV WITH HYBRID DIELECTRIC SCHEME FOR BACKSIDE POWER DELIVERY | June 2022 | May 2025 | Allow | 35 | 0 | 1 | No | No |
| 17834939 | FERROELECTRIC TUNNEL JUNCTIONS WITH CONDUCTIVE ELECTRODES HAVING ASYMMETRIC NITROGEN OR OXYGEN PROFILES | June 2022 | May 2025 | Allow | 35 | 0 | 1 | No | No |
| 17834571 | LIGHT EMITTING MODULE AND METHOD FOR MANUFACTURING LIGHT EMITTING MODULE | June 2022 | March 2025 | Allow | 34 | 1 | 0 | No | No |
| 17782545 | OPTOELECTRONIC DEVICE AND METHOD FOR PRODUCING AN OPTOELECTRONIC DEVICE | June 2022 | June 2025 | Allow | 36 | 1 | 1 | No | No |
| 17740168 | METHODS OF MANUFACTURE OF ADVANCED WAFER BONDED HETEROJUNCTION BIPOLAR TRANSISTORS | May 2022 | August 2024 | Allow | 27 | 0 | 1 | No | No |
| 17711370 | WAFER STRUCTURE AND SEMICONDUCTOR DEVICE | April 2022 | September 2024 | Allow | 30 | 0 | 0 | No | No |
| 17656752 | TEST STRUCTURE OF WAFER AND METHOD OF MANUFACTURING TEST STRUCTURE OF WAFER | March 2022 | March 2025 | Allow | 36 | 1 | 1 | Yes | No |
| 17705343 | SEMICONDUCTOR DEVICES | March 2022 | June 2025 | Allow | 39 | 0 | 0 | No | No |
| 17654829 | MODULE | March 2022 | June 2025 | Allow | 39 | 1 | 1 | Yes | No |
| 17692346 | SPACER-BASED SELF-ALIGNED INTERCONNECT FEATURES | March 2022 | June 2025 | Allow | 39 | 0 | 0 | No | No |
| 17634379 | LIGHT-EMITTING ELEMENT | February 2022 | March 2025 | Allow | 37 | 1 | 1 | No | No |
| 17631932 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | February 2022 | December 2024 | Allow | 34 | 1 | 0 | No | No |
| 17583783 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES | January 2022 | December 2024 | Allow | 34 | 1 | 0 | Yes | No |
| 17580725 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | January 2022 | June 2024 | Allow | 29 | 0 | 1 | No | No |
| 17578509 | OPENING STRUCTURE AND FORMING METHOD THEREOF, CONTACT PLUG STRUCTURE AND FORMING METHOD THEREOF | January 2022 | September 2024 | Allow | 32 | 1 | 1 | Yes | No |
| 17577410 | SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME | January 2022 | September 2024 | Allow | 32 | 0 | 1 | No | No |
| 17648138 | CONDUCTIVE FEATURES HAVING VARYING RESISTANCE | January 2022 | March 2024 | Allow | 26 | 0 | 0 | No | No |
| 17576910 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE | January 2022 | March 2025 | Allow | 38 | 1 | 1 | No | No |
| 17572657 | PACKAGE DEVICE AND MANUFACTURING METHOD THEREOF | January 2022 | July 2024 | Allow | 30 | 1 | 0 | No | No |
| 17625985 | IMAGE SENSOR | January 2022 | October 2024 | Abandon | 33 | 1 | 0 | No | No |
| 17567368 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF | January 2022 | March 2024 | Allow | 27 | 0 | 0 | No | No |
| 17543518 | DIAGONAL VIAS IN SEMICONDUCTOR STRUCTURES | December 2021 | March 2025 | Allow | 40 | 2 | 1 | No | No |
| 17532680 | LIGHT EMITTING DISPLAY APPARATUS | November 2021 | March 2025 | Allow | 40 | 1 | 1 | No | No |
| 17530561 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME | November 2021 | March 2024 | Allow | 28 | 1 | 0 | No | No |
| 17454249 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | November 2021 | March 2024 | Allow | 29 | 0 | 0 | No | No |
| 17516589 | MANUFACTURING METHOD FOR INTEGRATING GATE DIELECTRIC LAYERS OF DIFFERENT THICKNESSES | November 2021 | December 2023 | Allow | 26 | 0 | 0 | No | No |
| 17451967 | METHOD FOR MANUFACTURING MASK STRUCTURE, SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | October 2021 | June 2024 | Allow | 32 | 1 | 0 | Yes | No |
| 17501084 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | October 2021 | January 2024 | Allow | 27 | 3 | 0 | No | No |
| 17446398 | RUTHENIUM-BASED LINER FOR A COPPER INTERCONNECT | August 2021 | June 2024 | Allow | 34 | 1 | 0 | Yes | No |
| 17388033 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | July 2021 | March 2024 | Allow | 31 | 1 | 1 | No | No |
| 17380067 | CHIP-SUBSTRATE COMPOSITE SEMICONDUCTOR DEVICE | July 2021 | March 2025 | Allow | 44 | 3 | 1 | No | No |
| 17373258 | MICROELECTRONIC DEVICES WITH ACTIVE SOURCE/DRAIN CONTACTS IN TRENCH IN SYMMETRICAL DUAL-BLOCK STRUCTURE, AND RELATED SYSTEMS AND METHODS | July 2021 | July 2024 | Allow | 36 | 1 | 1 | No | No |
| 17353400 | SYSTEM AND METHOD FOR MULTIPLE STEP DIRECTIONAL PATTERNING | June 2021 | March 2025 | Allow | 44 | 2 | 2 | Yes | No |
| 17332553 | Metal Hard Masks for Reducing Line Bending | May 2021 | August 2024 | Allow | 39 | 3 | 0 | Yes | No |
| 17325090 | FRONT END OF LINE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS | May 2021 | May 2024 | Allow | 36 | 3 | 1 | No | No |
| 17324626 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | May 2021 | April 2024 | Allow | 35 | 5 | 0 | Yes | No |
| 17323234 | DISPLAY DEVICE | May 2021 | January 2024 | Allow | 32 | 1 | 1 | No | No |
| 17158859 | MICROELECTRONIC DEVICES WITH DOPANT EXTENSIONS NEAR A GIDL REGION BELOW A TIER STACK, AND RELATED METHODS AND SYSTEMS | January 2021 | December 2023 | Allow | 35 | 1 | 1 | No | No |
| 17144717 | BACKSIDE OR FRONTSIDE THROUGH SUBSTRATE VIA (TSV) LANDING ON METAL | January 2021 | March 2024 | Allow | 38 | 4 | 1 | No | No |
| 17255888 | DISPLAY SUBSTRATE AND DISPLAY DEVICE | December 2020 | January 2024 | Allow | 37 | 1 | 0 | No | No |
| 17254458 | ELECTRONIC ELEMENT MOUNTING SUBSTRATE, ELECTRONIC DEVICE, AND ELECTRONIC MODULE | December 2020 | September 2024 | Abandon | 44 | 2 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner AU, BAC H.
With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.
⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner AU, BAC H works in Art Unit 2898 and has examined 257 patent applications in our dataset. With an allowance rate of 99.2%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 27 months.
Examiner AU, BAC H's allowance rate of 99.2% places them in the 97% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.
On average, applications examined by AU, BAC H receive 1.29 office actions before reaching final disposition. This places the examiner in the 24% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.
The median time to disposition (half-life) for applications examined by AU, BAC H is 27 months. This places the examiner in the 58% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.
Conducting an examiner interview provides a +0.9% benefit to allowance rate for applications examined by AU, BAC H. This interview benefit is in the 15% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 35.3% of applications are subsequently allowed. This success rate is in the 74% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 32.8% of cases where such amendments are filed. This entry rate is in the 40% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.
When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 14% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.
This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 14% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.
When applicants file petitions regarding this examiner's actions, 5.9% are granted (fully or in part). This grant rate is in the 6% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 13.6% of allowed cases (in the 98% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.