USPTO Examiner ISAAC STANETTA D - Art Unit 2898

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18616199ISOLATION STRUCTURE AND MEMORY DEVICEMarch 2024February 2026Allow2340NoNo
18510707BCD DEVICE LAYOUT AREA DEFINED BY A DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FORMING THE SAMENovember 2023August 2025Allow2120NoNo
18368820SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICESeptember 2023February 2026Allow2930YesNo
18236955ELECTRONIC DEVICEAugust 2023August 2025Allow2420NoNo
18366752SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR DIES HAVING DIFFERENT LATTICE DIRECTIONS AND METHOD OF FORMING THE SAMEAugust 2023October 2025Allow2620NoNo
18364483SEMICONDUCTOR WAFER, CLIP AND SEMICONDUCTOR DEVICEAugust 2023December 2025Abandon2830NoNo
18358167BCD DEVICE LAYOUT AREA DEFINED BY A DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FORMING THE SAMEJuly 2023November 2025Allow2730NoNo
18221184MULTIPLE DIE PACKAGE USING AN EMBEDDED BRIDGE CONNECTING DIESJuly 2023September 2025Allow2620NoNo
18344565SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2023July 2025Allow2520NoNo
18212719PRINTED CIRCUIT FILM, DISPLAY DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT FILMJune 2023May 2025Allow2320NoNo
18338572SOURCE CONTACT FORMATION OF MOSFET WITH GATE SHIELD BUFFER FOR PITCH REDUCTIONJune 2023October 2024Allow1610NoNo
18329203SEMICONDUCTOR PACKAGE WITH GUIDE PINJune 2023September 2025Allow2830NoNo
18202062COPPER ELECTRODEPOSITION SEQUENCE FOR THE FILLING OF COBALT LINED FEATURESMay 2023January 2026Abandon3230NoNo
18313492MECHANICAL WAFER ALIGNMENT DETECTION FOR BONDING PROCESSMay 2023August 2025Allow2730NoNo
18309905SEMICONDUCTOR-ON-INSULATOR WAFER HAVING A COMPOSITE INSULATOR LAYERMay 2023April 2025Allow2420NoNo
18306119POWER SEMICONDUCTOR DEVICE WITH A DOUBLE ISLAND SURFACE MOUNT PACKAGEApril 2023December 2024Allow1910NoNo
18303173Multiple Threshold Voltage Implementation Through Lanthanum IncorporationApril 2023November 2025Allow3130NoNo
18134418DIFFUSED TIP EXTENSION TRANSISTORApril 2023April 2025Abandon2430NoNo
18096704PROCESS FOR REDUCING PATTERN-INDUCED WAFER DEFORMATIONJanuary 2023April 2025Allow2730NoNo
18086326FDSOI DEVICE STRUCTURE AND PREPARATION METHOD THEREOFDecember 2022August 2023Allow810NoNo
18082727Semiconductor Manufacturing Apparatus and Manufacturing Method for Semiconductor DeviceDecember 2022April 2025Allow2840NoNo
17958040SINGLE DIE REINFORCED GALVANIC ISOLATION DEVICESeptember 2022July 2025Allow3311NoNo
17931285ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMESeptember 2022December 2024Allow2730YesNo
17942233SEMICONDUCTOR DEVICE STRUCTURES ISOLATED BY POROUS SEMICONDUCTOR MATERIALSeptember 2022July 2025Allow3421NoNo
17939998SEMICONDUCTOR DEVICESeptember 2022November 2025Abandon3810NoNo
17903846SEMICONDUCTOR DEVICESeptember 2022September 2025Allow3610NoNo
17894572SEMICONDUCTOR DEVICEAugust 2022September 2025Allow3610NoNo
17886002RESIN-SEALED SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING RESIN-SEALED SEMICONDUCTOR DEVICEAugust 2022July 2025Allow3511NoNo
17818417LAYOUT FOR INTEGRATED CIRCUIT AND THE INTEGRATED CIRCUITAugust 2022October 2023Allow1410NoNo
17817365FORMATION OF TRENCH SILICIDE SOURCE OR DRAIN CONTACTS WITHOUT GATE DAMAGEAugust 2022August 2025Allow3650YesNo
17815181STRESS-INDUCING SILICON LINER IN SEMICONDUCTOR DEVICESJuly 2022June 2024Allow2320YesNo
17795524LIGHT-EMITTING PANEL, METHOD FOR FABRICATING SAME, AND DISPLAY DEVICEJuly 2022March 2026Allow4420NoNo
17872338ELECTRONIC SYSTEM HAVING INTERMETALLIC CONNECTION STRUCTURE WITH CENTRAL INTERMETALLIC MESH STRUCTURE AND MESH-FREE EXTERIOR STRUCTURESJuly 2022December 2025Allow4121NoNo
17814297TUNGSTEN FEATURE FILL WITH NUCLEATION INHIBITIONJuly 2022April 2025Allow3330NoNo
17868831TUNING THRESHOLD VOLTAGE IN NANOSHEET TRANSITOR DEVICESJuly 2022August 2025Allow3730NoNo
17809480TUNGSTEN FEATURE FILL WITH NUCLEATION INHIBITIONJune 2022February 2024Allow2040NoNo
17836180Epitaxial Growth Method for FDSOI Hybrid RegionJune 2022July 2025Allow3740NoNo
17832541Mixed Dielectric Materials for Improving Signal Integrity of Integrated Electronics PackagesJune 2022September 2025Allow4011NoNo
17781264METHOD FOR THE LOCALIZED DEPOSITION OF A MATERIAL ON A METAL ELEMENTMay 2022July 2025Allow3810NoNo
17741467SENSOR AND METHOD OF FORMING THE SAMEMay 2022July 2023Allow1510NoNo
17310514ORGANIC EL DISPLAY PANEL AND METHOD FOR MANUFACTURING ORGANIC EL DISPLAY PANELApril 2022March 2025Allow4310YesNo
17706880MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICEMarch 2022March 2025Abandon3610NoNo
17703057METHOD FOR MANUFACTURING DOUBLE-SIDED COOLING TYPE POWER MODULE AND DOUBLE-SIDED COOLING TYPE POWER MODULEMarch 2022February 2026Allow4761NoNo
17698106SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME AND APPLICATION THEREOFMarch 2022June 2025Abandon3920NoNo
17654620Method of Forming Semiconductor DeviceMarch 2022August 2023Allow1710NoNo
17639914METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND COLLETMarch 2022July 2025Allow4130YesNo
17680437Structures for Providing Electrical Isolation in Semiconductor DevicesFebruary 2022May 2025Allow3940YesNo
17651792SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAMEFebruary 2022April 2025Abandon3820YesNo
17675108SEMICONDUCTOR DEVICE WITH SILICIDE STRUCTURES SURROUNDING EPITAXIAL STRUCTURES AND METHOD OF MAKING THE SAMEFebruary 2022March 2025Allow3711NoNo
17636455BONDING APPARATUS, BONDING SYSTEM, AND BONDING METHODFebruary 2022September 2024Abandon3010NoNo
17675846SEMICONDUCTOR DEVICEFebruary 2022July 2025Allow4140YesNo
17672144MANUFACTURING METHOD FOR FORMING SEMICONDUCTOR DEVICEFebruary 2022December 2025Allow4620NoNo
17669375APPARATUS INCLUDING TRANSPARENT MATERIAL FOR TRANSPARENT PROCESS PERFORMANCE AND METHOD USING THEREOFFebruary 2022December 2025Allow4621YesNo
17667558POWER SEMICONDUCTOR DEVICEFebruary 2022April 2025Allow3840NoNo
17667989SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGEFebruary 2022February 2025Allow3710NoNo
17650380PREPARATION METHOD FOR SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR MEMORYFebruary 2022April 2025Allow3911NoNo
17586254PROCESS OF SURFACE TREATMENT OF SOI WAFERJanuary 2022March 2024Abandon2610NoNo
17630030Installing an Electronic AssemblyJanuary 2022September 2024Abandon3210NoNo
17580710Light Emitting Apparatus, Method For Manufacturing Light Emitting Apparatus, And ProjectorJanuary 2022April 2025Allow3811NoNo
17579788DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICEJanuary 2022July 2025Allow4221NoNo
17577194METHOD FOR MAKING DEEP TRENCH ISOLATION OF CIS DEVICE, AND SEMICONDUCTOR DEVICE STRUCTUREJanuary 2022October 2025Allow4521NoNo
17576084SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICEJanuary 2022February 2024Abandon2501NoNo
17647903BONDING FILM, TAPE FOR WAFER PROCESSING, METHOD FOR PRODUCING BONDED BODY, AND BONDED BODY AND PASTED BODYJanuary 2022April 2025Allow3920NoNo
17575124SEMICONDUCTOR STRUCTURES AND METHODS FOR MANUFACTURING THE SAMEJanuary 2022August 2025Allow4321NoNo
17562350EMBEDDED PACKAGING STRUCTUREDecember 2021August 2025Allow4440YesNo
17549650DISPLAY PANEL AND ELECTRONIC APPARATUS INCLUDING THE SAMEDecember 2021January 2025Abandon3750YesNo
17643402METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTUREDecember 2021December 2023Abandon2440NoNo
17544081SEMICONDUCTOR DEVICE INCLUDING BONDING ENHANCEMENT LAYER AND METHOD OF FORMING THE SAMEDecember 2021January 2026Allow4930YesNo
17533000SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFNovember 2021March 2023Allow1611NoNo
17529871METHOD FOR MANUFACTURING LOGIC DEVICE ISOLATION IN EMBEDDED STORAGE PROCESSNovember 2021April 2023Allow1710NoNo
17529496SEMICONDUCTOR DEVICE WITH CONNECTION STRUCTURE AND METHOD FOR FABRICATING THE SAMENovember 2021February 2023Allow1510NoNo
17529514METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH TAPERING IMPURITY REGIONNovember 2021March 2023Allow1610NoNo
17521881MANUFACTURING METHOD OF SEMICONDUCTOR DEVICENovember 2021May 2025Allow4230NoNo
17609403METHOD FOR EVALUATING PICKUP PERFORMANCE, INTEGRATED DICING/DIE-BONDING FILM, METHOD FOR EVALUATING AND SELECTING INTEGRATED DICING/DIE-BONDING FILM, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICENovember 2021July 2025Allow4420NoNo
17609093A METHOD FOR MANUFACTURING AN ELECTRONIC POWER MODULENovember 2021October 2025Allow4730NoNo
17517406SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICENovember 2021June 2023Allow1920NoNo
17513400STEAM OXIDATION INITIATION FOR HIGH ASPECT RATIO CONFORMAL RADICAL OXIDATIONOctober 2021November 2023Allow2510YesNo
17499853ISOLATION STRUCTURE AND MANUFACTURING METHOD THEREOFOctober 2021January 2024Allow2711NoNo
17495372SEMICONDUCTOR DEVICEOctober 2021October 2023Allow2410NoNo
17492356SILVER NANOPARTICLES SYNTHESIS METHOD FOR LOW TEMPERATURE AND PRESSURE SINTERINGOctober 2021September 2025Allow4852YesNo
17487783LIGHT-EMITTING COMPONENTSeptember 2021June 2023Allow2020NoNo
17487779SEMICONDUCTOR STRUCTURE PREPARATION PROCESS AND SEMICONDUCTOR STRUCTURESeptember 2021March 2025Abandon4230YesNo
17485993A LOW-COST METHOD OF MAKING A HARD MASK FOR HIGH RESOLUTION AND LOW DIMENSIONAL VARIATIONS FOR THE FABRICATION AND MANUFACTURING OF MICRO- AND NANO-DEVICES AND - SYSTEMSSeptember 2021December 2023Allow2710NoNo
17485189METHOD FOR MANUFACTURING FDSOISeptember 2021January 2023Allow1610NoNo
17480434BCD DEVICE LAYOUT AREA DEFINED BY A DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FORMING THE SAMESeptember 2021August 2023Allow2311NoNo
17477629SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR DIES HAVING DIFFERENT LATTICE DIRECTIONS AND METHOD OF FORMING THE SAMESeptember 2021October 2025Allow4941YesNo
17473964DIE BONDING STRUCTURES AND METHOD FOR FORMING THE SAMESeptember 2021September 2023Abandon2511NoNo
17470078LEADFRAME, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICESeptember 2021July 2023Allow2211NoNo
17464299HIGH SENSITIVITY SEMICONDUCTOR DEVICE FOR DETECTING FLUID CHEMICAL SPECIES AND RELATED MANUFACTURING METHODSeptember 2021January 2023Allow1710NoNo
17463131SEMICONDUCTOR MODULE AND SEMICONDUCTOR MODULE MANUFACTURING METHODAugust 2021September 2025Allow4831YesNo
17460971SEMICONDUCTOR MANUFACTURING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEAugust 2021July 2023Allow2320YesNo
17434492BONDED BODY AND METHOD FOR MANUFACTURING SAMEAugust 2021February 2024Allow2910NoNo
17412596MECHANICAL WAFER ALIGNMENT DETECTION FOR BONDING PROCESSAugust 2021February 2023Allow1810NoNo
17412007METHOD OF PRODUCING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICEAugust 2021October 2023Allow2511NoNo
17407576SEMICONDUCTOR STORAGE DEVICEAugust 2021December 2023Allow2810NoNo
17403072METHOD OF PRODUCING ANISOTROPIC CONDUCTIVE FILM AND ANISOTROPIC CONDUCTIVE FILMAugust 2021August 2023Allow2320NoNo
17398613QUANTUM COMPUTING DEVICES WITH AN INCREASED CHANNEL MOBILITYAugust 2021January 2023Allow1810NoNo
17392997METHOD OF 3D LOGIC FABRICATION TO SEQUENTIALLY DECREASE PROCESSING TEMPERATURE AND MAINTAIN MATERIAL THERMAL THRESHOLDSAugust 2021May 2023Allow2110NoNo
17391987SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFAugust 2021September 2023Allow2520NoNo
17390694METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTUREJuly 2021March 2026Allow5530NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner ISAAC, STANETTA D.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
4
Examiner Affirmed
0
(0.0%)
Examiner Reversed
4
(100.0%)
Reversal Percentile
96.2%
Higher than average

What This Means

With a 100.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
24
Allowed After Appeal Filing
13
(54.2%)
Not Allowed After Appeal Filing
11
(45.8%)
Filing Benefit Percentile
86.0%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 54.2% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner ISAAC, STANETTA D - Prosecution Strategy Guide

Executive Summary

Examiner ISAAC, STANETTA D works in Art Unit 2898 and has examined 580 patent applications in our dataset. With an allowance rate of 90.5%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 25 months.

Allowance Patterns

Examiner ISAAC, STANETTA D's allowance rate of 90.5% places them in the 74% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by ISAAC, STANETTA D receive 2.25 office actions before reaching final disposition. This places the examiner in the 63% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by ISAAC, STANETTA D is 25 months. This places the examiner in the 80% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -29.2% benefit to allowance rate for applications examined by ISAAC, STANETTA D. This interview benefit is in the 1% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 32.2% of applications are subsequently allowed. This success rate is in the 68% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 40.6% of cases where such amendments are filed. This entry rate is in the 62% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 163.6% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 91% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 84.0% of appeals filed. This is in the 78% percentile among all examiners. Of these withdrawals, 61.9% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 46.2% are granted (fully or in part). This grant rate is in the 40% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 2.6% of allowed cases (in the 78% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.8% of allowed cases (in the 58% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.