USPTO Art Unit 2824 Prosecution Statistics

Art Unit Information

Art Unit: 2824
Group: 2820
Tech Center: 2800
Total Cases: 25,261
Last Active: December 2024

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
189916313D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYDecember 2024June 2025Allow500NoNo
17766568NON-VOLATILE STORAGE CIRCUITOctober 2024July 2024Allow2820NoNo
18837881CMOS SRAM CELL HAVING TRENCH STRUCTUREAugust 2024January 2025Allow500NoNo
187789783D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A POWER DELIVERY PATHJuly 2024June 2025Allow1100NoNo
18772714CIRCUITS AND METHODS OF MITIGATING HOLD TIME FAILURE OF PIPELINE FOR MEMORY DEVICEJuly 2024May 2025Allow1010NoNo
18771817NON-VOLATILE MEMORY STORED WITH ENCODED DATAJuly 2024February 2025Allow700NoNo
18764906MEMORY SYSTEMJuly 2024June 2025Allow1110NoNo
18763067SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT WORD LINESJuly 2024February 2025Allow700NoNo
18761619MEMORY DEVICE WITH REDUNDANCY FOR PAGE-BASED REPAIRJuly 2024January 2025Allow700NoNo
18757685THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANCE AND METHODS OF FORMING THE SAMEJune 2024January 2025Allow700NoNo
18750979HIGH CAPACITY MEMORY CIRCUIT WITH LOW EFFECTIVE LATENCYJune 2024May 2025Allow1110NoNo
18749098METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLSJune 2024April 2025Allow910NoNo
18748196METHOD FOR PROGRAMMING MEMORYJune 2024May 2025Allow1110NoNo
18743852PAGE BUFFER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAMEJune 2024February 2025Allow800NoNo
18742749TECHNIQUES FOR DETECTING A STATE OF A BUSJune 2024April 2025Allow1010NoNo
18740981CURRENT AND VOLTAGE LIMIT CIRCUITRY FOR RESISTIVE RANDOM ACCESS MEMORY PROGRAMMINGJune 2024March 2025Allow910NoNo
18741201MEMORY INCLUDING METAL RAILS WITH BALANCED LOADINGJune 2024March 2025Allow910NoNo
187387213D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYJune 2024December 2024Allow610NoNo
187389673D MEMORY SEMICONDUCTOR DEVICES AND STRUCTURES WITH MEMORY CELLSJune 2024December 2024Allow610NoNo
18736779BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSIONJune 2024June 2025Allow1310NoNo
18733187DETERMINING OFFSETS FOR MEMORY READ OPERATIONSJune 2024May 2025Allow1110NoNo
18732377MEMORY DEVICE WITH IMPROVED PROGRAM PERFORMANCE AND METHOD OF OPERATING THE SAMEJune 2024April 2025Allow1000NoNo
18677654MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORYMay 2024April 2025Allow1010NoNo
18676385Se-BASED SELECTOR MATERIAL, SELECTOR UNIT AND METHOD FOR PREPARING THE SAMEMay 2024August 2024Allow200NoNo
18671835TRACKING RC TIME CONSTANT BY WORDLINE IN MEMORY DEVICESMay 2024April 2025Allow1100NoNo
18670778MEMORY MODULES INCLUDING A MIRRORING CIRCUIT AND METHODS OF OPERATING THE SAMEMay 2024April 2025Allow1110NoNo
18669140MULTI-STATE PROGRAMMING OF MEMORY CELLSMay 2024April 2025Allow1110NoNo
18666819NON-VOLATILE MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND READ METHOD OF MEMORY SYSTEMMay 2024January 2025Allow800NoNo
18662743DUAL ADDRESS ENCODING FOR LOGICAL-TO-PHYSICAL MAPPINGMay 2024May 2025Allow1210NoNo
18660338Far End Driver for Memory ClockMay 2024March 2025Allow1010NoNo
18653418Multi-Bit Storage Device Using Phase Change MaterialMay 2024December 2024Allow700NoNo
18646587TEMPERATURE EXCEPTION TRACKING IN A TEMPERATURE LOG FOR A MEMORY SYSTEMApril 2024March 2025Allow1110NoNo
18645018NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE MEMORY CELLSApril 2024April 2025Allow1210NoNo
18645184NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE MEMORY CELLSApril 2024December 2024Allow800NoNo
18644840NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE MEMORY CELLSApril 2024February 2025Allow1010NoNo
18638140THREE-DIMENSIONAL STACKABLE FERROELECTRIC RANDOM ACCESS MEMORY DEVICES AND METHODS OF FORMINGApril 2024April 2025Allow1210NoNo
18636901Selective and Dynamic Deployment of Error Correction Code Techniques in Integrated Circuit Memory DevicesApril 2024December 2024Allow800NoNo
18635929MRAM REFERENCE CURRENTApril 2024March 2025Allow1110NoNo
18629735RECOGNITION SYSTEM AND SRAM CELL THEREOFApril 2024May 2025Allow1311NoNo
18625956NON-VOLATILE MEMORY AND OPERATING METHOD THEREOFApril 2024December 2024Allow810NoNo
18622033SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYSMarch 2024November 2024Allow800NoNo
18614763MEMORY DEVICE AND OPERATING METHOD FOR TARGET REFRESH OPERATION BASED ON NUMBER OF ACCESSESMarch 2024February 2025Allow1110NoNo
18615497SENSE AMPLIFIER CIRCUIT AND METHODMarch 2024March 2025Allow1210NoNo
18613361MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD THEREOFMarch 2024October 2024Allow710NoNo
18610420METHOD OF CONTROLLING ROW HAMMER AND A MEMORY DEVICEMarch 2024June 2025Allow1510NoNo
18610993Communication System With Mixed Threshold Voltage TransistorsMarch 2024November 2024Allow800YesNo
18607646BITLINE SENSE AMPLIFIER WITH EQUALIZING TRANSISTOR AND A MEMORY DEVICEMarch 2024June 2025Allow1511YesNo
186054013D MEMORY SEMICONDUCTOR DEVICES AND STRUCTURES WITH MEMORY CELLSMarch 2024May 2024Allow200NoNo
18603373ONE-TIME PROGRAMMABLE MEMORY DEVICEMarch 2024April 2025Allow1320NoNo
18604203CONFIGURABLE MEMORY DIE CAPACITANCEMarch 2024June 2025Allow1510NoNo
18602078CROSS-LAYER RECONFIGURABLE STATIC RANDOM ACCESS MEMORY (SRAM) BASED COMPUTE-IN-MEMORY MACRO AND METHOD FOR EDGE INTELLIGENCEMarch 2024August 2024Allow510NoNo
18600230PHYSICALLY UNCLONABLE FUNCTION CELL AND OPERATION METHOD OF THE SAMEMarch 2024March 2025Allow1200NoNo
18596753NONVOLATILE SEMICONDUCTOR MEMORY INCLUDING A READ OPERATIONMarch 2024June 2025Allow1610NoNo
18595464SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2024January 2025Allow1110NoNo
18594666MEMORY WITH ARTIFICIAL INTELLIGENCE MODEMarch 2024February 2025Allow1210NoNo
18591728SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAMEFebruary 2024September 2024Allow700NoNo
18585184Bit Line Pre-Charge Circuit for Power Management Modes in Multi Bank SRAMFebruary 2024January 2025Allow1110NoNo
18583066POWER MANAGEMENTFebruary 2024March 2025Allow1310NoNo
18581694AREA-EFFICIENT, WIDTH-ADJUSTABLE SIGNALING INTERFACEFebruary 2024January 2025Allow1110NoNo
18581260SENSING SCHEME FOR A MEMORY WITH SHARED SENSE COMPONENTSFebruary 2024May 2025Allow1400NoNo
18443979Sub-Word Line Driver Placement For Memory DeviceFebruary 2024November 2024Allow900YesNo
18442496ANALOG NEUROMORPHIC CIRCUIT IMPLEMENTED USING RESISTIVE MEMORIESFebruary 2024March 2025Allow1310NoNo
18437961FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATESFebruary 2024April 2025Allow1410NoNo
18437549MICROELECTRONIC DEVICES AND RELATED MEMORY DEVICESFebruary 2024April 2025Allow1410NoNo
18436025MEMORY SYSTEM AND OPERATING METHOD OF THE MEMORY SYSTEMFebruary 2024May 2025Allow1610NoNo
18435696METHODS FOR INDEPENDENT MEMORY BANK MAINTENANCE AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAMEFebruary 2024December 2024Allow1110NoNo
18434404MEMORY WITH PARTIAL ARRAY REFRESHFebruary 2024January 2025Allow1200NoNo
18432663FUSE LATCH OF SEMICONDUCTOR DEVICE FOR LATCHING DATA OF A REPAIR FUSE CELLFebruary 2024September 2024Allow700NoNo
18432390APPARATUS AND METHOD FOR HARDWARE METERING USING MEMORY-TYPE CAMOUFLAGED CELLFebruary 2024December 2024Allow1101NoNo
18431361SEMICONDUCTOR STORAGE DEVICE AND CONTROLLERFebruary 2024February 2025Allow1310NoNo
18430136PROCESSING IN MEMORYFebruary 2024May 2025Allow1510NoNo
184292023D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY CELLSJanuary 2024June 2024Allow510NoNo
18426905INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND SEMICONDUCTOR STORAGE DEVICEJanuary 2024August 2024Allow700NoNo
18425619MANAGING THE PROGRAMMING OF AN OPEN TRANSLATION UNITJanuary 2024September 2024Allow810NoNo
18420978COMPACT K-SAT VERIFICATION WITH TCAMSJanuary 2024February 2025Allow1210NoNo
18420688STACKED DRAM DEVICE AND METHOD OF MANUFACTUREJanuary 2024August 2024Allow700NoNo
18420073MEMORY CIRCUIT, SYSTEM AND METHOD FOR RAPID RETRIEVAL OF DATA SETSJanuary 2024August 2024Allow700NoNo
18418779STATIC RANDOM ACCESS MEMORY LAYOUTJanuary 2024March 2025Allow1410NoNo
18418880FERROELECTRIC MEMORY OPERATION BIAS AND POWER DOMAINSJanuary 2024February 2025Allow1310NoNo
18413107RESISTIVE MEMORY DEVICES USING A CARBON-BASED CONDUCTOR LINE AND METHODS FOR FORMING THE SAMEJanuary 2024May 2025Allow1610NoNo
18412635Flash memory controllerJanuary 2024November 2024Allow1010NoNo
18412380MEMORY DEVICE INCLUDING MEMORY CELLS AND EDGE CELLSJanuary 2024November 2024Allow1010NoNo
18411822METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIESJanuary 2024November 2024Allow1010NoNo
18410874SEMICONDUCTOR INTEGRATED CIRCUIT DEVICEJanuary 2024January 2025Allow1210NoNo
18407399MEMORY DEVICE HAVING PHYSICAL UNCLONABLE FUNCTION AND MEMORY SYSTEM INCLUDING THE MEMORY DEVICEJanuary 2024September 2024Allow810NoNo
184070963D MEMORY SEMICONDUCTOR DEVICES AND STRUCTURES WITH MEMORY-LINE PILLARSJanuary 2024March 2024Allow200NoNo
18403916SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICEJanuary 2024August 2024Allow700NoNo
18402647METHOD AND MEMORY DEVICE WITH INCREASED READ AND WRITE MARGINJanuary 2024October 2024Allow1010NoNo
18398145RECOGNITION SYSTEM AND SRAM CELL THEREOFDecember 2023September 2024Allow900NoNo
18399609RESISTIVE MEMORY APPARATUS AND OPERATING METHOD THEREOF AND MEMORY CELL ARRAY THEREOFDecember 2023April 2025Allow1511NoNo
18393820MEMORY WITH ERROR CHECKING AND CORRECTING UNITDecember 2023February 2025Allow1410NoNo
18394660PERFORMING SELECTIVE COPYBACK IN MEMORY DEVICESDecember 2023December 2024Allow1110NoNo
18392487INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TESTDecember 2023October 2024Allow1010YesNo
18545626MEMORY DEVICE WHICH GENERATES IMPROVED WRITE VOLTAGE ACCORDING TO SIZE OF MEMORY CELLDecember 2023November 2024Allow1110NoNo
18545888ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEMDecember 2023January 2025Allow1310NoNo
18541218MEMORY DEVICE, ELECTRONIC DEVICE, AND OPERATION METHOD OF MEMORY DEVICEDecember 2023June 2025Allow1800NoNo
18538722SEMICONDUCTOR STORAGE DEVICEDecember 2023January 2025Allow1310NoNo
18537357MEMORY DEVICE INTERFACE AND METHODDecember 2023November 2024Allow1110NoNo
18535112INTERFACE OF A MEMORY CIRCUITDecember 2023June 2025Allow1810NoNo
18534818NON-VOLATILE MEMORY (NVM) CELL STRUCTURE TO INCREASE RELIABILITYDecember 2023March 2025Allow1510NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2824.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
85
Examiner Affirmed
70
(82.4%)
Examiner Reversed
15
(17.6%)
Reversal Percentile
1.5%
Lower than average

What This Means

With a 17.6% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
270
Allowed After Appeal Filing
59
(21.9%)
Not Allowed After Appeal Filing
211
(78.1%)
Filing Benefit Percentile
8.6%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 21.9% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Art Unit 2824 - Prosecution Statistics Summary

Executive Summary

Art Unit 2824 is part of Group 2820 in Technology Center 2800. This art unit has examined 25,261 patent applications in our dataset, with an overall allowance rate of 93.6%. Applications typically reach final disposition in approximately 19 months.

Comparative Analysis

Art Unit 2824's allowance rate of 93.6% places it in the 94% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2824 receive an average of 0.92 office actions before reaching final disposition (in the 5% percentile). The median prosecution time is 19 months (in the 95% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.