USPTO Examiner BERNSTEIN ALLISON - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
192453493D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A POWER DELIVERY PATHJune 2025March 2026Allow900NoNo
189916313D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYDecember 2024June 2025Allow500NoNo
18837881CMOS SRAM CELL HAVING TRENCH STRUCTUREAugust 2024January 2025Allow500NoNo
187789783D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A POWER DELIVERY PATHJuly 2024June 2025Allow1100NoNo
187387213D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYJune 2024December 2024Allow610NoNo
18735967BIT-ERASABLE EMBEDDED SELECT IN TRENCH MEMORY (ESTM)June 2024March 2026Allow2110NoNo
18676385Se-BASED SELECTOR MATERIAL, SELECTOR UNIT AND METHOD FOR PREPARING THE SAMEMay 2024August 2024Allow200NoNo
18650104MEMORY CELL, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS OF MANUFACTURING THE SAMEApril 2024December 2025Allow2010NoNo
18651335CHALCOGENIDE MEMORY DEVICE COMPOSITIONSApril 2024February 2026Allow2110NoNo
18638140THREE-DIMENSIONAL STACKABLE FERROELECTRIC RANDOM ACCESS MEMORY DEVICES AND METHODS OF FORMINGApril 2024April 2025Allow1210NoNo
18629926ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY CELL AND FORMING METHOD THEREOFApril 2024October 2025Allow1800NoNo
18603373ONE-TIME PROGRAMMABLE MEMORY DEVICEMarch 2024April 2025Allow1320NoNo
18602067MEMORY DEVICE AND METHOD OF FORMING THE SAMEMarch 2024October 2025Allow2021YesNo
18595464SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2024January 2025Allow1110NoNo
18437961FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATESFebruary 2024April 2025Allow1410NoNo
18437549MICROELECTRONIC DEVICES AND RELATED MEMORY DEVICESFebruary 2024April 2025Allow1410NoNo
184292023D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY CELLSJanuary 2024June 2024Allow510NoNo
18410874SEMICONDUCTOR INTEGRATED CIRCUIT DEVICEJanuary 2024January 2025Allow1210NoNo
185273563D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYDecember 2023August 2024Allow810NoNo
18521375INTEGRATED CIRCUIT WITH BACK-SIDE METAL LINE, METHOD OF FABRICATING THE SAME, AND LAYOUT METHODNovember 2023March 2026Allow2810NoNo
18518142SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPESNovember 2023October 2024Allow1110NoNo
185169583D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYNovember 2023April 2024Allow510NoNo
185152553D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC AND MEMORYNovember 2023March 2024Allow400NoNo
183888523D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY CELLSNovember 2023January 2024Allow210NoNo
18498350INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAMEOctober 2023February 2026Allow2700NoNo
18489705MEMORY DEVICE HAVING A SUPPORT STRUCTUREOctober 2023February 2026Allow2800NoNo
18377418SEMICONDUCTOR DEVICE WITH PROGRAMMABLE UNIT AND METHOD FOR FABRICATING THE SAMEOctober 2023August 2024Allow1010NoNo
18285857THREE-DIMENSIONAL 1S1C MEMORY BASED ON RING CAPACITOR AND PREPARATION METHODOctober 2023April 2025Allow1810NoNo
18284612DISPLAY APPARATUS AND METHOD FOR MANUFACTURING DISPLAY APPARATUSSeptember 2023December 2025Allow2700NoNo
18470447ONE-TIME PROGRAMMABLE MEMORY STRUCTURESeptember 2023February 2026Allow2900NoNo
18369552SEMICONDUCTOR MEMORY DEVICESeptember 2023January 2026Allow2800NoNo
18455079MEMORY DEVICE WITH THROUGH-STACK CONTACT VIA STRUCTURES WHICH CONTACT PLURAL STACKS AND METHOD OF MAKING THE SAMEAugust 2023December 2025Allow2700NoNo
18454112INTEGRATED CIRCUIT DEVICEAugust 2023March 2026Allow3110YesNo
18357974INTEGRATION OF FERROELECTRIC MEMORY DEVICES HAVING STACKED ELECTRODES WITH TRANSISTORSAugust 2023July 2024Allow1210NoNo
18233985Memory Device Comprising An Electrically Floating Body TransistorAugust 2023August 2024Allow1210NoNo
18448607Stacked SRAM Cell ArchitectureAugust 2023April 2025Allow2000NoNo
18232362Resistive random access memory structure and manufacturing method thereofAugust 2023January 2026Allow2910NoNo
18365726SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEAugust 2023June 2025Allow2200NoNo
18365850MEMORY DEVICES INCLUDING STRINGS OF MEMORY CELLS AND RELATED SYSTEMSAugust 2023March 2025Allow1900NoNo
18363500SEMICONDUCTOR MEMORY DEVICES WITH ELECTRICALLY ISOLATED STACKED BIT LINES AND METHODS OF MANUFACTUREAugust 2023June 2025Allow2211NoNo
18228282Spacer Stack For Magnetic Tunnel JunctionsJuly 2023December 2024Allow1601NoNo
18228148WAFER-ON-WAFER MEMORY DEVICE ARCHITECTURESJuly 2023February 2026Allow3110YesNo
18360764EMBEDDED MEMORY ADJACENT TO NON-MEMORYJuly 2023October 2024Allow1510NoNo
182271833D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY CELLSJuly 2023October 2023Allow310NoNo
18357838SEMICONDUCTOR MEMORY STRUCTUREJuly 2023March 2025Allow2000NoNo
18224810SEMICONDUCTOR DEVICEJuly 2023February 2026Allow3110NoNo
18354667MEMORY DEVICE AND MANUFACTURING METHOD THEREOFJuly 2023December 2024Allow1701NoNo
18222278SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAMEJuly 2023February 2026Allow3110YesNo
18352612PHASE CHANGE MATERIAL SWITCH DEVICE AND RELATED METHODSJuly 2023October 2025Allow2700NoNo
18352182SEMICONDUCTOR DEVICEJuly 2023June 2024Allow1100NoNo
18351181THREE-DIMENSIONAL MEMORY DEVICE CONTAINING DOPED SOURCE-CHANNEL INTERFACE STRUCTURE AND METHOD OF MAKING THE SAMEJuly 2023January 2026Allow3010NoNo
18350259SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOFJuly 2023October 2025Allow2700NoNo
18219717RESISTIVE SWITCHING DEVICE AND FABRICATION METHOD THEREOFJuly 2023January 2026Allow3010NoNo
18349433SEMICONDUCTOR APPARATUSJuly 2023October 2024Allow1610YesNo
18348521SEMICONDUCTOR DEVICES INCLUDING STACK STRUCTURE HAVING GATE REGION AND INSULATING REGIONJuly 2023July 2024Allow1210NoNo
18348418SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAMEJuly 2023May 2024Allow1000NoNo
18217648MEMORY DEVICE WITH REDUCED THRESHOLD VOLTAGEJuly 2023September 2025Allow2700NoNo
18270243PHASE CHANGE MEMORY UNIT AND PREPARATION METHOD THEREFORJune 2023September 2025Allow2600NoNo
18215280SEMICONDUCTOR MEMORY DEVICEJune 2023February 2026Allow3220YesNo
18342538SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOFJune 2023August 2024Allow1410NoNo
18339821MEMORY DEVICE AND METHOD FOR FABRICATING THE MEMORY DEVICEJune 2023June 2024Allow1210NoNo
18333145MEMORY DEVICE WITH BOTTOM ELECTRODEJune 2023February 2025Allow2020NoNo
18330779SEMICONDUCTOR MEMORY DEVICEJune 2023October 2025Allow2920NoNo
18330258SEMICONDUCTOR STORAGE DEVICEJune 2023June 2024Allow1210NoNo
18326228ONE-TIME-PROGRAMMABLE MEMORY DEVICES AND METHODS FOR FORMING THE SAMEMay 2023March 2026Allow3411NoNo
18321975DEVICE-REGION LAYOUT FOR EMBEDDED FLASHMay 2023April 2024Allow1010YesNo
18320480COMPLEMENTARY FIELD EFFECT TRANSISTOR WITH OBLIQUE CONDUCTIVE THROUGH SUBSTRATE LAYERMay 2023October 2025Allow2901NoNo
18319717THREE-DIMENSIONAL FOLDED STATIC RANDOM-ACCESS MEMORYMay 2023November 2025Allow3010YesNo
18318599FLY BITLINE DESIGN FOR PSEUDO TRIPLE PORT MEMORYMay 2023December 2025Allow3110YesNo
18195657SEMICONDUCTOR DEVICEMay 2023July 2025Allow2700NoNo
18312389MEMORY CELL, 3D MEMORY AND PREPARATION METHOD THEREFOR, AND ELECTRONIC DEVICEMay 2023July 2023Allow200NoNo
18310684METHOD FOR REDUCING PARASITIC CAPACITANCE AND INCREASING PEAK TRANSCONDUCTANCE WHILE MAINTAINING ON-STATE RESISTANCE AND RELATED DEVICESMay 2023December 2025Allow3110NoNo
18140516Integrated Assemblies, and Methods of Forming Integrated AssembliesApril 2023July 2024Allow1510YesNo
18306289MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAMEApril 2023December 2025Allow3110NoNo
18138625MAGNETIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOFApril 2023April 2024Allow1210NoNo
18306231SEMICONDUCTOR DEVICEApril 2023November 2025Allow3110NoNo
18304513PHASE CHANGE MATERIAL (PCM) SWITCH WITH VARIABLY SPACED SPREADER LAYER STRUCTURES AND METHODS OF FORMING THE SAMEApril 2023August 2025Allow2800NoNo
18304059BARRIER LAYER FOR CONTACT STRUCTURES OF SEMICONDUCTOR DEVICESApril 2023July 2025Allow2700NoNo
18134041ONE-TIME PROGRAMMABLE MEMORY CELLApril 2023July 2025Allow2700NoNo
18299403VARIABLE RESISTANCE MEMORY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAMEApril 2023July 2025Allow2700NoNo
18299608CHALCOGENIDE MATERIAL AND SEMICONDUCTOR DEVICE INCLUDING THE SAMEApril 2023October 2025Allow3010NoNo
181250533D SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDINGMarch 2023June 2023Allow310NoNo
18187151METAL-DOPED SWITCHING DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAMEMarch 2023October 2025Allow3110NoNo
18123992STATIC RANDOM ACCESS MEMORY AND METHOD FOR FABRICATING THE SAMEMarch 2023July 2025Allow2700NoNo
18186679SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICEMarch 2023January 2026Allow3420YesNo
18178346SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEMarch 2023September 2025Allow3001NoNo
18178103SPIN ORBIT TORQUE MAGNETIC MEMORY DEVICES, OPERATING METHODS THEREOF, AND ELECTRONIC APPARATUSES INCLUDING THE MAGNETIC MEMORY DEVICESMarch 2023April 2025Allow2511NoNo
18171858THREE-DIMENSIONAL (3D) SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAMEFebruary 2023September 2025Allow3110YesNo
18108117SELF-SELECTING MEMORY DEVICESFebruary 2023June 2025Allow2800NoNo
18166323Flexible Memory Systems and Related MethodsFebruary 2023July 2025Allow2901NoNo
18165296INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAMEFebruary 2023October 2025Allow3310NoNo
18165011ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND METHOD FOR MANUFACTURING SAMEFebruary 2023November 2025Allow3311NoNo
18104890VARIABLE RESISTANCE MEMORY DEVICEFebruary 2023August 2025Allow3110YesNo
18097592SEMICONDUCTOR DEVICEJanuary 2023April 2024Allow1510NoNo
18151682THREE-DIMENSIONAL STACKABLE FERROELECTRIC RANDOM ACCESS MEMORY DEVICES AND METHODS OF FORMINGJanuary 2023January 2024Allow1210NoNo
18152122MEMORY DEVICEJanuary 2023December 2025Allow3520NoNo
18150633SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJanuary 2023July 2025Allow3101NoNo
18149442Three-Dimensional Memory Device and MethodJanuary 2023October 2024Allow2230NoNo
180927273D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORYJanuary 2023March 2023Allow200NoNo
18091432SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAMEDecember 2022November 2024Abandon2210NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner BERNSTEIN, ALLISON.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
13
Examiner Affirmed
10
(76.9%)
Examiner Reversed
3
(23.1%)
Reversal Percentile
36.5%
Lower than average

What This Means

With a 23.1% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
38
Allowed After Appeal Filing
4
(10.5%)
Not Allowed After Appeal Filing
34
(89.5%)
Filing Benefit Percentile
13.9%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 10.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner BERNSTEIN, ALLISON - Prosecution Strategy Guide

Executive Summary

Examiner BERNSTEIN, ALLISON works in Art Unit 2824 and has examined 1,070 patent applications in our dataset. With an allowance rate of 82.9%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 23 months.

Allowance Patterns

Examiner BERNSTEIN, ALLISON's allowance rate of 82.9% places them in the 56% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by BERNSTEIN, ALLISON receive 1.65 office actions before reaching final disposition. This places the examiner in the 33% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by BERNSTEIN, ALLISON is 23 months. This places the examiner in the 86% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -1.3% benefit to allowance rate for applications examined by BERNSTEIN, ALLISON. This interview benefit is in the 10% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 22.4% of applications are subsequently allowed. This success rate is in the 28% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 46.4% of cases where such amendments are filed. This entry rate is in the 70% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 50.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 44% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 61.8% of appeals filed. This is in the 39% percentile among all examiners. Of these withdrawals, 47.6% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 35.3% are granted (fully or in part). This grant rate is in the 23% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 4.4% of allowed cases (in the 84% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 4.3% of allowed cases (in the 78% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.