USPTO Examiner NGUYEN VAN THU T - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18583066POWER MANAGEMENTFebruary 2024March 2025Allow1310NoNo
18459418MEMORY DEVICE INCLUDING ROW-HAMMER TRACKING CIRCUIT AND OPERATING METHOD THEREOFSeptember 2023June 2025Allow2200NoNo
18446946SEMICONDUCTOR APPARATUS INCLUDING A PLURALITY OF CLOCK PATHS AND A SEMICONDUCTOR SYSTEM USING THE SAMEAugust 2023May 2025Allow2100NoNo
18346359NOISE REDUCTION IN SENSE AMPLIFIERS FOR NON-VOLATILE MEMORYJuly 2023March 2025Allow2000YesNo
18337949METHOD TO ACCESS FIBONACCI ANYONS FOR TOPOLOGICIAL QUANTUM COMPUTATION IN A CORRELATED TWO-DIMENSIONAL ELECTRON SYSTEMJune 2023June 2025Allow2410NoNo
18211802MEMORY READ CALIBRATION BASED ON MEMORY DEVICE-ORIGINATED METRICS CHARACTERIZING VOLTAGE DISTRIBUTIONSJune 2023May 2025Allow2310YesNo
18141090MEMORY DEVICE OF NON-VOLATILE MEMORY CELLSApril 2023May 2025Allow2520YesNo
18135697COMMUNICATING PRINT COMPONENTApril 2023October 2024Allow1810NoNo
18133700LOW LATENCY MEMORY ACCESSApril 2023March 2025Allow2411NoNo
18128463SINGLE-LEVEL CELL PROGRAM-VERIFY, LATCH-LIMITED DATA RECOVERYMarch 2023February 2025Allow2310YesNo
18192938MEMORY DEVICE FOR PERFORMING READ PROTECTION OPERATION OF LIMITING READ OPERATION AND METHOD OF OPERATING THE SAMEMarch 2023April 2025Allow2410NoNo
18125279CORRECTIVE READS IMPLEMENTING INCREMENTAL READS WITH RESPECT TO ADJACENT WORDLINESMarch 2023June 2025Allow2720YesNo
18124489REDUCING SPURIOUS WRITE OPERATIONS IN A MEMORY DEVICEMarch 2023January 2025Allow2210YesNo
18123418SWITCHING OF PERPENDICULARLY MAGNETIZED NANOMAGNETS WITH SPIN-ORBIT TORQUES IN THE ABSENCE OF EXTERNAL MAGNETIC FIELDSMarch 2023November 2024Abandon2010NoNo
18099744SIGNAL INPUT BUFFER FOR EFFECTIVELY CALIBRATING OFFSETJanuary 2023December 2024Allow2310NoNo
18088046NONVOLATILE MEMORY DEVICE AND OPERATION METHOD OF DETECTING DEFECTIVE MEMORY CELLSDecember 2022July 2024Allow1910YesNo
18076537BIAS VOLTAGE SCHEMES DURING PRE-PROGRAMMING AND PROGRAMMING PHASESDecember 2022September 2024Allow2220NoNo
18071026MEMORY DEVICE AND PROGRAM OPERATION THEREOF TO REDUCE CAPACITIVE COUPLINGNovember 2022February 2025Allow2620YesNo
17990723WRITE METHOD FOR DIFFERENTIAL RESISTIVE MEMORIESNovember 2022July 2024Allow1900NoNo
17970460MEMORY DEVICES AND SYSTEMS WITH PARALLEL IMPEDANCE ADJUSTMENT CIRCUITRY AND METHODS FOR OPERATING THE SAMEOctober 2022April 2025Allow3030NoNo
18047614MEMORY DEVICE, MEMORY SYSTEM, AND OPERATION METHOD OF MEMORY DEVICEOctober 2022September 2024Allow2320YesNo
17961353MEMORY DEVICE USING DYNAMIC FLASH MEMORY CELLSOctober 2022May 2025Allow3130NoNo
17914845SEMICONDUCTOR DEVICE USING TRANSISTORS HAVING LOW OFF-STATE CURRENTSeptember 2022May 2024Allow2010NoNo
17940945Weight Calibration Check for Integrated Circuit Devices having Analog Inference CapabilitySeptember 2022May 2024Allow2000NoNo
17939748DUAL-WAY SENSING SCHEME FOR BETTER NEIGHBORING WORD-LINE INTERFERENCESeptember 2022June 2025Allow3430YesNo
17903061ANTI-FUSE PROGRAMMING CONTROL CIRCUIT BASED ON MASTER-SLAVE CHARGE PUMP STRUCTURESeptember 2022June 2024Allow2110NoNo
17898841VOLTAGE GENERATION CIRCUITAugust 2022August 2024Allow2410NoNo
17898386NAND IO BANDWIDTH INCREASEAugust 2022February 2025Allow2921YesNo
17817408MEMORY DEVICE AND PROGRAM METHOD OF GROUND SELECT TRANSISTORSAugust 2022August 2024Allow2511YesNo
17881012SEMICONDUCTOR MEMORY DEVICE, AND METHOD OPERATING BASED ON STATUS CHECKERAugust 2022October 2024Allow2711NoNo
17816836MEMORY SYSTEM WITH VERIFY OPERATIONS OF ODD AND EVEN WORD LINESAugust 2022September 2024Allow2620NoNo
17874298MEMORY DEVICE COMPRISING HEATER OF DIFFERENT HEAT CONDUCTING MATERIALS AND PROGRAMMING METHOD THEREOFJuly 2022September 2024Allow2510NoNo
17874100Non-Volatile Memory Power Cycle Protection MechanismJuly 2022March 2025Allow3230YesNo
17872882INCREASED PRECISION ANALOG CONTENT ADDRESSABLE MEMORIESJuly 2022August 2024Allow2431NoNo
17867008MEMORY DEVICE INCLUDING INTERFACE CIRCUIT AND METHOD OF OPERATING THE SAMEJuly 2022February 2024Allow1910YesNo
17812122NON-VOLATILE MEMORY DEVICE READABLE ONLY A PREDETERMINED NUMBER OF TIMESJuly 2022July 2024Allow2420NoNo
17862917Analog Signals Monitoring for Functional SafetyJuly 2022July 2024Allow2420NoNo
17811341METHOD OF READING A MULTI-LEVEL RRAMJuly 2022February 2025Abandon3120NoNo
17856073Storage System and Method for Proactive Die Retirement by Fatal Wordline Leakage DetectionJuly 2022January 2025Allow3140YesNo
17855743MEMORY DEVICEJune 2022March 2024Allow2110NoNo
17850499READ CLOCK START AND STOP FOR SYNCHRONOUS MEMORIESJune 2022February 2024Allow2020NoNo
17807027MEMORY CIRCUIT, DATA TRANSMISSION CIRCUIT, AND MEMORYJune 2022November 2024Abandon2921NoNo
17806073MEMORY WITH STRUCTURAL LAYOUTJune 2022January 2025Abandon3120NoNo
17783118INTEGRATED COUNTER IN MEMORY DEVICEJune 2022October 2023Allow1720NoNo
17833466FAST BIT ERASE FOR UPPER TAIL TIGHTENING OF THRESHOLD VOLTAGE DISTRIBUTIONSJune 2022December 2023Allow1800NoNo
17824350METHOD TO OPTIMIZE FIRST READ VERSUS SECOND READ MARGIN BY SWITCHING BOOST TIMINGMay 2022March 2024Allow2210NoNo
17824143DUMMY CELL RESISTANCE TUNING IN NAND STRINGSMay 2022January 2024Allow2010YesNo
17748866ON-THE-FLY PROGRAMMING AND VERIFYING METHOD FOR MEMORY CELLS BASED ON COUNTERS AND ECC FEEDBACKMay 2022May 2023Allow1210NoNo
17748357BIT LINE SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAMEMay 2022March 2024Allow2201NoNo
17740429MEMORY CELL GROUP READ WITH COMPENSATION FOR DIFFERENT PROGRAMMING SPEEDSMay 2022January 2024Allow2120YesNo
17738126POWER MANAGEMENTMay 2022November 2023Allow1800NoNo
17662178DISTRIBUTED PHASED SRAM REPAIR FOR SYSTEMS ON A CHIPMay 2022December 2023Allow1910YesNo
17661321MEMORY STRUCTURE AND MEMORY LAYOUTApril 2022October 2024Abandon2920NoNo
17773255SENSE AMPLIFICATION CIRCUIT AND DATA READING METHODApril 2022December 2024Abandon3220NoNo
17722805SEMICONDUCTOR DEVICE WITH ADJUSTMENT OF PHASE OF DATA SIGNAL AND CLOCK SIGNALS, AND MEMORY SYSTEM INCLUDING THE SAMEApril 2022September 2024Allow2930YesNo
17659325SIGNAL MASKING CIRCUIT AND SEMICONDUCTOR MEMORYApril 2022August 2023Allow1610NoNo
17718796MEMORY CONTROL CIRCUIT, INFORMATION PROCESSING SYSTEM, AND MEMORY CONTROL METHODApril 2022April 2023Allow1300NoNo
17718755SIGNED AND BINARY WEIGHTED COMPUTATION FOR AN IN-MEMORY COMPUTATION SYSTEMApril 2022September 2024Allow2921NoNo
17718200METHODS FOR OPTIMIZING SEMICONDUCTOR DEVICE PLACEMENT ON A SUBSTRATE FOR IMPROVED PERFORMANCE, AND ASSOCIATED SYSTEMS AND METHODSApril 2022November 2023Allow1911NoNo
17716740READING A MULTI-LEVEL MEMORY CELLApril 2022January 2024Allow2130NoNo
17716972INTELLIGENT MEMORY DEVICE TEST RACKApril 2022July 2024Allow2740YesNo
17710621SEMICONDUCTOR MEMORY DEVICE AND METHOD OF PERFOMRING A MULTI-LEVEL SENSING OPERATIONMarch 2022September 2024Allow3030YesNo
17705469SENSING MODULE, MEMORY DEVICE, AND SENSING METHOD APPLIED TO IDENTIFY UN-PROGRAMMED/PROGRAMMED STATE OF NON-VOLATILE MEMORY CELLMarch 2022April 2024Allow2520YesNo
17692049SEMICONDUCTOR DEVICE HAVING REDUNDANCY WORD LINESMarch 2022May 2023Allow1401NoNo
17682064PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICESFebruary 2022April 2024Allow2520YesNo
17680042GENERATING PATTERNS FOR MEMORY THRESHOLD VOLTAGE DIFFERENCEFebruary 2022January 2024Allow2210YesNo
17674132Managing Page Buffer Circuits in Memory DevicesFebruary 2022October 2023Allow2010YesNo
17670892ADDRESS CONTROL CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAMEFebruary 2022April 2024Abandon2620YesNo
17668760PSEUDO DUAL PORT MEMORY DEVICESFebruary 2022October 2023Allow2111YesNo
17634370HIERARCHICAL BANK GROUP TIMINGFebruary 2022November 2024Allow3341NoNo
17631156Device for Data Storage and Processing, and Method ThereofJanuary 2022May 2024Abandon2710NoNo
17581882AMPLIFICATION-BASED READ DISTURB INFORMATION DETERMINATION SYSTEMJanuary 2022March 2023Allow1400NoNo
17580862Deep Learning Neural Network Classifier Using Non-volatile Memory ArrayJanuary 2022March 2025Allow3850NoNo
17581445APPARATUS, MEMORY DEVICE, AND METHOD REDUCING CLOCK TRAINING TIMEJanuary 2022March 2023Allow1300NoNo
17580702SEMICONDUCTOR CHIP AND VEHICLE COMPRISING THE SAMEJanuary 2022July 2023Allow1810YesNo
17648403PROGRAMMABLE COLUMN ACCESSJanuary 2022August 2024Allow3140YesNo
17574629SEMICONDUCTOR STRUCTURE AND ENDURANCE TEST METHOD USING THE SAMEJanuary 2022November 2023Allow2211NoNo
17565137DIGITAL PHASE CHANGE MEMORY (PCM) ARRAY FOR ANALOG COMPUTINGDecember 2021April 2025Allow3900NoNo
17555728TWO-PART PROGRAMMING OF MEMORY CELLSDecember 2021November 2023Allow2330NoNo
17618250METHOD FOR DETERMINING A MANUFACTURING PARAMETER OF A RESISTIVE RANDOM ACCESS MEMORY CELLDecember 2021October 2024Allow3430YesNo
17539923Single Event Effect Mitigation with Smart-RedundancyDecember 2021July 2024Allow3131YesNo
17455696Dual SLC/QLC Programming and Resource ReleasingNovember 2021August 2023Allow2130YesNo
17520276MEMORY CONTROLLER, MEMORY DEVICE AND MEMORY SYSTEM HAVING IMPROVED THRESHOLD VOLTAGE DISTRIBUTION CHARACTERISTICS AND RELATED OPERATING METHODSNovember 2021August 2023Allow2211YesNo
17511738OPERATING METHOD OF STORAGE CONTROLLER USING COUNT VALUE OF DIRECT MEMORY ACCESS, STORAGE DEVICE INCLUDING STORAGE CONTROLLER, AND OPERATING METHOD OF STORAGE DEVICEOctober 2021July 2024Abandon3320YesNo
17499571MITIGATING EDGE LAYER EFFECT IN PARTIALLY WRITTEN BLOCKSOctober 2021August 2023Allow2311NoNo
17498832NONVOLATILE MEMORY DEVICE INCLUDING ARTIFICIAL NEURAL NETWORK, MEMORY SYSTEM INCLUDING SAME, AND OPERATING METHOD OF NONVOLATILE MEMORY DEVICE INCLUDING ARTIFICIAL NEURAL NETWORKOctober 2021May 2023Allow1910YesNo
17497931Multibit Memory Device and Method of Operating the SameOctober 2021March 2024Allow2930NoNo
17449297APPARATUSES AND METHODS FOR BAD ROW MODESeptember 2021October 2023Allow2530YesNo
17473615PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRYSeptember 2021November 2024Abandon3841YesNo
17470579MEMORY WITH SWAP MODESeptember 2021May 2023Allow2021YesNo
17467968STORAGE DEVICE FOR PERFORMING RELIABILITY CHECK BY USING ERROR CORRECTION CODE (ECC) DATASeptember 2021June 2023Allow2120YesNo
17467878MEMORY TEST CIRCUIT AND DEVICE WAFERSeptember 2021September 2022Allow1300NoNo
17463937BIST FOR PERFORMING PARALLEL AND SERIAL TEST ON MEMORIESSeptember 2021April 2023Allow1911NoNo
17461064LOW LATENCY MEMORY ACCESSAugust 2021January 2023Allow1710NoNo
17461749CONTROLLER CONTROLLING SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE CONTROLLERAugust 2021July 2023Abandon2310NoNo
17459807STORAGE DEVICEAugust 2021October 2022Allow1400NoNo
17409915MEMORY DEVICES OPERATING ON DIFFERENT STATES OF CLOCK SIGNALAugust 2021July 2023Allow2310NoNo
17445605METHOD FOR EVALUATING PERFORMANCE OF INTERFACE CIRCUIT AND RELATED DEVICEAugust 2021September 2024Abandon3640NoNo
17403832MEMORY MODULE WITH DATA BUFFERINGAugust 2021September 2024Allow3760YesNo
17388048Positioning read thresholds in a nonvolatile memory based on successful decodingJuly 2021November 2022Allow1610NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner NGUYEN, VAN THU T.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
14
Examiner Affirmed
11
(78.6%)
Examiner Reversed
3
(21.4%)
Reversal Percentile
33.6%
Lower than average

What This Means

With a 21.4% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
37
Allowed After Appeal Filing
5
(13.5%)
Not Allowed After Appeal Filing
32
(86.5%)
Filing Benefit Percentile
13.9%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 13.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner NGUYEN, VAN THU T - Prosecution Strategy Guide

Executive Summary

Examiner NGUYEN, VAN THU T works in Art Unit 2824 and has examined 1,418 patent applications in our dataset. With an allowance rate of 87.2%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 22 months.

Allowance Patterns

Examiner NGUYEN, VAN THU T's allowance rate of 87.2% places them in the 62% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by NGUYEN, VAN THU T receive 1.53 office actions before reaching final disposition. This places the examiner in the 38% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by NGUYEN, VAN THU T is 22 months. This places the examiner in the 81% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +1.2% benefit to allowance rate for applications examined by NGUYEN, VAN THU T. This interview benefit is in the 16% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 29.9% of applications are subsequently allowed. This success rate is in the 49% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 42.8% of cases where such amendments are filed. This entry rate is in the 58% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 50.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 42% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 60.0% of appeals filed. This is in the 31% percentile among all examiners. Of these withdrawals, 47.6% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 35.1% are granted (fully or in part). This grant rate is in the 30% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 7.6% of allowed cases (in the 94% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.5% of allowed cases (in the 49% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.