USPTO Examiner BEGUM SULTANA - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18788725WORD LINE BOOSTER CIRCUIT AND METHODJuly 2024February 2026Allow1800NoNo
18744776MEMORY DEVICE WITH HIGH CONTENT DENSITY AND ENCODING METHOD THEREOFJune 2024January 2026Allow1900NoNo
18740400MEMORY DEVICE HAVING NON-UNIFORM REFRESHJune 2024December 2025Allow1820NoNo
18735715RESISTIVE MEMORY DEVICE WITH PROTRUSION COVERED WITH RESISTANCE CHANGING ELEMENT AND METHOD FOR MANUFACTURING THE SAMEJune 2024July 2025Allow1310NoNo
18709583SEMICONDUCTOR CIRCUITMay 2024December 2025Allow1900NoNo
18662945LEVEL-BASED DATA REFRESH IN A MEMORY SUB-SYSTEMMay 2024November 2025Allow1800NoNo
18660338Far End Driver for Memory ClockMay 2024March 2025Allow1010NoNo
18635370MEMORY DEVICE AND OPERATION METHOD WITH OPTIMIZED READ LEVELApril 2024July 2025Allow1520YesNo
18614763MEMORY DEVICE AND OPERATING METHOD FOR TARGET REFRESH OPERATION BASED ON NUMBER OF ACCESSESMarch 2024February 2025Allow1110NoNo
18610993Communication System With Mixed Threshold Voltage TransistorsMarch 2024November 2024Allow800YesNo
18607646BITLINE SENSE AMPLIFIER WITH EQUALIZING TRANSISTOR AND A MEMORY DEVICEMarch 2024June 2025Allow1511YesNo
18595065STORAGE DEVICE AND DRIVING METHOD OF STORAGE DEVICE BASED ON ADDRESS CONVERSIONMarch 2024January 2026Allow2210NoNo
18591904LOW ERROR RATE READ OPERATION IN MULTI-MODULE ARRAYSFebruary 2024January 2026Allow2310YesNo
18583267APPARATUS OPERATING IN GEARDOWN MODEFebruary 2024August 2025Allow1800NoNo
18436422POWER GATING CIRCUIT WITH MEMORY PRECHARGE SUPPORTFebruary 2024November 2025Allow2110NoNo
18432663FUSE LATCH OF SEMICONDUCTOR DEVICE FOR LATCHING DATA OF A REPAIR FUSE CELLFebruary 2024September 2024Allow700NoNo
18419959RECEIVER, OPERATION METHOD THEREOF, AND MEMORY DEVICEJanuary 2024September 2025Allow2000NoNo
18415252MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH THE MEMORY DEVICEJanuary 2024November 2025Allow2210YesNo
18408608SEMICONDUCTOR MEMORY DEVICE WITH SENSE AMPLIFIER THAT OPERATES FOR TWO DIFFERENT VOLTAGE RANGE AND WRITING METHOD THEREOFJanuary 2024January 2026Allow2410NoNo
18403916SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICEJanuary 2024August 2024Allow700NoNo
18402647METHOD AND MEMORY DEVICE WITH INCREASED READ AND WRITE MARGINJanuary 2024October 2024Allow1010NoNo
18397984APPARATUSES AND METHODS FOR A MULTI-BIT DUTY CYCLE MONITORDecember 2023November 2025Allow2310NoNo
18545626MEMORY DEVICE WHICH GENERATES IMPROVED WRITE VOLTAGE ACCORDING TO SIZE OF MEMORY CELLDecember 2023November 2024Allow1110NoNo
18528451WORD LINE CHARGE INTEGRATIONDecember 2023November 2025Allow2310NoNo
18524136SINGLE-LOOP MEMORY DEVICE, DOUBLE-LOOP MEMORY DEVICE, AND ZQ CALIBRATION METHODNovember 2023October 2025Allow2210NoNo
18525403REPAIR TECHNIQUES FOR COUPLED MEMORY DIESNovember 2023June 2025Allow1900NoNo
18511440System Error Correction Code (ECC) Circuitry RoutingNovember 2023February 2026Allow2710YesNo
18508554EVEN/ODD WORD LINE DRIVING IN 3D MEMORYNovember 2023February 2026Allow2710NoNo
18509088TEMPERATURE-COMPENSATED TIME ESTIMATE FOR A BLOCK TO REACH A UNIFORM CHARGE LOSS STATENovember 2023December 2024Allow1310NoNo
18385256DETERMINATION OF A BIAS VOLTAGE TO APPLY TO ONE OR MORE MEMORY CELLSOctober 2023October 2025Allow2420NoNo
18385281DETERMINATION OF A BIAS VOLTAGE BY APPLYING A SERIES OF INCREASING CURRENTS TO BIT LINE OF MEMORY CELL IN A NEURAL NETWORKOctober 2023January 2026Allow2711NoNo
18384249MEMORY DEVICE AND MEMORY SYSTEM FOR PERFORMING RESISTOR OFFSET CALIBRATION TRAININGOctober 2023September 2025Allow2310YesNo
18490240LOW DROPOUT REGULATOR, CLOCK GENERATING CIRCUIT, AND MEMORY DEVICEOctober 2023May 2025Allow1800NoNo
18477421TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS MEMORYSeptember 2023April 2025Allow1900NoNo
18475246CALIBRATION APPARATUS AND CALIBRATION METHOD OF MEMORY DEVICE WITH STRONG-ARM COMPARATORSeptember 2023September 2025Allow2410YesNo
18474214CIRCUIT WITH LOGICAL FUNCTION OF COMPUTING-IN-MEMORY, MEMORY DEVICE, AND METHOD THEREOFSeptember 2023July 2025Allow2200NoNo
18371308ENHANCED VALLEY TRACKING WITH TRIM SETTING UPDATES IN A MEMORY DEVICESeptember 2023February 2026Allow2921NoNo
18368907MEMORY DEVICE AND OPERATING METHOD WITH TEMPERATURE COMPENSATION CIRCUITSeptember 2023February 2026Allow2920YesNo
18368158CONDUCTANCE MODULATION IN COMPUTATIONAL MEMORYSeptember 2023July 2025Allow2310YesNo
18462024INITIAL SETTING DEVICE OF SEMICONDUCTOR MEMORY TO DETERMINE VALID SETTINGSeptember 2023January 2026Allow2930NoNo
18242155AUTOMATED VOLTAGE DEMARCATION (VDM) ADJUSTMENT FOR MEMORY DEVICESeptember 2023October 2024Allow1310NoNo
18459461CONTENT ADDRESSABLE MEMORY DEVICE, CONTENT ADDRESSABLE MEMORY CELL AND METHOD FOR SINGLE-BIT MULTI-LEVEL DATA SEARCHING AND COMPARINGSeptember 2023June 2024Allow910NoNo
18454104REFRESH ADDRESS COUNTING CIRCUIT AND METHOD, REFRESH ADDRESS READ-WRITE CIRCUIT AND ELECTRONIC DEVICEAugust 2023September 2025Allow2520YesNo
18452518COUNTING CONTROL CIRCUIT , METHOD FOR COUNTING CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY WITH COUNTING CONTROL CIRCUITAugust 2023August 2025Allow2410NoNo
18451988MEMORY REFRESH WITH NEGATIVE VOLTAGE GENERATORAugust 2023November 2025Allow2710NoNo
18449060SIGNAL SAMPLING CIRCUIT WITH COMMANDS/ADDRESS SIGNAL DIVIDED INTO ODD AND EVEN SIGNALS AND SEMICONDUCTOR MEMORYAugust 2023July 2025Allow2310NoNo
18232940MEMORY DEVICE AND OPERATING METHOD WITH MECHANISM TO DETERMINE VICTIM ROWS FOR REFRESHINGAugust 2023February 2025Allow1910NoNo
18448340CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROLAugust 2023June 2025Allow2210NoNo
18232768CIRCUITS AND METHODS FOR COMPENSATING A MISMATCH IN A SENSE AMPLIFIERAugust 2023April 2024Allow810NoNo
18230371CHANNEL PRE-CHARGE PROCESS FOR MEMORY DEVICES USING HOLE PRE-CHARGE OPERATIONAugust 2023August 2025Allow2410NoNo
18364026MEMORY DEVICE AND ZQ CALIBRATION METHODAugust 2023March 2025Allow1910NoNo
18364060MEMORY WITH ARRAYS OF SENSE AMPLIFIERS AND TWO ERROR CHECKING AND CORRECTION (ECC) MODULESAugust 2023July 2025Allow2310NoNo
18362978APPARATUS AND METHOD FOR CORRECTING AN ERROR IN DATA TRANSMISSION OF A DATA PROCESSING SYSTEMAugust 2023June 2024Allow1110NoNo
18361523INTEGRATED CIRCUIT WITH ASYMMETRIC ARRANGEMENTS OF MEMORY ARRAYSJuly 2023September 2025Allow2610NoNo
18227139EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICESJuly 2023August 2025Allow2410YesNo
18355352APPARATUS AND METHOD FOR SELECTIVELY REDUCING CHARGE PUMP SPEED DURING ERASE OPERATIONSJuly 2023July 2025Allow2410YesNo
18354399WORD LINE BOOSTER CIRCUIT AND METHODJuly 2023June 2024Allow1110NoNo
18343007ADAPTIVE REFRESH RATE GENERATORJune 2023October 2025Allow2711NoNo
18341607SEMICONDUCTOR DEVICE FOR DETECTING DEFECT IN WORD LINE DRIVERJune 2023November 2025Allow2911NoNo
18334962VOLTAGE SUPPLY STRUCTURE FOR MEMORY CELL CAPABLE OF SECURING AREA MARGIN, SEMICONDUCTOR APPARATUS INCLUDING THE SAME, AND OPERATING METHOD OF THE SEMICONDUCTOR APPARATUSJune 2023May 2025Allow2410NoNo
18332325MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD OF OPERATING THE SAMEJune 2023November 2024Allow1701NoNo
18331012STACKED INTEGRATED CIRCUITJune 2023August 2025Allow2620NoNo
18325698SYSTEM AND METHOD FOR COORDINATED MOTION AMONG HETEROGENEOUS DEVICESMay 2023June 2025Allow2410NoNo
18324164SEMICONDUCTOR DEVICE AND OPERATING METHOD WITH PAGE BUFFER INCLUDING LATCHESMay 2023March 2025Allow2210YesNo
18322409INTERNAL VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SAMEMay 2023May 2024Allow1210YesNo
18310872Runtime Memory Services in Physical LayerMay 2023March 2025Allow2220YesNo
18295087MEMORY SYSTEM FOR CONTROLLING HETEROGENEOUS CLOCK SIGNAL DELAY MODES, METHOD OF OPERATING THE MEMORY SYSTEM, AND MEMORY CONTROLLERApril 2023March 2025Allow2410NoNo
18025399MEMORY PACKAGED CHIP AND SIGNAL PROCESSING METHOD THEREFORMarch 2023March 2025Allow2410NoNo
18179976SEMICONDUCTOR MEMORY DEVICE WITH PLURALITY OF ARRAYSMarch 2023May 2025Allow2720YesNo
18179265MEMORY DEVICE WITH MEMORY ARRAY CONNECTED TO CIRCUITS IN DIFFERENT STACKED SUBSTRATESMarch 2023June 2025Allow2720NoNo
18177756MEMORY DEVICE AND MEMORY SYSTEM WITH TABLE TO DETERMINE REFRESH TIMINGMarch 2023July 2025Allow2930YesNo
18177704SEMICONDUCTOR MEMORY DEVICEMarch 2023September 2024Allow1900NoNo
18114449ULTRA-LOW POWER, HIGH SPEED POLY FUSE EPROMFebruary 2023February 2025Allow2310NoNo
18173472PROTECTION OF AN INTEGRATED CIRCUITFebruary 2023October 2024Allow2000NoNo
18172340MEMORY WITH CAPABILITY TO DETECT ROWS THAT ARE PRONE TO DATA LOSS, MEMORY SYSTEM AND OPERATION METHOD OF MEMORYFebruary 2023November 2023Allow810YesNo
18171024VOLTAGE GENERATION CIRCUIT FOR MEMORY DEVICE WITH SERIES CONNECTED RESISTORSFebruary 2023January 2025Allow2310NoNo
18169167MEMORY AND METHOD OF OPERATION WITH DUMMY AND LOADED ROUTEFebruary 2023February 2025Allow2410NoNo
18109234MEMORY AND MEMORY SYSTEM WITH BOTH LONG AND SHORT SUB WORD LINES CONNECTED TO SAME ROWFebruary 2023May 2025Allow2721NoNo
18163521MEMORY SYSTEM WITH MULTIPLE WIRING BOARDS WITH MULTIPLE PROJECTING PARTS AND RECESSED PARTSFebruary 2023October 2024Allow2100NoNo
18155547LATCH TYPE SENSE AMPLIFIER FOR TESTINGJanuary 2023May 2025Allow2711NoNo
18153420WORD LINE DRIVER, WORD LINE DRIVER ARRAY, AND SEMICONDUCTOR STRUCTUREJanuary 2023February 2025Allow2510NoNo
18153843MEMORY DEVICE HAVING MULTIPLE SUBBLOCKS, OPERATING METHOD THEREOF, AND MEMORY SYSTEMJanuary 2023September 2025Allow3230YesNo
18152945CALIBRATION CIRCUIT AND METHOD WITH REFERENCE VOLTAGE GENERATOR AND COMPARATORJanuary 2023November 2024Allow2310NoNo
18005101SYMMETRIC MEMORY CELL AND BNN CIRCUITJanuary 2023November 2024Allow2310NoNo
18149842DIGITAL VERIFY FAILBIT COUNT (VFC) CIRCUITJanuary 2023February 2025Allow2511NoNo
18090142MEMORY AND CONTROLLING METHOD THEREOF, MEMORY SYSTEM AND ELECTRONIC DEVICEDecember 2022January 2025Allow2520YesNo
18079433OPERATION METHOD OF NONVOLATILE MEMORY DEVICEDecember 2022May 2023Allow500NoNo
17993653ON-DIE TERMINATION CONFIGURATION FOR INTEGRATED CIRCUITNovember 2022November 2024Allow3410YesNo
17987555MEMORY DEVICE AND OPERATING METHOD WITH NEGATIVEVOLTAGE APPLICATIONNovember 2022July 2025Abandon3220NoNo
17985064THREE DIMENSIONAL SEMICONDUCTOR MEMORY STRUCTURENovember 2022February 2025Allow2710NoNo
17979432MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICESNovember 2022July 2023Allow910YesNo
17970459DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VERIFY OPERATIONS IN A MEMORY DEVICEOctober 2022December 2023Allow1410NoNo
18046030SEMICONDUCTOR DEVICE AND METHOD FOR PREFORMING EMPHASIS DRIVINGOctober 2022February 2025Allow2821YesNo
17935811CONTROL CIRCUIT WITH BIAS CIRCUITRY FOR A SEMICONDUCTOR MEMORYSeptember 2022October 2024Allow2510NoNo
17948419TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES BY APPLYING VOLTAGES WITH DIFFERENT POLARITIESSeptember 2022March 2024Allow1730YesNo
17946183RESET VERIFICATION IN A MEMORY SYSTEMSeptember 2022November 2023Allow1410NoNo
17903739WORDLINE CAPACITANCE BALANCINGSeptember 2022December 2023Allow1510NoNo
17899785MEMORY AND OPERATION METHOD OF MEMORY WITH REPAIRING AND RANDOM PULSE GENERATING CAPABILITYAugust 2022July 2024Allow2310NoNo
17896996CONFIGURABLE, HIGH SPEED AND HIGH VOLTAGE TOLERANT OUTPUT DRIVERAugust 2022October 2024Allow2610YesNo
17821775SEMICONDUCTOR DEVICE HAVING SENSE AMPLIFIER EQUIPPED WITH COMPENSATION CIRCUITAugust 2022July 2024Allow2300NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner BEGUM, SULTANA.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
1
(100.0%)
Not Allowed After Appeal Filing
0
(0.0%)
Filing Benefit Percentile
97.6%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 100.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner BEGUM, SULTANA - Prosecution Strategy Guide

Executive Summary

Examiner BEGUM, SULTANA works in Art Unit 2824 and has examined 412 patent applications in our dataset. With an allowance rate of 93.0%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 17 months.

Allowance Patterns

Examiner BEGUM, SULTANA's allowance rate of 93.0% places them in the 80% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by BEGUM, SULTANA receive 1.53 office actions before reaching final disposition. This places the examiner in the 27% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by BEGUM, SULTANA is 17 months. This places the examiner in the 97% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.2% benefit to allowance rate for applications examined by BEGUM, SULTANA. This interview benefit is in the 17% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 36.7% of applications are subsequently allowed. This success rate is in the 83% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 59.8% of cases where such amendments are filed. This entry rate is in the 85% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 200.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 95% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 93% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 23.5% are granted (fully or in part). This grant rate is in the 12% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.2% of allowed cases (in the 54% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.5% of allowed cases (in the 55% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.