USPTO Examiner NGUYEN HIEN N - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18771817NON-VOLATILE MEMORY STORED WITH ENCODED DATAJuly 2024February 2025Allow700NoNo
18764906MEMORY SYSTEMJuly 2024June 2025Allow1110NoNo
18763067SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT WORD LINESJuly 2024February 2025Allow700NoNo
18757685THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANCE AND METHODS OF FORMING THE SAMEJune 2024January 2025Allow700NoNo
18748196METHOD FOR PROGRAMMING MEMORYJune 2024May 2025Allow1110NoNo
18741201MEMORY INCLUDING METAL RAILS WITH BALANCED LOADINGJune 2024March 2025Allow910NoNo
18677654MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORYMay 2024April 2025Allow1010NoNo
18635929MRAM REFERENCE CURRENTApril 2024March 2025Allow1110NoNo
18622033SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYSMarch 2024November 2024Allow800NoNo
18613361MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD THEREOFMarch 2024October 2024Allow710NoNo
18602078CROSS-LAYER RECONFIGURABLE STATIC RANDOM ACCESS MEMORY (SRAM) BASED COMPUTE-IN-MEMORY MACRO AND METHOD FOR EDGE INTELLIGENCEMarch 2024August 2024Allow510NoNo
18442496ANALOG NEUROMORPHIC CIRCUIT IMPLEMENTED USING RESISTIVE MEMORIESFebruary 2024March 2025Allow1310NoNo
18435696METHODS FOR INDEPENDENT MEMORY BANK MAINTENANCE AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAMEFebruary 2024December 2024Allow1110NoNo
18407399MEMORY DEVICE HAVING PHYSICAL UNCLONABLE FUNCTION AND MEMORY SYSTEM INCLUDING THE MEMORY DEVICEJanuary 2024September 2024Allow810NoNo
18399609RESISTIVE MEMORY APPARATUS AND OPERATING METHOD THEREOF AND MEMORY CELL ARRAY THEREOFDecember 2023April 2025Allow1511NoNo
18521476MEMORY CIRCUIT AND METHOD OF OPERATING SAMENovember 2023November 2024Allow1210NoNo
18506157THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANCE AND METHODS OF FORMING THE SAMENovember 2023October 2024Allow1110NoNo
18494652MEMORY DEVICE PERFORMING MULTIPLICATION USING LOGICAL STATES OF MEMORY CELLSOctober 2023May 2025Allow1900NoNo
18375968Methods for Programming and Accessing Resistive Change Elements Using Neutral Voltage ConditionsOctober 2023January 2025Allow1510NoNo
18374693DEVICES AND METHODS FOR OPERATING A MEMRISTIVE ELEMENTSeptember 2023May 2025Allow2000NoNo
18472282MEMORY DEVICE HAVING BITLINE SEGMENTED INTO BITLINE SEGMENTS AND RELATED METHOD FOR OPERATING MEMORY DEVICESeptember 2023August 2024Allow1110NoNo
18237070INTERLEAVED STRING DRIVERS, STRING DRIVER WITH NARROW ACTIVE REGION, AND GATED LDD STRING DRIVERAugust 2023June 2024Allow1001NoNo
18447910Memory DeviceAugust 2023July 2024Allow1110NoNo
18230078ENABLING SIGNIFICANT SCALING OF WORDLINE SWITCH WITH WORDLINE DEPENDENT NEGATIVE BITLINE VOLTAGEAugust 2023May 2025Allow2100NoNo
18362393INTEGRATED CIRCUIT AND METHODJuly 2023May 2024Allow1000NoNo
18361282SUPPRESSING RANDOM TELEGRAPH NOISE IN CROSSBAR CIRCUITSJuly 2023April 2025Allow2100NoNo
18360593MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAMEJuly 2023March 2025Allow2000NoNo
18358867THRESHOLD VOLTAGE-MODULATED MEMORY DEVICE USING VARIABLE-CAPACITANCE AND METHODS OF FORMING THE SAMEJuly 2023April 2024Allow900NoNo
18357785MEMORY INCLUDING METAL RAILS WITH BALANCED LOADINGJuly 2023March 2024Allow700NoNo
18225248MULTI-STAGE PROGRAMMING TECHNIQUES WITH THREE STATES PER MEMORY CELL PARITYJuly 2023May 2025Allow2100NoNo
18355161MEMORY MAPPING FOR HIBERNATIONJuly 2023December 2024Allow1720NoNo
18353454PROGRAMMABLE RESISTIVE MEMORY ELEMENT AND A METHOD OF MAKING THE SAMEJuly 2023June 2025Allow2320NoNo
18353776METHODS FOR ADJUSTING ROW HAMMER REFRESH RATES AND RELATED MEMORY DEVICES AND SYSTEMSJuly 2023May 2024Allow1010NoNo
18221649CHANNEL PRE-CHARGE PROCESS IN A MEMORY DEVICEJuly 2023March 2025Allow2000NoNo
18352127MEMORY DEVICE WITH WRITE PULSE TRIMMINGJuly 2023August 2024Allow1310NoNo
18345071DUO-LEVEL WORD LINE DRIVERJune 2023August 2024Allow1310NoNo
18334614ONE-TIME-PROGRAMMABLE (OTP) MEMORY WITH ERROR DETECTIONJune 2023May 2025Allow2300NoNo
18334583SEMICONDUCTOR MEMORY DEVICE AND METHODS OF MANUFACTURING AND OPERATING THE SAMEJune 2023January 2024Allow700NoNo
18205679MEMORY DEVICES HAVING SOURCE LINES DIRECTLY COUPLED TO BODY REGIONS AND METHODSJune 2023April 2024Allow1010NoNo
18328842Systems and Methods for Memory Operation Using Local Word LinesJune 2023July 2024Allow1410NoNo
18315117MEMORY CELL, ELECTRONIC CIRCUIT COMPRISING SUCH CELLS, RELATED PROGRAMMING METHOD AND MULTIPLICATION AND ACCUMULATION METHODMay 2023March 2025Allow2300NoNo
18140472MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORYApril 2023February 2024Allow1000NoNo
18033075OTS-BASED DYNAMIC STORAGE STRUCTURE AND OPERATION METHOD THEREOFApril 2023November 2024Allow1900NoNo
18249925METHOD AND SYSTEM FOR REFRESHING MEMORY OF A PORTABLE COMPUTING DEVICEApril 2023May 2025Allow2500NoNo
18302278VOLTAGE-MODE CROSSBAR CIRCUITSApril 2023April 2025Allow2400NoNo
18298374APPARATUS AND METHOD FOR ERASING DATA PROGRAMMED IN A NON-VOLATILE MEMORY BLOCK IN A MEMORY SYSTEM MULTIPLE TIMESApril 2023June 2024Allow1510NoNo
18297633DATA READING CIRCUIT AND DATA READING CIRCUIT CONTROL METHODApril 2023February 2025Allow2300NoNo
18179366REGULATOR CIRCUIT MODULE, MEMORY STORAGE DEVICE, AND VOLTAGE CONTROL METHODMarch 2023February 2025Allow2400NoNo
18109466CONTROL GATE SIGNAL FOR DATA RETENTION IN NONVOLATILE MEMORYFebruary 2023May 2024Allow1501NoNo
18166018ANTI-FUSE ARRAY STRUCTURE, OPERATION METHOD THEREOF AND MEMORYFebruary 2023April 2025Allow2610NoNo
18163906MEMORY SYSTEMFebruary 2023April 2024Allow1420NoNo
18163975BONDING DEFECT DETECTION FOR DIE-TO-DIE BONDING IN MEMORY DEVICESFebruary 2023March 2025Allow2500NoNo
18163297MEMORY CIRCUIT AND METHOD FOR READING MEMORY CIRCUITFebruary 2023September 2024Allow1900NoNo
18163590SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEMFebruary 2023December 2024Allow2200NoNo
18040246RECONFIGURABLE MEMORY MODULE DESIGNED TO IMPLEMENT COMPUTING OPERATIONSFebruary 2023January 2025Allow2400NoNo
18104172Three-dimensional structure of memories for in-memory computingJanuary 2023January 2025Allow2300NoNo
18158232INTEGRATED CIRCUIT INCLUDING A PHYSICALLY UNCLONABLE FUNCTION DEVICE AND CORRESPONDING METHOD FOR IMPLEMENTING A PHYSICALLY UNCLONABLE FUNCTIONJanuary 2023September 2024Allow2000NoNo
18156543VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRINGJanuary 2023September 2023Allow810NoNo
18151734AUTOMATIC PROGRAM VOLTAGE SELECTION NETWORKJanuary 2023October 2023Allow1001NoNo
18150181MEMORY DRIVER, MEMORY SYSTEM, AND OPERATING METHODJanuary 2023August 2024Allow2000NoNo
18082457THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR READING THE SAMEDecember 2022August 2024Allow2000NoNo
18079081MEMORY CELL OF CHARGE-TRAPPING NON-VOLATILE MEMORYDecember 2022November 2024Allow2300NoNo
18079515SYSTEMS AND METHODS FOR ADAPTIVE SELF-REFERENCED READS OF MEMORY DEVICESDecember 2022September 2023Allow910NoNo
18079494SYSTEMS AND METHODS FOR ADAPTIVE SELF-REFERENCED READS OF MEMORY DEVICESDecember 2022October 2023Allow1010NoNo
18077580METHOD FOR PROGRAMMING MEMORYDecember 2022March 2024Allow1500NoNo
18075950ANALOG NEUROMORPHIC CIRCUIT IMPLEMENTED USING RESISTIVE MEMORIESDecember 2022December 2023Allow1220NoNo
18071321ONE-TIME PROGRAMMABLE BITCELL FOR FRONTSIDE AND BACKSIDE POWER INTERCONNECTNovember 2022October 2024Allow2301NoNo
17981462FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF USING LEAKAGE CURRENT COMPENSATIONNovember 2022January 2025Allow2610NoNo
17968083MEMORY DEVICE AND METHOD OF OPERATING THE SAMEOctober 2022July 2024Allow2100NoNo
17966183MAGNETIC MEMORY DEVICE AND METHOD OF OPERATING THE SAMEOctober 2022December 2024Allow2701NoNo
17955858OPERATION METHOD OF MEMORY DEVICE AND OPERATION METHOD OF MEMORY SYSTEM INCLUDING THE SAMESeptember 2022August 2024Allow2300NoNo
17955408MEMORY MAPPING FOR HIBERNATIONSeptember 2022February 2024Allow1720NoNo
17935966STACKED FET WITH THREE-TERMINAL SOT MRAMSeptember 2022June 2025Allow3201NoNo
17953094MEMORY DEVICE HAVING SWITCHING DEVICE OF PAGE BUFFE AND ERASE METHOD THEREOFSeptember 2022October 2024Allow2400NoNo
17935502NONVOLATILE MEMORY DEVICE HAVING CELL-OVER-PERIPHERY (COP) STRUCTURE WITH ADDRESS RE-MAPPINGSeptember 2022June 2023Allow910NoNo
17944704MEMORY DEVICE INCLUDING SELECT LINESSeptember 2022April 2025Allow3100NoNo
17943591DECODING ARCHITECTURE FOR MEMORY TILESSeptember 2022May 2023Allow910NoNo
17942977READ LEVEL COMPENSATION FOR PARTIALLY PROGRAMMED BLOCKS OF MEMORY DEVICESSeptember 2022October 2024Allow2500NoNo
17939859THREE DIMENSIONAL STACKED SEMICONDUCTOR MEMORYSeptember 2022July 2024Allow2200NoNo
17929318MEMORY DEVICE FOR IN-MEMORY COMPUTING, COMPUTING METHOD AND COMPUTING CELL THEREOFSeptember 2022June 2024Allow2100NoNo
17898932SEMICONDUCTOR MEMORY DEVICE AND METHODS OF MANUFACTURING AND OPERATING THE SAMEAugust 2022March 2023Allow600NoNo
17899073Storage System and Method for Implementation of Symmetric Tree Models for Read Threshold CalibrationAugust 2022March 2025Allow3110YesNo
17897021FORWARD LOOKING ALGORITHM FOR VERTICAL INTEGRATED CROSS-POINT ARRAY MEMORYAugust 2022June 2024Allow2100NoNo
17888225ADAPTIVE SENSING TIME FOR MEMORY OPERATIONSAugust 2022December 2024Allow2800NoNo
17888298STORING BITS WITH CELLS IN A MEMORY DEVICEAugust 2022October 2024Allow2600NoNo
17883630COMPUTING-IN-MEMORY CIRCUITRYAugust 2022April 2024Allow2000NoNo
17877613MEMORY CELL READ OPERATION TECHNIQUESJuly 2022May 2024Allow2200NoNo
17874926SEMICONDUCTOR STORAGE DEVICE AND MEMORY SYSTEM INCLUDING SEMICONDUCTOR STORAGE DEVICE AND CONTROLLERJuly 2022June 2023Allow1010NoNo
17815076MEMORY DEVICE WITH WRITE PULSE TRIMMINGJuly 2022April 2023Allow900NoNo
17815121MEMORY CIRCUIT AND METHOD OF OPERATING SAMEJuly 2022September 2023Allow1410NoNo
17867174MEMORY DEVICE AND PROGRAMMING METHOD THEREOFJuly 2022July 2024Allow2410NoNo
17812612READ WINDOW MANAGEMENT IN A MEMORY SYSTEMJuly 2022September 2024Allow2601NoNo
17861458MODULAR MEMORY ARCHITECTURE WITH GATED SUB-ARRAY OPERATION DEPENDENT ON STORED DATA CONTENTJuly 2022February 2024Allow1900NoNo
17859795MEMORY DEVICE AND OPERATING METHOD THEREOFJuly 2022May 2023Allow1010NoNo
17856590MEMORY DEVICEJuly 2022May 2023Allow1110NoNo
17846031WORDLINE DRIVER CIRCUIT AND MEMORYJune 2022January 2025Allow3110NoNo
17844259CONTROL AMPLIFICATION CIRCUIT, SENSITIVE AMPLIFIER AND SEMICONDUCTOR MEMORYJune 2022October 2024Allow2710NoNo
17842806WORDLINE DRIVER CIRCUIT AND MEMORYJune 2022May 2024Allow2300NoNo
17839253NONVOLATILE MEMORY DEVICE AND PROGRAMMING METHOD OF NONVOLATILE MEMORYJune 2022January 2024Allow1900NoNo
17838481Storage System and Method for Inference of Read Thresholds Based on Memory Parameters and ConditionsJune 2022December 2024Allow3011YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner NGUYEN, HIEN N.

Strategic Value of Filing an Appeal

Total Appeal Filings
1
Allowed After Appeal Filing
0
(0.0%)
Not Allowed After Appeal Filing
1
(100.0%)
Filing Benefit Percentile
4.9%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner NGUYEN, HIEN N - Prosecution Strategy Guide

Executive Summary

Examiner NGUYEN, HIEN N works in Art Unit 2824 and has examined 1,271 patent applications in our dataset. With an allowance rate of 98.4%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 17 months.

Allowance Patterns

Examiner NGUYEN, HIEN N's allowance rate of 98.4% places them in the 95% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by NGUYEN, HIEN N receive 0.58 office actions before reaching final disposition. This places the examiner in the 4% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by NGUYEN, HIEN N is 17 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +1.6% benefit to allowance rate for applications examined by NGUYEN, HIEN N. This interview benefit is in the 17% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 42.1% of applications are subsequently allowed. This success rate is in the 93% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 90.2% of cases where such amendments are filed. This entry rate is in the 98% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 91% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 43.1% are granted (fully or in part). This grant rate is in the 45% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 6.7% of allowed cases (in the 92% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 4.2% of allowed cases (in the 76% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.