USPTO Examiner BASHAR MOHAMMED A - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18789866SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAMEJuly 2024March 2026Allow1910NoNo
18763964SELF-TIMING READ TERMINATIONJuly 2024December 2025Allow1800NoNo
18761619MEMORY DEVICE WITH REDUNDANCY FOR PAGE-BASED REPAIRJuly 2024January 2025Allow700NoNo
18761321MEMORY DEVICE AND READ VOLTAGE SETTING METHOD THEREOFJuly 2024March 2026Allow2010NoNo
18752638Scannable Memory SubsystemJune 2024March 2026Allow2110NoNo
18749098METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLSJune 2024April 2025Allow910NoNo
18742749TECHNIQUES FOR DETECTING A STATE OF A BUSJune 2024April 2025Allow1010NoNo
18736779BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSIONJune 2024June 2025Allow1310NoNo
18671964MEMORY DEVICEMay 2024March 2026Allow2110NoNo
18670883MEMORY SYSTEMS AND DEVICES HAVING ENHANCED COLUMN REPAIR CAPABILITY AND METHODS OF OPERATING SAMEMay 2024February 2026Allow2110YesNo
18667358APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMORY DEVICEMay 2024November 2025Allow1810NoNo
18653688STORAGE DEVICE AND METHOD OF OPERATING STORAGE DEVICEMay 2024January 2026Allow2110YesNo
18651357SEQUENTIAL ACCESS TO LINKED MEMORY DICE FOR BUS TRAININGApril 2024January 2026Allow2010YesNo
18650942SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAMEApril 2024January 2026Allow2110NoNo
18635569AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGNApril 2024January 2026Allow2110NoNo
18635219DUMMY MEMORY HOLE DEFECT DETECTIONApril 2024December 2025Allow2010YesNo
18634096Usage-Based Disturbance Counter RepairApril 2024March 2026Allow2310YesNo
18611351VOTING-BASED STATE SELECTION FOR A VOLATILE MEMORYMarch 2024January 2026Allow2210NoNo
18608220DYNAMIC ERROR MONITOR AND REPAIRMarch 2024July 2025Allow1620NoNo
18581694AREA-EFFICIENT, WIDTH-ADJUSTABLE SIGNALING INTERFACEFebruary 2024January 2025Allow1110NoNo
18420688STACKED DRAM DEVICE AND METHOD OF MANUFACTUREJanuary 2024August 2024Allow700NoNo
18415722PRE-CHARACTERIZING WEAK BITS FOR INCREASED LOW DENSITY PARITY CHECK (LDPC) SPEEDJanuary 2024January 2026Allow2410YesNo
18411822METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIESJanuary 2024November 2024Allow1010NoNo
18411397Data Storage Device and Method for Read Disturb Mitigation During Low-Power ModesJanuary 2024September 2025Allow2010NoNo
18406424BIT COUNTING CIRCUITS AND MEMORY DEVICES INCLUDING THE SAMEJanuary 2024January 2026Allow2510YesNo
18405156NON-VOLATILE MEMORY WITH ENHANCED EARLY PROGRAM TERMINATION MODE FOR NEIGHBOR PLANE DISTURBJanuary 2024November 2025Allow2200NoNo
18403700Method for Scanning a Memory ArrayJanuary 2024January 2026Allow2510NoNo
18392487INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TESTDecember 2023October 2024Allow1010YesNo
18393544MEMORY DEVICEDecember 2023November 2025Allow2210NoNo
18544612DATA SERIALIZER, LATCH DATA DEVICE USING THE SAME AND CONTROLLING METHOD THEREOFDecember 2023September 2025Allow2110NoNo
18543687MEMORY DEVICE INCLUDING REPAIR CIRCUIT AND OPERATING METHOD THEREOFDecember 2023September 2025Allow2000NoNo
18534495TECHNIQUE TO ANALYZE AND REPORT ACCURATE DATA, SYNCHRONIZING MULTIPLE SIGNALS IN A MEMORY CHIPDecember 2023February 2026Allow2710NoNo
18556858Logical Memory Repair with a Shared Physical MemoryOctober 2023October 2025Allow2300NoNo
18486789CONDUCTING BUILT-IN SELF-TEST OF MEMORY MACROOctober 2023May 2025Allow1910NoNo
18485631SEMICONDUCTOR DEVICE HAVING MEMORY CELL ARRAY DIVIDED INTO PLURAL MEMORY MATSOctober 2023May 2025Allow1910NoNo
18482464STORAGE DEVICE FOR SUPPORTING DYNAMIC ALLOCATION OF MEMORY AND METHOD OF OPERATING THE SAMEOctober 2023March 2026Allow2920YesNo
18369014ERROR CONDITION MONITORING IN MEMORY SYSTEMSSeptember 2023November 2025Allow2610YesNo
18467996SYSTEMS AND METHODS FOR MONITORING AND MANAGING MEMORY DEVICESSeptember 2023June 2025Allow2110NoNo
18463905SENSE AMPLIFIER AND OUTPUT LATCH CIRCUIT FOR TESTINGSeptember 2023November 2025Allow2620NoNo
18243441Row Repair CircuitrySeptember 2023August 2025Allow2310NoNo
18241621VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAMESeptember 2023May 2025Allow2000NoNo
18458201MEMORY DEVICE AND READING METHOD THEREOFAugust 2023July 2025Allow2310YesNo
18238232MEMORY DEVICE AND MEMORY SYSTEMAugust 2023January 2025Allow1710NoNo
18455031METHOD FOR OPTIMIZING FLASH MEMORY CHIP AND RELATED APPARATUSAugust 2023April 2025Allow1900YesNo
18453903SEMICONDUCTOR DEVICE RELATED TO A PARALLEL TESTAugust 2023April 2025Allow2010YesNo
18453400SYSTEM AND METHOD FOR PARALLEL MEMORY TESTAugust 2023July 2024Allow1110NoNo
18236177FLASH MEMORY FOR PERFORMING MARGIN READ TEST OPERATION AND MARGIN READ TEST SYSTEM INCLUDING THE SAMEAugust 2023August 2025Allow2410YesNo
18277382RECONFIGURABLE MBIST METHOD BASED ON ADAPTIVE MARCH ALGORITHMAugust 2023January 2025Allow1710NoNo
18450241Non-Volatile Memory Device and Method of Operating the SameAugust 2023April 2024Allow810NoNo
18448346SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING SEMICONDUCTOR MEMORY DEVICEAugust 2023April 2025Allow2010YesNo
18366213ABORTED OPERATION DETECTION FOR NONVOLATILE MEMORY WITH NON-UNIFORM ERASEAugust 2023January 2026Allow2910YesNo
18364303MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND OPERATING METHOD THEREOFAugust 2023October 2025Allow2610YesNo
18228118AT-SPEED TRANSITION FAULT TESTING FOR A MULTI-PORT AND MULTI-CLOCK MEMORYJuly 2023June 2025Allow2300NoNo
18361839NON-VOLATILE MEMORY WITH MULTIPLE DATA RESOLUTIONSJuly 2023September 2025Allow2620YesNo
18361843NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCEJuly 2023June 2025Allow2310YesNo
18359975METHOD FOR LUT-FREE MEMORY REPAIRJuly 2023October 2025Allow2710NoNo
18360520EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORYJuly 2023July 2025Allow2420YesNo
18359816NON-VOLATILE MEMORY WITH SLOW VOLTAGE RAMP COMPENSATIONJuly 2023June 2025Allow2210YesNo
18225654Interface circuit, memory controller and method for calibrating signal processing devices in an interface circuitJuly 2023January 2025Allow1810NoNo
18357274NON-VOLATILE MEMORY WITH SMART CONTROL OF OVERDRIVE VOLTAGEJuly 2023July 2025Allow2310YesNo
18356222MEMORY DEVICE FOR PERFORMING READ OPERATION AND OPERATING METHOD THEREOFJuly 2023July 2025Allow2410NoNo
18273059READ-ONLY MEMORY DIAGNOSIS AND REPAIRJuly 2023August 2025Allow2500NoNo
18354631CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHODJuly 2023May 2025Allow2210NoNo
18222563MEMORY SYSTEM, OPERATING METHOD OF THE SAME, AND CONTROLLER OF MEMORY DEVICEJuly 2023July 2025Allow2410YesNo
18261631SEMICONDUCTOR STORAGE DEVICEJuly 2023July 2025Allow2410NoNo
18351625FUSE BASED REPLAY PROTECTION WITH DYNAMIC FUSE USAGE AND COUNTERMEASURES FOR FUSE VOLTAGE CUT ATTACKSJuly 2023June 2024Allow1110NoNo
18346367NON-VOLATILE MEMORY WITH LAYOUT ADAPTIVE PROBLEMATIC WORD LINE DETECTIONJuly 2023March 2025Allow2110YesNo
18343377HOST-TO-DEVICE INTERFACE CIRCUITRY TESTINGJune 2023January 2026Allow3130NoNo
18341192MEMORY DEVICE INCLUDING TEST PAD CONNECTION CIRCUITJune 2023April 2025Allow2110YesNo
18328186METHODS FOR CONTROLLING BIT LINE VOLTAGES IN MEMORY DEVICESJune 2023February 2026Allow3320NoNo
18325109STORAGE DEVICE AND OPERATING METHOD THEREOFMay 2023June 2025Allow2410NoNo
18323950SEMICONDUCTOR DEVICE AND OPERATING METHOD FOR CONTROLLING DRIVING DIRECTION OF WORD LINEMay 2023July 2025Allow2610NoNo
18314743METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLSMay 2023March 2024Allow1010NoNo
18314147MEMORY DEVICE INCLUDING ERROR CORRECTION DEVICEMay 2023July 2025Allow2710NoNo
18301327BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSIONApril 2023March 2024Allow1110NoNo
18134776MEMORY DEVICES, OPERATING METHODS OF THE MEMORY DEVICES, AND TEST SYSTEMS INCLUDING THE MEMORY DEVICESApril 2023June 2025Allow2610YesNo
18298335VOLTAGE PREDICTION METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNITApril 2023March 2025Allow2310NoNo
18125098SEMICONDUCTOR MEMORY DEVICE MANAGING FLEXIBLE REFRESH SKIP AREAMarch 2023September 2023Allow610NoNo
18179130SEMICONDUCTOR-ELEMENT-INCLUDING MEMORY DEVICEMarch 2023November 2024Allow2000NoNo
18115132SEMICONDUCTOR MEMORY DEVICES AND METHODS OF OPERATING SEMICONDUCTOR MEMORY DEVICESFebruary 2023July 2024Allow1720NoNo
18173096MEMORY DEVICE AND IN-MEMORY SEARCH METHOD THEREOFFebruary 2023May 2025Allow2710YesNo
18108085NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAMEFebruary 2023January 2024Allow1110NoNo
18165635SEMICONDUCTOR MEMORY DEVICES WITH BACKSIDE HEATER STRUCTUREFebruary 2023June 2025Allow2810NoNo
18164349SEMICONDUCTOR MEMORY DEVICES, MEMORY SYSTEMS INCLUDING THE SAME AND METHODS OF OPERATING MEMORY SYSTEMSFebruary 2023January 2024Allow1120YesNo
18157558REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHODJanuary 2023March 2025Allow2510NoNo
18005875THREE-DIMENSIONAL FLASH MEMORY USING FERROELECTRIC LAYER ON BASIS OF BACK GATE STRUCTUREJanuary 2023September 2025Allow3111YesNo
18155692PROGRAMMABLE MEMORY AND METHOD FOR DRIVING PROGRAMMABLE MEMORYJanuary 2023February 2025Allow2510NoNo
18097459AREA-EFFICIENT, WIDTH-ADJUSTABLE SIGNALING INTERFACEJanuary 2023November 2023Allow1010NoNo
18154256ADDRESS SELECTION CIRCUIT AND CONTROL METHOD THEREOF, AND MEMORYJanuary 2023October 2024Allow2110NoNo
18094554OPTIMIZING MEMORY ACCESS OPERATION PARAMETERSJanuary 2023July 2023Allow710NoNo
18093258BUFFER CIRCUIT WITH DATA BIT INVERSIONJanuary 2023April 2024Allow1520YesNo
18148380SENSE AMPLIFIER ARCHITECTURE FOR A NON-VOLATILE MEMORY STORING CODED INFORMATIONDecember 2022November 2024Allow2310YesNo
18090658NON-VOLATILE MEMORY DEVICE OPTIMIZED FOR A SURFACE MOUNT TECHNOLOGY (SMT) PROCESS AND AN OPERATING METHOD THEREOFDecember 2022November 2024Allow2210YesNo
18090423CONFIGURATION METHOD AND READING METHOD OF 3D MEMORY DEVICE, 3D MEMORY DEVICE, AND MEMORY SYSTEMDecember 2022June 2025Allow2920YesNo
18084452MEMORY DEVICES WITH MULTIPLE PSEUDO-CHANNELSDecember 2022February 2026Allow3820YesNo
18076029MEMORY DEVICE AND METHOD OF OPERATING THE SAMEDecember 2022March 2025Allow2710NoNo
18061312PROXIMITY HEATER TO LOWER RRAM FORMING VOLTAGEDecember 2022April 2025Allow2810NoNo
18072723METHOD FOR ERASING FLASH MEMORYDecember 2022December 2024Allow2510NoNo
17983331MEMORY CELLNovember 2022May 2025Allow3010NoNo
17982512MEMORY REPAIR USING OPTIMIZED REDUNDANCY UTILIZATIONNovember 2022June 2023Allow710NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner BASHAR, MOHAMMED A.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
7
Examiner Affirmed
6
(85.7%)
Examiner Reversed
1
(14.3%)
Reversal Percentile
26.2%
Lower than average

What This Means

With a 14.3% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
12
Allowed After Appeal Filing
1
(8.3%)
Not Allowed After Appeal Filing
11
(91.7%)
Filing Benefit Percentile
12.7%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 8.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner BASHAR, MOHAMMED A - Prosecution Strategy Guide

Executive Summary

Examiner BASHAR, MOHAMMED A works in Art Unit 2824 and has examined 538 patent applications in our dataset. With an allowance rate of 94.2%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 19 months.

Allowance Patterns

Examiner BASHAR, MOHAMMED A's allowance rate of 94.2% places them in the 82% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by BASHAR, MOHAMMED A receive 1.25 office actions before reaching final disposition. This places the examiner in the 16% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by BASHAR, MOHAMMED A is 19 months. This places the examiner in the 95% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +3.4% benefit to allowance rate for applications examined by BASHAR, MOHAMMED A. This interview benefit is in the 26% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 41.1% of applications are subsequently allowed. This success rate is in the 92% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 30.9% of cases where such amendments are filed. This entry rate is in the 45% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 13% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 61.1% of appeals filed. This is in the 38% percentile among all examiners. Of these withdrawals, 36.4% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 21.4% are granted (fully or in part). This grant rate is in the 11% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 24% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 31% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.