USPTO Examiner KING DOUGLAS - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18820305DATA BUFFER CIRCUIT STRUCTURE, LAYOUT STRUCTURE OF MULTIPLE DATA BUFFER CIRCUITS, AND MEMORYAugust 2024February 2026Allow1700NoNo
18786588CIRCUIT AND METHOD TO ENHANCE EFFICIENCY OF MEMORYJuly 2024February 2026Allow1910NoNo
18757102SELECTOR ONLY MEMORY WRITE OPERATIONJune 2024January 2026Allow1900NoNo
18667099SEMICONDUCTOR DEVICE WITH SELECTIVE COMMAND DELAY AND ASSOCIATED METHODS AND SYSTEMSMay 2024October 2025Allow1720NoNo
18629735RECOGNITION SYSTEM AND SRAM CELL THEREOFApril 2024May 2025Allow1311NoNo
18604203CONFIGURABLE MEMORY DIE CAPACITANCEMarch 2024June 2025Allow1510NoNo
18432390APPARATUS AND METHOD FOR HARDWARE METERING USING MEMORY-TYPE CAMOUFLAGED CELLFebruary 2024December 2024Allow1101NoNo
18421801CURRENT DETECTOR AND INFORMATION PROCESSORJanuary 2024January 2026Allow2411NoNo
18421152MEMORY DEVICE INCLUDING SENSE AMPLIFIER AND METHOD OF STORING DATA THEREOFJanuary 2024February 2026Allow2411YesNo
18419205NON-VOLATILE MEMORY WITH IN-PLACE ERROR UPDATING AND CORRECTIONJanuary 2024December 2025Allow2310YesNo
18286434MAGNETIC MEMORY ELEMENTJanuary 2024January 2026Allow2810NoNo
18414004POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE MEMORYJanuary 2024February 2026Allow2511NoNo
18407830REFERENCE POTENTIAL GENERATING CIRCUIT AND CONTROL METHOD THEREOFJanuary 2024November 2025Allow2210NoNo
18405953MEMORY DEVICES WITH STACKING CIRCUITS AND METHODS OF OPERATING THEREOFJanuary 2024January 2026Allow2511NoNo
18398145RECOGNITION SYSTEM AND SRAM CELL THEREOFDecember 2023September 2024Allow900NoNo
18397773POWER LOSS PROTECTION AND RESET SIGNAL GENERATION IN MEMORY SYSTEMSDecember 2023March 2026Allow2720YesNo
18390293MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAMEDecember 2023November 2025Allow2210NoNo
18545888ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEMDecember 2023January 2025Allow1310NoNo
18525136MEMORY ARRAY DECODING AND INTERCONNECTSNovember 2023April 2025Allow1611NoNo
18520500NEURAL NETWORK DEVICENovember 2023January 2025Allow2000NoNo
18506608Control Simulation Method Based On Artificial IntelligenceNovember 2023March 2025Abandon1620NoNo
18384927SERIAL INTERFACE RECEIVER AND AN OFFSET CALIBRATION METHOD THEREOFOctober 2023February 2026Allow2701NoNo
18377787LIMITED RETENTION TIME STORAGE SYSTEMOctober 2023January 2026Abandon2801NoNo
18377786EPHEMERAL KEY STORAGEOctober 2023October 2025Allow2410NoNo
18373799ERROR REMAPPINGSeptember 2023June 2025Allow2001NoNo
18458775SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE, AND MEMORY SYSTEMAugust 2023October 2025Allow2501NoNo
18234157MEMORY DEVICE PERFORMING ECS OPERATION, OPERATION METHOD OF THE MEMORY DEVICE, MEMORY SYSTEM, ELECTRONIC DEVICE, AND ELECTRONIC SYSTEMAugust 2023March 2026Allow3121YesNo
18233522MEMORY ARCHITECTURE SUPPORTING BOTH CONVENTIONAL MEMORY ACCESS MODE AND DIGITAL IN-MEMORY COMPUTATION PROCESSING MODEAugust 2023January 2026Allow2911NoNo
18233420CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGET RETENTIONAugust 2023June 2025Allow2210NoNo
18232386METHODS OF CONFIGURING A MEMORYAugust 2023June 2024Allow1001NoNo
18231935DATA CONVERTER FOR CANCELLING OFFSET VOLTAGEAugust 2023September 2025Allow2501YesNo
18366702CIRCUIT AND METHOD TO ENHANCE EFFICIENCY OF MEMORYAugust 2023April 2025Allow2021YesNo
18366676PAGE BUFFER PERFORMING MEMORY OPERATIONAugust 2023October 2025Allow2601YesNo
18365812MEMORY DEVICE CONTROLLING PASS VOLTAGE AND OPERATING METHOD THEREOFAugust 2023March 2025Allow2000NoNo
18229873SYSTEMS AND METHODS TO AVOID OVER PROGRAMMING AT INFREQUENT SMART VERIFY ACQUISITION FOR HIGH-PERFORMANCE 3D NANDAugust 2023August 2025Allow2410NoNo
18364094MEMORY DEVICE AND OPERATING METHOD THEREOFAugust 2023March 2025Allow1900NoNo
18228795ASYMMETRIC VREADK TO REDUCE NEIGHBORING WORD LINE INTERFERENCE IN A MEMORY DEVICEAugust 2023July 2025Allow2310NoNo
18228621PSEUDO MULTI-PORT MEMORY WITH MEMORY CELLS EACH HAVING TWO-PORT MEMORY CELL ARCHITECTURE AND MULTIPLE ENABLE PULSES ON SAME WORDLINE AND ASSOCIATED MEMORY ACCESS METHODJuly 2023September 2025Allow2501NoNo
18362509NON-VOLATILE MEMORY WITH HIGH PERFORMANCE READJuly 2023December 2025Allow2820YesNo
18362667COMPUTING-IN-MEMORY DEVICE AND METHODJuly 2023October 2025Allow2711NoNo
18361897CIRCUIT AND METHOD TO ENHANCE EFFICIENCY OF MEMORYJuly 2023August 2024Allow1201NoNo
18360096MEMORY CONTROLLER SUPPORT FOR MIXED READJuly 2023March 2025Allow2000NoNo
18225344VARIABLE READ METHOD FOR READ TIME PERFORMANCE IMPROVEMENT OF NON-VOLATILE MEMORYJuly 2023August 2025Allow2410NoNo
18356774FAST DIRECT LOOK AHEAD READ MODE IN A MEMORY DEVICEJuly 2023July 2025Allow2410NoNo
18223782INTERMEDIATE RE-VERIFY FOR ACHIEVING TIGHTER THRESHOLD VOLTAGE DISTRIBUTIONS IN A MEMORY DEVICEJuly 2023March 2025Allow2000NoNo
18334790SELF-SELECTING MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME, AND OPERATING METHOD THEREOFJune 2023June 2025Allow2410YesNo
18331612QUEUED CURRENT LEVEL ADJUSTMENT IN A FLASH MEMORY SYSTEMJune 2023January 2026Abandon3101NoNo
18329215MEMORY DEVICE CONFIGURED TO GENERATE READ CURRENT BASED ON SIZE OF MEMORY CELL AND VALUE OF READ CURRENT ACTUALLY APPLIED TO MEMORY CELLJune 2023July 2025Allow2611YesNo
18200871MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD STRUCTURESMay 2023April 2024Allow1101NoNo
18197106RANDOM ACCESS MEMORY AND SENSE-AMPLIFYING COMPENSATION CIRCUIT THEREOFMay 2023February 2025Allow2100NoNo
18309038MEMORY SYSTEM AND SHIFT REGISTER MEMORYApril 2023January 2024Allow900NoNo
18306221ELECTRONIC FUSE CIRCUIT AND METHOD FOR ELECTRONIC FUSE CIRCUITApril 2023July 2024Allow1501NoNo
18134928REDUNDANCY FOR AN ARRAY OF NON-VOLATILE MEMORY CELLS USING TAG REGISTERSApril 2023November 2025Allow3121NoNo
18297307SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM HAVING INDEPENDENT DATA INPUT/OUTPUT PERIOD, AND OPERATING METHOD OF THE SEMICONDUCTOR SYSTEMApril 2023September 2025Allow2911NoNo
18295445MEMORY SYSTEM WITH ERROR DETECTIONApril 2023May 2025Allow2500NoNo
18194390INCREASED SHIFT FREQUENCY FOR MULTI-CHIP-MODULE SCANMarch 2023July 2025Allow2710NoNo
18192367NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE, AND OPERATING METHOD OF NONVOLATILE MEMORY DEVICEMarch 2023November 2023Allow811YesNo
18190144SEMICONDUCTOR CHIP AND SEQUENCE CHECKING CIRCUITMarch 2023August 2025Allow2811NoNo
18184686Storage and Accessing Methods for Parameters in Streaming AI Accelerator ChipMarch 2023July 2025Allow2811NoNo
18090444PROGRAMMING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICEDecember 2022March 2025Allow2610NoNo
18071979MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICENovember 2022September 2025Allow3321NoNo
17993364SEMICONDUCTOR DEVICENovember 2022February 2025Allow2710NoNo
17992143APPARATUS AND METHOD WITH IN-MEMORY PROCESSINGNovember 2022June 2023Allow710NoNo
17986522SELF-REFERENCE SENSING FOR MEMORY CELLSNovember 2022August 2023Allow910NoNo
17983705SEMICONDUCTOR DEVICE FOR IMPROVING RETENTION PERFORMANCE AND OPERATING METHOD THEREOFNovember 2022December 2024Allow2610NoNo
17977221eFUSE OTP MEMORY DEVICE INCLUDING SERIAL INTERFACE LOGIC AND OPERATION METHOD THEREOFOctober 2022August 2025Allow3430NoNo
17970759MEMORY ARRAY DECODING AND INTERCONNECTSOctober 2022August 2023Allow901NoNo
17970315APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERATING THE SAMEOctober 2022January 2025Allow2721NoNo
17969915FAST TWO-SIDED CORRECTIVE READ OPERATION IN A MEMORY DEVICEOctober 2022September 2024Allow2310YesNo
18048121MAGNETORESISTIVE MEMORY DEVICE AND METHOD OF OPERATING SAME USING PHASE CONTROLLED MAGNETIC ANISOTROPYOctober 2022February 2026Allow4020NoNo
17965243MODULAR MEMORY ARCHITECTURE WITH MORE SIGNIFICANT BIT SUB-ARRAY WORD LINE ACTIVATION IN SINGLE-CYCLE READ-MODIFY-WRITE OPERATION DEPENDENT ON LESS SIGNIFICANT BIT SUB-ARRAY DATA CONTENTOctober 2022September 2024Allow2300NoNo
17959730VOLTAGE GENERATION AND REGULATION ACROSS MULTIPLE DIESOctober 2022May 2025Allow3120NoNo
17935057SEMICONDUCTOR DEVICE WITH SELECTIVE COMMAND DELAY AND ASSOCIATED METHODS AND SYSTEMSSeptember 2022January 2024Allow1611NoNo
17950931NON-VOLATILE MEMORY DEVICES AND DATA ERASING METHODSSeptember 2022August 2024Allow2311NoNo
17948057APPARATUSES AND METHODS OF POWER SUPPLY CONTROL FOR THRESHOLD VOLTAGE COMPENSATED SENSE AMPLIFIERSSeptember 2022March 2023Allow600NoNo
17945902READ DATA STROBE PATH HAVING VARIATION COMPENSATION AND DELAY LINESSeptember 2022December 2024Allow2710YesNo
17931935SUSPENDING MEMORY ERASE OPERATIONS TO PERFORM HIGHER PRIORITY MEMORY COMMANDSSeptember 2022October 2024Allow2511YesNo
17930899COMMAND AND ADDRESS INTERFACE REGIONS, AND ASSOCIATED DEVICES AND SYSTEMSSeptember 2022April 2024Allow2020YesNo
17940317Simplified Operations to Read Memory Cells Coarsely Programmed via Interleaved Two-Pass Data Programming TechniquesSeptember 2022April 2024Allow1940NoNo
17903189Asymmetric Time Division Peak Power Management (TD-PPM) Timing WindowsSeptember 2022June 2024Allow2100NoNo
17897784CROSS-TEMPERATURE COMPENSATION BASED ON MEDIA ENDURANCE IN MEMORY DEVICESAugust 2022August 2024Allow2310YesNo
17897993NAND MEMORY WITH DIFFERENT PASS VOLTAGE RAMP RATES FOR BINARY AND MULTI-STATE MEMORYAugust 2022June 2024Allow2100NoNo
17896465ULTRA-COMPACT PAGE BUFFERAugust 2022June 2023Allow1010NoNo
17896887MEMORY SYSTEM AND METHODAugust 2022October 2024Allow2610YesNo
17892291LOW POWER SIGNALING INTERFACEAugust 2022January 2024Allow1721NoNo
17893067DATA READING/WRITING METHOD, MEMORY, STORAGE APPARATUS, AND TERMINALAugust 2022July 2024Allow2310NoNo
17821413MEMORY TRAFFIC MONITORINGAugust 2022August 2024Allow2311NoNo
17821187MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEMAugust 2022September 2024Allow2511NoNo
17890693MEMORY DEVICE INCLUDING BOOSTER CIRCUIT FOR TRACKING WORD LINEAugust 2022February 2025Allow3011NoNo
17884113MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES BASED ON A SENSITIVITY METRICAugust 2022June 2024Allow2210YesNo
17817898MEMORY REFRESHAugust 2022August 2023Allow1210NoNo
17876471DIFFERENTIABLE CONTENT ADDRESSABLE MEMORYJuly 2022December 2024Allow2811YesNo
17814232TESTING SYSTEM AND TESTING METHODJuly 2022July 2024Allow2420NoNo
17813597MEMORY ARRAY DETECTION CIRCUIT AND DETECTION METHOD, AND MEMORYJuly 2022March 2024Allow2010YesNo
17860470Sense Amplifier Reference Voltage Through Sense Amplifier Latch DevicesJuly 2022July 2024Allow2411NoNo
17860701MANAGING ERROR COMPENSATION USING CHARGE COUPLING AND LATERAL MIGRATION SENSITIVITYJuly 2022September 2024Allow2610NoNo
17853026SRAM WITH FAST, CONTROLLED PEAK CURRENT, POWER EFFICIENT ARRAY RESET, AND DATA CORRUPTION MODES FOR SECURE APPLICATIONSJune 2022July 2024Allow2511NoNo
17852129NON-VOLATILE MEMORY WITH PRECISE PROGRAMMINGJune 2022February 2024Allow2000NoNo
17852057METHOD OF PROGRAMMING NON-VOLATILE MEMORY DEVICEJune 2022July 2024Allow2411YesNo
17788408DATA PROCESSING METHOD BASED ON MEMRISTOR ARRAY AND ELECTRONIC APPARATUSJune 2022February 2025Allow3120YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner KING, DOUGLAS.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
17
Examiner Affirmed
16
(94.1%)
Examiner Reversed
1
(5.9%)
Reversal Percentile
22.0%
Lower than average

What This Means

With a 5.9% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
37
Allowed After Appeal Filing
3
(8.1%)
Not Allowed After Appeal Filing
34
(91.9%)
Filing Benefit Percentile
12.6%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 8.1% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner KING, DOUGLAS - Prosecution Strategy Guide

Executive Summary

Examiner KING, DOUGLAS works in Art Unit 2824 and has examined 817 patent applications in our dataset. With an allowance rate of 79.3%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 26 months.

Allowance Patterns

Examiner KING, DOUGLAS's allowance rate of 79.3% places them in the 48% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by KING, DOUGLAS receive 1.78 office actions before reaching final disposition. This places the examiner in the 40% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by KING, DOUGLAS is 26 months. This places the examiner in the 76% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +2.7% benefit to allowance rate for applications examined by KING, DOUGLAS. This interview benefit is in the 23% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 27.1% of applications are subsequently allowed. This success rate is in the 46% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 25.8% of cases where such amendments are filed. This entry rate is in the 35% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 30.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 32% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 51.4% of appeals filed. This is in the 22% percentile among all examiners. Of these withdrawals, 50.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 58.5% are granted (fully or in part). This grant rate is in the 62% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 5.0% of allowed cases (in the 86% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 31% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.