USPTO Examiner ALROBAIE KHAMDAN N - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17766568NON-VOLATILE STORAGE CIRCUITOctober 2024July 2024Allow2820NoNo
18741805PROGRAMMING VOLTAGE SUPPLY AND PROGRAMMING VOLTAGE GENERATING METHODJune 2024December 2025Allow1800NoNo
18646415SEMICONDUCTOR DEVICE COMPRISING 3D-MEMORYApril 2024March 2026Allow2310NoNo
18628284SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENTIAL THRESHOLD VOLTAGESApril 2024December 2025Allow2010NoNo
18623355METHODS FOR TUNING COMMAND/ADDRESS BUS TIMING AND MEMORY DEVICES AND MEMORY SYSTEMS USING THE SAMEApril 2024September 2025Allow1710NoNo
18610420METHOD OF CONTROLLING ROW HAMMER AND A MEMORY DEVICEMarch 2024June 2025Allow1510NoNo
18601512SHARED POWER FOOTER CIRCUITMarch 2024February 2026Allow2310NoNo
18690274MEMORY AND READING, WRITING AND ERASING METHODS THEREOFMarch 2024February 2026Allow2301NoNo
18599540MAGNETIC MEMORY DEVICEMarch 2024January 2026Allow2301NoNo
18595035HEADER CIRCUIT PLACEMENT IN MEMORY DEVICEMarch 2024October 2025Allow2010NoNo
18593370CROSSBAR ARRAY DEVICE APPLICABLE TO GRAPH DATA ANALYSIS, NUEROMORPHIC DEVICE INCLUDING THE SAME, OPERATION METHOD OF CROSSBAR ARRAY DEVICE AND GRAPH DATA ANALYSIS METHOD USING CORSSBAR ARRARY DEVICEMarch 2024November 2025Allow2100NoNo
18593570SEMICONDUCTOR MEMORY DEVICE PERFORMING MULTI-BIT PROGRAMMING USING SEQUENTIAL WRITE OPERATIONS WITH REDUCED LATCH COUNTMarch 2024February 2026Allow2310YesNo
18587427MEMORY SUB-SYSTEM MANAGEMENT BASED ON DYNAMIC CONTROL OF WORDLINE START VOLTAGEFebruary 2024February 2026Allow2410YesNo
18584434MEMORY MODULE AND SYSTEM SUPPORTING PARALLEL AND SERIAL ACCESS MODESFebruary 2024December 2025Allow2110NoNo
18429450FLASH MEMORY AND WEAR LEVELING METHOD THEREOFFebruary 2024November 2025Allow2100NoNo
18428302SEMICONDUCTOR APPARATUS WITH ACTIVE INTERNAL POWER CONTROL AND MEMORY SYSTEM INCLUDING THE SAMEJanuary 2024February 2026Allow2510NoNo
18427637INRUSH CURRENT MANAGEMENT IN A MEMORY ARRAYJanuary 2024August 2025Allow1900NoNo
18424043OFFSET VOLTAGE BASED OPERATION METHOD OF MEMORY SYSTEM, DATA READ METHOD OF MEMORY AND MEMORY SYSTEMJanuary 2024December 2025Allow2310NoNo
18412380MEMORY DEVICE INCLUDING MEMORY CELLS AND EDGE CELLSJanuary 2024November 2024Allow1010NoNo
18411758RESISTIVE MEMORY WITH ENHANCED REDUNDANCY WRITINGJanuary 2024October 2025Allow2110NoNo
18396210MEMORY DEVICE AND METHOD FOR OPERATING THE SAMEDecember 2023July 2025Allow1800NoNo
18535112INTERFACE OF A MEMORY CIRCUITDecember 2023June 2025Allow1810NoNo
18531543BUFFER DEVICE WITH LOW-LATENCY SKID MODE FOR DATA FRESHNESSDecember 2023June 2025Allow1900NoNo
18530182MEMORY CELL WITH ACCESS DEVICE AND MEMORY CAPACITOR STRUCTURESDecember 2023October 2024Allow1110NoNo
18527702COLUMN ADDRESS GENERATION CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE COLUMN ADDRESS GENERATION CIRCUITDecember 2023October 2025Allow2200NoNo
18518651METHOD AND CIRCUIT FOR PROVIDING AUXILIARY POWER AND STORAGE DEVICE INCLUDING THE SAMENovember 2023February 2025Allow1510YesNo
18518444NON-VOLATILE MEMORY INCLUDING JUDGMENT MEMORY CELL STRINGS AND OPERATING METHOD THEREOFNovember 2023June 2025Allow1900NoNo
18518575PHYSICAL LAYER CIRCUIT, WRITE LEVELING TRAINING CIRCUIT AND METHOD FOR CALIBRATING ACCESS CONTROL SIGNAL TRANSMITTED TO MEMORY DEVICENovember 2023August 2025Allow2100NoNo
18516641MEMORY DEVICE WITH GLOBAL AND LOCAL LATCHESNovember 2023September 2025Allow2110NoNo
18511479POWER HOLD-OFF CIRCUITNovember 2023September 2025Allow2210YesNo
18511473POWER HOLD-OFF CIRCUITNovember 2023September 2025Allow2210YesNo
18503258SEMICONDUCTOR DEVICENovember 2023December 2025Abandon2510NoNo
18558695BURST ACCESS MEMORY AND METHOD OF OPERATING A BURST ACCESS MEMORYNovember 2023June 2025Allow2000NoNo
18499048ENHANCED CHIP SELECT SIGNAL TRAININGOctober 2023September 2025Allow2310NoNo
18484233CONSTRUCTING AND PROGRAMMING QUANTUM HARDWARE FOR ROBUST QUANTUM ANNEALING PROCESSESOctober 2023July 2024Allow1010NoNo
18373231DATA LOGIC PROCESSING CIRCUIT INTEGRATED IN A DATA STORAGE CIRCUITSeptember 2023September 2025Allow2310NoNo
18468500RESISTIVE MEMORY DEVICE AND METHOD OF OPERATING THE RESISTIVE MEMORY DEVICESeptember 2023May 2025Allow2000NoNo
18367488RESISTIVE RANDOM ACCESS MEMORY AND MEMORY MINI-ARRAY THEREOF WITH IMPROVED RELIABILITYSeptember 2023January 2026Allow2821NoNo
18367120DYNAMIC PEAK POWER MANAGEMENT FOR MULTI-DIE OPERATIONSSeptember 2023April 2025Allow1910NoNo
18241812IN-MEMORY COMPUTATION SYSTEM USING A SEGMENTED MEMORY ARCHITECTURE WITH LOCAL MEMORY ARRAY SELECTION FOR SIMULTANEOUSLY PERFORMING MULTIPLE INDEPENDENT OPERATIONSSeptember 2023January 2026Allow2911NoNo
18455876POWER CONTROL CIRCUIT FOR MEMORY CIRCUIT BASED ON COMPLEMENTARY FIELD EFFECT TRANSISTOR DEVICESAugust 2023October 2025Allow2610NoNo
18231461PROCESS AND TEMPERATURE COMPENSATED WORD LINE UNDERDRIVE SCHEME FOR SRAMAugust 2023July 2025Allow2301NoNo
18231053MEMORY APPARATUS USING SEMICONDUCTOR DEVICESAugust 2023March 2025Allow2000NoNo
18366368FLASH MEMORY FOR ADJUSTING TRIP VOLTAGE USING VOLTAGE REGULATOR AND SAMPLING SWITCH CIRCUIT AND SENSING METHOD THEREOFAugust 2023August 2025Allow2520YesNo
18364481VOLTAGE GENERATING CIRCUIT AND MEMORYAugust 2023March 2025Allow2000NoNo
18229249SCHEDULED INTERRUPTS FOR PEAK POWER MANAGEMENT TOKEN RING COMMUNICATIONAugust 2023March 2025Allow2000NoNo
18362221MEMORY SYSTEMJuly 2023July 2024Allow1210NoNo
18362863MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAMEJuly 2023July 2024Allow1210NoNo
18352625SYSTEM FOR SAVING LEAKAGE POWER IN STATIC RANDOM ACCESS MEMORY (SRAM) USING LIGHT SLEEP MODEJuly 2023March 2025Allow2000NoNo
18214714Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material and Method of OperatingJune 2023July 2024Allow1310NoNo
18340589MEMORY MODULE INTERFACESJune 2023July 2024Allow1310NoNo
18336814REDUCING DISTURBANCE IN CROSSBAR ARRAY CIRCUITSJune 2023July 2025Allow2520NoNo
18336395NOVEL DYNAMIC INHIBIT VOLTAGE TO REDUCE WRITE POWER FOR RANDOM-ACCESS MEMORYJune 2023October 2024Allow1610NoNo
18336758SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINEJune 2023December 2025Allow3020NoNo
18328836Low Power Scheme for Power Down in Integrated Dual Rail SRAMsJune 2023February 2026Allow3230NoNo
18326057Systems and Methods for a Power Wake-Up Sequence In a Memory DeviceMay 2023September 2025Allow2811NoNo
18204266METHOD OF PROGRAMMING MEMORY DEVICE AND RELATED MEMORY DEVICEMay 2023July 2024Allow1410YesNo
18203223OUT-OF-ORDER PROGRAMMING OF FIRST WORDLINE IN A PHYSICAL UNIT OF A MEMORY DEVICEMay 2023June 2025Allow2410YesNo
18304297MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAMEApril 2023October 2024Allow1810NoNo
18043103SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICEFebruary 2023October 2024Allow1900NoNo
18113675MEMORY CELL AND ARRAY STRUCTURE OF NON-VOLATILE MEMORY AND ASSOCIATED CONTROL METHODFebruary 2023March 2025Allow2400NoNo
18096072MEMORY ARRAY STRUCTURES AND METHODS OF FORMING MEMORY ARRAY STRUCTURESJanuary 2023August 2024Allow2010NoNo
18089668MEMORY AND SYSTEM SUPPORTING PARALLEL AND SERIAL ACCESS MODESDecember 2022November 2023Allow1110NoNo
18088216HEADER CIRCUIT PLACEMENT IN MEMORY DEVICEDecember 2022October 2023Allow1010NoNo
18080752SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD CAPABLE OF PROGRAMMING WITH REDUCED POWER CONSUMPTIONDecember 2022May 2025Allow2910NoNo
18009886FLASH MEMORY MANAGEMENT DEVICE AND FLASH MEMORY MANAGEMENT METHODDecember 2022February 2025Allow2610NoNo
18064048SYSTEM AND METHOD OF POWER MANAGEMENT IN MEMORY DESIGNDecember 2022April 2024Allow1610NoNo
18076628SEMICONDUCTOR MEMORY DEVICE AND METHODS OF OPERATIONDecember 2022February 2025Allow2710YesNo
17991489METHODS FOR MEMORY POWER MANAGEMENT AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAMENovember 2022February 2024Allow1520NoNo
17982550MEMORY DEVICE FOR DETECTING FAIL CELL AND OPERATION METHOD THEREOFNovember 2022February 2025Allow2710YesNo
18052384SEMICONDUCTOR DEVICE WITH CURRENT CONTROL FOR STANDBY MODENovember 2022February 2025Allow2710NoNo
17976423SHORTENED SINGLE-LEVEL CELL MEMORY PROGRAMMINGOctober 2022February 2025Allow2710NoNo
17971763MULTIPURPOSE WORDLINE UNDERDRIVE CIRCUITS, DEVICES, AND SYSTEMSOctober 2022January 2025Allow2710NoNo
18048594ANALOG PROGRAMMABLE RESISTIVE MEMORYOctober 2022August 2025Allow3320YesNo
17970311RESISTIVE MEMORY DEVICE PROGRAMMED USING BI-DIRECTIONAL DRIVING CURRENTSOctober 2022October 2025Allow3510NoNo
17962872NONVOLATILE MEMORY DEVICE AND STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE INCLUDING A VOLTAGE SELECTOROctober 2022May 2025Allow3120YesNo
17955733MEMORY DEVICE CONFIGURED TO REDUCE DEGRADATION OF ADJACENT WORD LINES AND OPERATING METHOD THEREOFSeptember 2022December 2024Allow2610YesNo
17952659SEMICONDUCTOR DEVICESeptember 2022February 2024Allow1710NoNo
17948582DRIFT COMPENSATION FOR CODEWORDS IN MEMORYSeptember 2022June 2024Allow2100NoNo
17948442CONFIGURABLE GROUND SWITCH TO SUPPORT POWER DELIVERY BETWEEN TWO SUPPLY DOMAINSSeptember 2022April 2024Allow1910NoNo
17947301METHOD OF RESETTING STORAGE DEVICE, STORAGE DEVICE PERFORMING THE SAME AND DATA CENTER INCLUDING THE SAMESeptember 2022August 2023Allow1110NoNo
17944829SYSTEMS AND METHODS FOR MEMORY CELL ACCESSESSeptember 2022January 2024Allow1610NoNo
17941799MULTI-DECK MEMORY DEVICE INCLUDING BUFFER CIRCUITRY UNDER ARRAYSeptember 2022August 2023Allow1110NoNo
17900075PARALLEL PIPE LATCH FOR MEMORY ACCESS OPERATIONSAugust 2022December 2025Allow4030NoNo
17899859MEMORY ARRAY WITH COMPENSATED WORD LINE ACCESS DELAYAugust 2022May 2024Allow2000NoNo
17900288SEMICONDUCTOR STORAGE DEVICE THAT VARIES VOLTAGES APPLIED TO BIT LINESAugust 2022March 2025Allow3011NoNo
17896506MEMORY DEVICE AND MANUFACTURING METHOD AND TEST METHOD OF THE SAMEAugust 2022April 2025Allow3220NoNo
17894398CODING TO DECREASE ERROR RATE DISCREPANCY BETWEEN PAGESAugust 2022August 2024Allow2410NoNo
17892600MEMORY DEVICE AND METHOD OF OPERATING THE SAMEAugust 2022April 2024Allow1900NoNo
17891386SEMICONDUCTOR STORAGE DEVICEAugust 2022August 2024Allow2410NoNo
17883998MEMORY DEVICE INCLUDING MEMORY CELLS AND EDGE CELLSAugust 2022October 2023Allow1410NoNo
17876077STORAGE DEVICE INCLUDING AUXILIARY POWER SUPPLY AND METHOD OF OPERATING THE SAMEJuly 2022July 2024Allow2310YesNo
17814673MEMORY DEVICE HAVING A COMPARATOR CIRCUITJuly 2022July 2024Allow2320NoNo
17871144MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAMEJuly 2022March 2023Allow800NoNo
17814011WORD LINE DRIVER ARRAY AND MEMORYJuly 2022April 2024Allow2120NoNo
17813715SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAMEJuly 2022February 2024Allow1800NoNo
17868750UNIPOLAR PROGRAMMING OF MEMORY CELLSJuly 2022March 2025Allow3230YesNo
17813147WORD LINE DRIVER CIRCUIT AND MEMORYJuly 2022March 2024Allow2010NoNo
17864850DYNAMIC PEAK POWER MANAGEMENT FOR MULTI-DIE OPERATIONSJuly 2022June 2023Allow1110YesNo
17863407MEMORY DEVICE, VOLTAGE GENERATING DEVICE AND VOLTAGE GENERATING METHOD THEREOFJuly 2022January 2024Allow1800NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner ALROBAIE, KHAMDAN N.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
8
Examiner Affirmed
7
(87.5%)
Examiner Reversed
1
(12.5%)
Reversal Percentile
25.0%
Lower than average

What This Means

With a 12.5% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
22
Allowed After Appeal Filing
8
(36.4%)
Not Allowed After Appeal Filing
14
(63.6%)
Filing Benefit Percentile
59.6%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 36.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner ALROBAIE, KHAMDAN N - Prosecution Strategy Guide

Executive Summary

Examiner ALROBAIE, KHAMDAN N works in Art Unit 2824 and has examined 676 patent applications in our dataset. With an allowance rate of 87.6%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 21 months.

Allowance Patterns

Examiner ALROBAIE, KHAMDAN N's allowance rate of 87.6% places them in the 67% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by ALROBAIE, KHAMDAN N receive 1.42 office actions before reaching final disposition. This places the examiner in the 23% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by ALROBAIE, KHAMDAN N is 21 months. This places the examiner in the 91% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -0.7% benefit to allowance rate for applications examined by ALROBAIE, KHAMDAN N. This interview benefit is in the 11% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 34.3% of applications are subsequently allowed. This success rate is in the 76% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 31.7% of cases where such amendments are filed. This entry rate is in the 46% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 66.7% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 55% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 61.9% of appeals filed. This is in the 40% percentile among all examiners. Of these withdrawals, 46.2% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 58.8% are granted (fully or in part). This grant rate is in the 62% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.6% of allowed cases (in the 62% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 31% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.