USPTO Art Unit 2814 Prosecution Statistics

Art Unit Information

Art Unit: 2814
Group: 2810
Tech Center: 2800
Total Cases: 19,806
Last Active: December 2024

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18985575METHOD FOR MANUFACTURING AN OXRAM-TYPE RESISTIVE MEMORY CELL AND ASSOCIATED OXRAM-TYPE MEMORY CELLDecember 2024June 2025Allow500YesNo
18934307Integrated Structure having a P-type Semiconductor Diffusion Barrier Layer Forming a Van Der Waals Junction with a P-type Substrate and Electronic Device Including the SameNovember 2024February 2025Allow400NoNo
18910873PROCESS TECHNIQUE FOR EMBEDDED MEMORYOctober 2024June 2025Allow812NoNo
18729977HIGH-SPEED LAYOUT METHOD AND LAYOUT DEVICE FOR PHOTOVOLTAIC MODULESJuly 2024November 2024Allow400NoNo
18766596TRENCH ISOLATION STRUCTURES WITH VARYING DEPTHS AND METHOD OF FORMING THE SAMEJuly 2024December 2024Allow510NoNo
18761373SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMINGJuly 2024June 2025Allow1110NoNo
18760244Memory Arrays Comprising Strings Of Memory Cells With Conductive IslandsJuly 2024May 2025Allow1010NoNo
18760041TEMPERATURE SENSING AND COMPUTING DEVICE AND ARRAY BASED ON TaOx ELECTRONIC MEMRISTORJuly 2024February 2025Allow720NoNo
18758386DISPLAY DEVICE WITH SLITS AND ISLAND-SHAPED PROTRUDING PORTIONS IN THE BENDING REGIONSJune 2024February 2025Allow700NoNo
18748017RECONFIGURABLE HETEROJUNCTION MEMRISTOR, CONTROL METHOD, FABRICATION METHOD AND APPLICATION THEREOFJune 2024November 2024Allow501NoNo
18744482FULLY MOLDED STRUCTURE WITH MULTI-HEIGHT COMPONENTS COMPRISING BACKSIDE CONDUCTIVE MATERIAL AND METHOD FOR MAKING THE SAMEJune 2024January 2025Allow710NoNo
18744359PIXEL WITH AN IMPROVED QUANTUM EFFICIENCY HAVING A MICRO-LENS AND A DIFFRACTIVE STRUCTUREJune 2024February 2025Allow800NoNo
18738970MICROELECTRONIC DEVICES WITH LOWER RECESSED CONDUCTIVE STRUCTURES AND RELATED METHODSJune 2024April 2025Allow1010NoNo
18734635TRANSISTORS WITH STACKED CHANNELS AND THE METHODS OF FORMING THE SAMEJune 2024June 2025Allow1211NoNo
18732738THREE-DIMENSIONAL MEMORY ARRAY WITH LOCAL LINE SELECTORJune 2024May 2025Allow1110NoNo
18732022SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2024May 2025Allow1210NoNo
18671174METHOD AND DEVICE FOR CLEANING SUBSTRATESMay 2024April 2025Allow1110NoNo
18710346METHOD OF DEPOSITION ON A SUBSTRATE USED FOR THE MANUFACTURE OF A SOLAR CELL, SCREEN FOR SCREEN PRINTING ON A SUBSTRATE USED FOR THE MANUFACTURE OF A SOLAR CELL, PROCESSING LINE FOR PROCESSING A SUBSTRATE USED FOR THE MANUFACTURE OF A SOLAR CELLMay 2024January 2025Allow910YesNo
18662578SYSTEMS, DEVICES, AND METHODS FOR GAS SENSINGMay 2024May 2025Allow1210NoNo
18655471SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGEMay 2024July 2025Allow1410YesNo
18652868PASSIVATION SCHEME FOR PAD OPENINGS AND TRENCHESMay 2024June 2025Allow1300YesNo
18652628SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAMEMay 2024May 2025Allow1310NoNo
18646277SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAMEApril 2024March 2025Allow1100NoNo
18644270METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICEApril 2024March 2025Allow1100NoNo
18640125METHOD FOR ENHANCING STABILITY OF N-TYPE SEMICONDUCTOR THROUGH OXYGEN ELIMINATIONApril 2024October 2024Allow520NoNo
18636490Source/Drain Device and Method of Forming ThereofApril 2024February 2025Allow1000NoNo
18635530SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAMEApril 2024November 2024Allow700NoNo
18635027METHOD FOR FORMING A SEMICONDUCTOR MEMORY DEVICEApril 2024April 2025Allow1200NoNo
18624386Isolation Structures Of Semiconductor DevicesApril 2024March 2025Allow1100NoNo
18697445METHOD FOR STRIPPING GALLIUM NITRIDE SUBSTRATEMarch 2024November 2024Allow810NoNo
18608301LOW NOISE GEIGER-MODE AVALANCHE PHOTODIODE AND MANUFACTURING PROCESSMarch 2024March 2025Allow1200NoNo
18608383SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAMEMarch 2024January 2025Allow910NoNo
18398429FLEXIBLE FABRIC BASED TRANSISTORS FOR ELECTROMECHANICAL SENSING ON 2D and 3D CURVED SURFACESMarch 2024March 2025Allow1520NoNo
18595033Fill Structures With Air GapsMarch 2024February 2025Allow1100NoNo
18594321SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICEMarch 2024January 2025Allow1010NoNo
185937273D SEMICONDUCTOR MEMORY DEVICES AND STRUCTURESMarch 2024September 2024Allow721YesNo
185923833D SEMICONDUCTOR MEMORY DEVICES AND STRUCTURESFebruary 2024September 2024Allow711YesNo
18587993SEMICONDUCTOR SUBSTRATE STRUCTURE, SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFFebruary 2024August 2024Allow610NoNo
18584469SEMICONDUCTOR PACKAGEFebruary 2024April 2025Allow1310YesNo
18582672SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFFebruary 2024December 2024Allow1010NoNo
18582162CAPACITOR NETWORKS FOR HARMONIC CONTROL IN POWER DEVICESFebruary 2024April 2025Allow1410NoNo
18442792THREE-DIMENSIONAL MEMORY DEVICE WITH BACKSIDE SUPPORT PILLAR STRUCTURES AND METHODS OF FORMING THE SAMEFebruary 2024May 2025Allow1521NoNo
18429755SEMICONDUCTOR STRUCTURE WITH EXTENDED CONTACT STRUCTUREFebruary 2024April 2025Allow1410NoNo
18430568INTEGRATED FAN-OUT PACKAGEFebruary 2024February 2025Allow1310NoNo
18428325Integrated Assemblies Having Transistor Body Regions Coupled to Carrier-Sink-Structures; and Methods of Forming Integrated AssembliesJanuary 2024October 2024Allow810NoNo
18426010DIELECTRIC ISOLATION STRUCTURE FOR MULTI-GATE TRANSISTORSJanuary 2024March 2025Allow1310NoNo
18425389LTHC AS CHARGING BARRIER IN INFO PACKAGE FORMATIONJanuary 2024February 2025Allow1320NoNo
18422778SEMICONDUCTOR PACKAGE HAVING CHIP STACKJanuary 2024February 2025Allow1301NoNo
18422795CIRCUITRY FOR ELECTRICAL REDUNDANCY IN BONDED STRUCTURESJanuary 2024April 2025Allow1421YesNo
18423229SEMICONDUCTOR PACKAGEJanuary 2024August 2024Allow700NoNo
18417199LEFT-ISD-LTSEE {Low Electrostatic Field Transistor (LEFT) Using Implanted S/D and Selective Low Temperature Epitaxial Extension (ISD-LTSEE)}January 2024May 2024Allow420YesNo
18413716Fin Field-Effect Transistor Device with Composite Liner for the FinJanuary 2024May 2025Allow1620YesNo
18410917SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTSJanuary 2024September 2024Allow800NoNo
18409509INTEGRATED CIRCUIT STRUCTURES HAVING GERMANIUM-BASED CHANNELSJanuary 2024November 2024Allow1001NoNo
18404855SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJanuary 2024January 2025Allow1320NoNo
18404178DEVICE OVER PHOTODETECTOR PIXEL SENSORJanuary 2024June 2025Allow1710NoNo
18402734SEMICONDUCTOR DEVICEJanuary 2024March 2025Allow1410YesNo
18403268ACTIVE VIAJanuary 2024October 2024Allow921YesNo
18402173Device having an Air Gap Adjacent to a Contact Plug and Covered by a Doped Dielectric LayerJanuary 2024May 2025Allow1711NoNo
18399178LASER ABLATION-BASED SURFACE PROPERTY MODIFICATION AND CONTAMINATION REMOVALDecember 2023May 2025Allow1620NoNo
18575243METHOD OF MANUFACTURING GALLIUM NITRIDE SINGLE-CRYSTAL SUBSTRATE AND METHOD OF MANUFACTURING SINGLE-CRYSTAL SUBSTRATE OF NITRIDE OF GROUP 13 ELEMENT IN PERIODIC TABLEDecember 2023January 2025Allow1310NoNo
18398120SUBSTRATES FOR SEMICONDUCTOR PACKAGES, INCLUDING HYBRID SUBSTRATES FOR DECOUPLING CAPACITORS, AND ASSOCIATED DEVICES, SYSTEMS, AND METHODSDecember 2023November 2024Allow1000NoNo
18394479LINE BENDING CONTROL FOR MEMORY APPLICATIONSDecember 2023December 2024Allow1210NoNo
18394273MICROELECTRONIC DEVICES COMPRISING STACK STRUCTURES HAVING PILLARS AND ELLIPTICAL CONDUCTIVE CONTACTSDecember 2023November 2024Allow1110NoNo
18393002SEMICONDUCTOR STORAGE DEVICEDecember 2023December 2024Allow1201NoNo
18538152LASER ANNEALING APPARATUS, LASER ANNEALING METHOD, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEDecember 2023July 2024Allow700NoNo
18533907PREPARATION METHOD OF CONTACT MATERIAL WITH HIGH THERMAL STABILITY AND LOW CONTACT RESISTANCE BASED ON MGAGSB-BASED THERMOELECTRIC MATERIALDecember 2023April 2024Allow410YesNo
18526444MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEDecember 2023December 2024Allow1300NoNo
18524033SEMICONDUCTOR DEVICENovember 2023June 2024Allow700NoNo
18525583INTEGRATED CIRCUIT WITH BIOFETSNovember 2023September 2024Allow1010NoNo
18520958Semiconductor Device and Method of ManufactureNovember 2023February 2025Allow1511NoNo
18519872Semiconductor Memory Device having a Circuit Chip Bonded to a Memory Array Chip and including a Solid-State Drive Controller and a Control CircuitNovember 2023May 2025Allow1800NoNo
18520214SEMICONDUCTOR DEVICE STRUCTURENovember 2023April 2025Allow1610NoNo
18519964SEMICONDUCTOR DEVICES AND HYBRID TRANSISTORSNovember 2023September 2024Allow1010NoNo
18518448SEMICONDUCTOR PACKAGESNovember 2023December 2024Allow1320YesNo
18511695SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFNovember 2023December 2024Allow1301NoNo
18509601SEMICONDUCTOR DEVICE WITH CONDUCTIVE CAP LAYER OVER CONDUCTIVE PLUG AND METHOD FOR FORMING THE SAMENovember 2023January 2025Allow1420NoNo
183895823D SEMICONDUCTOR DEVICES AND STRUCTURES WITH ELECTRONIC CIRCUIT UNITSNovember 2023April 2024Allow510NoNo
18506742SEMICONDUCTOR PACKAGE STRUCTURE AND FABRICATION METHOD THEREOFNovember 2023August 2024Allow901NoNo
18506906METHOD OF MANUFACTURING SEMICONDUCTOR DEVICENovember 2023February 2025Abandon1510NoNo
18504027METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICENovember 2023December 2024Allow1300NoNo
18503453System, Device and Methods of ManufactureNovember 2023September 2024Allow1110NoNo
18503242DISPLAY DEVICENovember 2023August 2024Allow900NoNo
18503140METHOD FOR FORMING RESISTIVE RANDOM ACCESS MEMORY STRUCTURENovember 2023October 2024Allow1110NoNo
18501489SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICENovember 2023April 2025Allow1820YesNo
18500183DISPLAY DEVICENovember 2023August 2024Allow910NoNo
18499436SEMICONDUCTOR DEVICENovember 2023November 2024Allow1310YesNo
18386112VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAMENovember 2023September 2024Allow1110YesNo
18499703MEMORY DEVICESNovember 2023August 2024Allow1010NoNo
183853833D SEMICONDUCTOR MEMORY DEVICE AND STRUCTUREOctober 2023May 2025Abandon1822YesNo
18384916FINGERPRINT SENSOR, METHOD FOR MANUFACTURING FINGERPRINT SENSOR, AND DISPLAY DEVICE INCLUDING FINGERPRINT SENSOROctober 2023September 2024Allow1100NoNo
18497035NOVEL 3D RAM SL/BL CONTACT MODULATIONOctober 2023October 2024Allow1211NoNo
18496372SEMICONDUCTOR PACKAGEOctober 2023May 2024Allow700YesNo
18496126A FLEXIBLE ELECTRONIC DISPLAY DEVICEOctober 2023September 2024Allow1010NoNo
18384477SEMICONDUCTOR MEMORY DEVICEOctober 2023September 2024Allow1100NoNo
18383461LATERAL DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICEOctober 2023July 2024Allow910NoNo
18491794PACKAGE STRUCTUREOctober 2023January 2025Allow1510NoNo
18491678MEMORY DEVICES AND ELECTRONIC SYSTEMSOctober 2023May 2024Allow700NoNo
18381929Method of Forming a Semiconductor ModuleOctober 2023May 2024Allow700NoNo
18382055METHOD FOR FORMING RESISTIVE RANDOM-ACCESS MEMORY DEVICEOctober 2023August 2024Allow1000NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2814.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
221
Examiner Affirmed
153
(69.2%)
Examiner Reversed
68
(30.8%)
Reversal Percentile
42.9%
Lower than average

What This Means

With a 30.8% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
915
Allowed After Appeal Filing
368
(40.2%)
Not Allowed After Appeal Filing
547
(59.8%)
Filing Benefit Percentile
85.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 40.2% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2814 - Prosecution Statistics Summary

Executive Summary

Art Unit 2814 is part of Group 2810 in Technology Center 2800. This art unit has examined 19,806 patent applications in our dataset, with an overall allowance rate of 81.0%. Applications typically reach final disposition in approximately 24 months.

Comparative Analysis

Art Unit 2814's allowance rate of 81.0% places it in the 62% percentile among all USPTO art units. This art unit has an above-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2814 receive an average of 1.70 office actions before reaching final disposition (in the 39% percentile). The median prosecution time is 24 months (in the 78% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.