USPTO Examiner SALERNO SARAH KATE - Art Unit 2814

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18774617INTEGRATED LOW K RECOVERY AND ALD METAL DEPOSITION PROCESS FOR ADVANCED TECHNOLOGY NODEJuly 2024May 2025Allow1020YesNo
18761373SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMINGJuly 2024June 2025Allow1110NoNo
18738970MICROELECTRONIC DEVICES WITH LOWER RECESSED CONDUCTIVE STRUCTURES AND RELATED METHODSJune 2024April 2025Allow1010NoNo
18732738THREE-DIMENSIONAL MEMORY ARRAY WITH LOCAL LINE SELECTORJune 2024May 2025Allow1110NoNo
18671174METHOD AND DEVICE FOR CLEANING SUBSTRATESMay 2024April 2025Allow1110NoNo
18640295SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICEApril 2024February 2026Allow2201NoNo
18638343Methods of Forming Semiconductor DevicesApril 2024October 2025Allow1820NoNo
18608383SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAMEMarch 2024January 2025Allow910NoNo
185938843D SEMICONDUCTOR MEMORY DEVICES AND STRUCTURESMarch 2024August 2025Allow1721YesNo
185937273D SEMICONDUCTOR MEMORY DEVICES AND STRUCTURESMarch 2024September 2024Allow721YesNo
185923833D SEMICONDUCTOR MEMORY DEVICES AND STRUCTURESFebruary 2024September 2024Allow711YesNo
18442792THREE-DIMENSIONAL MEMORY DEVICE WITH BACKSIDE SUPPORT PILLAR STRUCTURES AND METHODS OF FORMING THE SAMEFebruary 2024May 2025Allow1521NoNo
18403268ACTIVE VIAJanuary 2024October 2024Allow921YesNo
18393002SEMICONDUCTOR STORAGE DEVICEDecember 2023December 2024Allow1201NoNo
18392421WAFER LEVEL FAN OUT SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFDecember 2023January 2026Allow2501NoNo
18535274SEMICONDUCTOR DEVICEDecember 2023May 2025Allow1811NoNo
18526317FinFET Device and Method of Forming SameDecember 2023January 2026Allow2610NoNo
18524552THREE-DIMENSIONAL MEMORY DEVICE WITH BACKSIDE SUPPORT PILLAR STRUCTURES AND METHODS OF FORMING THE SAMENovember 2023July 2025Allow2010NoNo
18511695SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFNovember 2023December 2024Allow1301NoNo
18509601SEMICONDUCTOR DEVICE WITH CONDUCTIVE CAP LAYER OVER CONDUCTIVE PLUG AND METHOD FOR FORMING THE SAMENovember 2023January 2025Allow1420NoNo
183853833D SEMICONDUCTOR MEMORY DEVICE AND STRUCTUREOctober 2023May 2025Abandon1822YesNo
18484492SEMICONDUCTOR MEMORY DEVICEOctober 2023June 2025Allow2121NoNo
18372938GLASS FOR USE IN WAVELENGTH CONVERSION MATERIAL, WAVELENGTH CONVERSION MATERIAL, WAVELENGTH CONVERSION MEMBER, AND LIGHT-EMITTING DEVICESeptember 2023January 2026Allow2720NoNo
18369565LIGHT EMITTING DEVICE AND LIGHTING APPARATUS INCLUDING THE SAMESeptember 2023September 2025Allow2430YesNo
18450626SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR MEMORY DEVICEAugust 2023April 2025Allow2011NoNo
18234029SEMICONDUCTOR DEVICE WITH CONDUCTIVE CAP LAYER OVER CONDUCTIVE PLUG AND METHOD FOR PREPARINGING THE SAMEAugust 2023January 2025Allow1720NoNo
18276025LIGHT EMITTING DEVICE AND ELECTRONIC APPARATUS USING SAMEAugust 2023March 2026Allow3110NoNo
18365758SEMICONDUCTOR DEVICES INCORPORATING QUANTUM DOTSAugust 2023September 2023Allow200NoNo
18365698APPARATUSES INCLUDING BAND OFFSET MATERIALS, AND RELATED MEMORY DEVICESAugust 2023February 2025Allow1911NoNo
18220073VERTICAL MEMORY DEVICESJuly 2023August 2025Allow2541YesNo
18270267LIGHT-RECEIVING DEVICE AND COMMUNICATION DEVICEJune 2023March 2026Abandon3310NoNo
18342366METHOD FOR ANALYZING LAYOUT PATTERN DENSITYJune 2023February 2026Allow3200NoNo
18321020SEMICONDUCTOR DEVICEMay 2023January 2026Allow3211NoNo
18319603BULK-ACOUSTIC WAVE RESONATORMay 2023March 2025Abandon2201NoNo
18305685SEMICONDUCTOR STORAGE DEVICEApril 2023September 2024Allow1701NoNo
18297679IMAGE SENSORSApril 2023September 2024Allow1801NoNo
18188946THREE-DIMENSIONAL (3D) SEMICONDUCTOR MEMORY DEVICEMarch 2023July 2024Allow1610YesNo
18185250DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2023February 2026Allow3511NoNo
18184532SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOFMarch 2023August 2025Allow2922NoNo
18118006METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICEMarch 2023April 2025Allow2621NoNo
18040904LIGHT EMITTING DIODE HAVING PLURALITY OF LIGHT EMITTING CELLSFebruary 2023February 2026Allow3611NoNo
18162720SEMICONDUCTOR DEVICEFebruary 2023August 2024Allow1811NoNo
18158576MICROELECTRONIC DEVICES WITH TIERED DECKS OF ALIGNED PILLARS EXHIBITING BENDING AND RELATED METHODSJanuary 2023August 2024Allow1911NoNo
18100152BONDED SEMICONDUCTOR DIE ASSEMBLY CONTAINING THROUGH-STACK VIA STRUCTURES AND METHODS FOR MAKING THE SAMEJanuary 2023January 2025Allow2411NoNo
18099462SYSTEM AND METHODS FOR MANAGING HEAT IN A PHOTONIC INTEGRATED CIRCUITJanuary 2023May 2025Allow2721NoNo
18094906Integrated Assemblies and Methods of Forming Integrated AssembliesJanuary 2023November 2024Allow2230NoNo
18090049THREE DIMENSIONAL (3D) MEMORY DEVICE AND FABRICATION METHODDecember 2022March 2026Allow3811NoNo
18145275THREE-DIMENSIONAL MEMORY DEVICE INCLUDING DISCRETE CHARGE STORAGE ELEMENTS AND METHODS OF FORMING THE SAMEDecember 2022August 2025Allow3231NoNo
18085072SEMICONDUCTOR DEVICE HAVING A SOLDERED JOINT WITH ONE OR MORE INTERMETALLIC PHASESDecember 2022August 2024Allow1920NoNo
18065997SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGEDecember 2022July 2024Allow2011NoNo
18064449SEMICONDUCTOR MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE SAMEDecember 2022December 2024Allow2420NoNo
18078133SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHODDecember 2022January 2025Abandon2621NoNo
18077647METHOD AND STRUCTURE FOR FORMING STAIRS IN THREE-DIMENSIONAL MEMORY DEVICESDecember 2022August 2025Allow3241YesNo
18071063SEMICONDUCTOR MEMORY DEVICENovember 2022July 2024Allow2011NoNo
18071118SEMICONDUCTOR MEMORY DEVICENovember 2022September 2024Allow2221NoNo
17990012COLOR TUNABLE PCLEDS BASED ON TEMPORAL SATURATION OF PHOSPHORSNovember 2022November 2025Allow3610NoNo
17979511SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICENovember 2022September 2025Allow3431NoNo
18047245METHODS OF FORMING MICROELECTRONIC DEVICESOctober 2022February 2024Allow1600NoNo
17936479THREE-DIMENSIONAL MEMORY DEVICE CONTAINING BRIDGES FOR ENHANCED STRUCTURAL SUPPORT AND METHODS OF FORMING THE SAMESeptember 2022November 2025Allow3711NoNo
17953009METHOD OF MANUFACTURING SEMICONDUCTOR DEVICESeptember 2022December 2025Allow3911NoNo
17907354LIGHT-EMITTING DEVICESeptember 2022August 2025Allow3420YesNo
17907195An Optoelectronic ApparatusSeptember 2022October 2025Allow3611NoNo
17933513Method for Generating Vertical Channel Structures in Three-Dimensionally Integrated Semiconductor MemoriesSeptember 2022November 2025Allow3710NoNo
17940362SEMICONDUCTOR DEVICE WITH BURIED GATE STRUCTURES AND METHOD FOR PREPARING THE SAMESeptember 2022April 2025Allow3110NoNo
17930236SEMICONDUCTOR MEMORY DEVICESeptember 2022October 2025Allow3811YesNo
17899456SEMICONDUCTOR DEVICEAugust 2022July 2025Allow3511NoNo
17897843SEMICONDUCTOR MEMORY DEVICEAugust 2022March 2025Abandon3121NoNo
17822708MICROELECTRONIC DEVICES INCLUDING CONDUCTIVE STRUCTURESAugust 2022July 2024Allow2210NoNo
17820708METHOD FOR MANUFACTURING RESISTIVE MEMORY CELLSAugust 2022April 2025Allow3200NoNo
17884620NITRIDE SEMICONDUCTOR AND SEMICONDUCTOR DEVICEAugust 2022September 2025Allow3711YesNo
17878575METHOD FOR REDUCING PARASITIC JUNCTION FIELD EFFECT TRANSISTOR RESISTANCEAugust 2022September 2025Allow3720NoNo
17876409STRUCTURES AND METHODS FOR TRENCH ISOLATIONJuly 2022April 2024Allow2110NoNo
17812856SYSTEMS AND METHODS FOR PROVIDING GETTERS IN MICROELECTROMECHANICAL SYSTEMSJuly 2022April 2025Allow3331YesNo
17811143LIGHT EMITTING DEVICEJuly 2022March 2025Allow3211NoNo
17809710Rotate Redundancy Method for LED Array Placement to Correct Front of Screen ArtifactsJune 2022January 2025Allow3101NoNo
17808981SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAMEJune 2022October 2025Allow3950NoNo
17841755SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJune 2022September 2024Allow2721YesNo
17841348SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR MEMORY DEVICEJune 2022November 2023Allow1700NoNo
17837517EMBEDDED METAL INSULATOR METAL STRUCTUREJune 2022April 2024Allow2220YesNo
17756853SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHODJune 2022May 2025Allow3610NoNo
17829699METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJune 2022February 2025Allow3210NoNo
17827473WAFER SCALE PACKAGINGMay 2022May 2024Abandon2410NoNo
17752935BONDED SUBSTRATE, AND BONDED SUBSTRATE MANUFACTURING METHODMay 2022May 2025Allow3611NoNo
17752845Semiconductor manufacturing processMay 2022June 2025Allow3710NoNo
177499573D DESIGN WITH METHOD OF INTEGRATION OF HIGH PERFORMANCE TRANSISTORS USING A STREAMLINED PROCESS FLOWMay 2022May 2025Allow3611NoNo
17664246METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTUREMay 2022December 2022Allow700NoNo
17747314METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTUREMay 2022March 2025Allow3410NoNo
17746996MEMORY STRUCTUREMay 2022April 2025Allow3511NoNo
17747064MEMORY STRUCTURE AND METHOD FOR MANUFACTURING THE SAMEMay 2022July 2025Allow3822NoNo
17777765COMPONENT MOUNTING METHOD, AND COMPONENT MOUNTING SYSTEMMay 2022February 2026Abandon4521NoNo
17739913SEMICONDUCTOR STRUCTURE AND FABRICATION METHODMay 2022January 2025Allow3241NoNo
17739387PHOTOSENSING PIXEL INCLUDING SELF-ALIGNED LIGHT SHIELDING LAYERMay 2022March 2025Allow3411NoNo
17738409METHOD FOR FABRICATING IMAGE SENSORMay 2022April 2024Allow2411YesNo
17661781MICROELECTRONIC DEVICES INCLUDING STAIR STEP STRUCTURES, AND RELATED ELECTRONIC DEVICES AND METHODSMay 2022March 2024Allow2211NoNo
17721257OPTICAL SENSOR WITH OPTICAL LAYER AND METHOD OF MANUFACTUREApril 2022October 2024Abandon3010NoNo
17768223DISPLAY SUBSTRATE AND PREPARATION METHOD THEREFOR, AND DISPLAY DEVICEApril 2022August 2025Allow4021NoNo
17714814SEMICONDUCTOR DEVICES INCORPORATING QUANTUM DOTSApril 2022April 2023Allow1221YesNo
17657770FinFET Device and Method of Forming SameApril 2022August 2023Allow1710NoNo
17762871LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, AND DISPLAY DEVICEMarch 2022March 2025Abandon3611NoNo
17762847PHOTODETECTORMarch 2022January 2026Allow4640YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner SALERNO, SARAH KATE.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
11
Examiner Affirmed
4
(36.4%)
Examiner Reversed
7
(63.6%)
Reversal Percentile
85.2%
Higher than average

What This Means

With a 63.6% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
39
Allowed After Appeal Filing
16
(41.0%)
Not Allowed After Appeal Filing
23
(59.0%)
Filing Benefit Percentile
68.4%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 41.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner SALERNO, SARAH KATE - Prosecution Strategy Guide

Executive Summary

Examiner SALERNO, SARAH KATE works in Art Unit 2814 and has examined 873 patent applications in our dataset. With an allowance rate of 71.8%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 31 months.

Allowance Patterns

Examiner SALERNO, SARAH KATE's allowance rate of 71.8% places them in the 35% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by SALERNO, SARAH KATE receive 2.72 office actions before reaching final disposition. This places the examiner in the 80% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by SALERNO, SARAH KATE is 31 months. This places the examiner in the 56% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +13.3% benefit to allowance rate for applications examined by SALERNO, SARAH KATE. This interview benefit is in the 50% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 19.7% of applications are subsequently allowed. This success rate is in the 20% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 30.3% of cases where such amendments are filed. This entry rate is in the 44% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 116.7% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 81% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 72.5% of appeals filed. This is in the 61% percentile among all examiners. Of these withdrawals, 41.4% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 33.9% are granted (fully or in part). This grant rate is in the 21% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 3.3% of allowed cases (in the 81% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.6% of allowed cases (in the 57% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Expect multiple rounds of prosecution: This examiner issues more office actions than average. Address potential issues proactively in your initial response and consider requesting an interview early in prosecution.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.