USPTO Examiner DOAN THERESA T - Art Unit 2814

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18735302SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOFJune 2024December 2025Allow1811NoNo
18732022SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2024May 2025Allow1210NoNo
18731996SEMICONDUCTOR DEVICE WITH AIR-VOID IN SPACERJune 2024February 2026Allow2010NoNo
18671941WORK FUNCTION METAL GATE DEVICEMay 2024August 2025Allow1510NoNo
18670753SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAMEMay 2024July 2025Allow1410NoNo
18657175METHODS OF FORMING SEMICONDUCTOR DEVICESMay 2024August 2025Allow1510NoNo
18656133Structure and Method for FinFET Device with Asymmetric ContactMay 2024November 2025Allow1811NoNo
18652628SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAMEMay 2024May 2025Allow1310NoNo
18646277SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAMEApril 2024March 2025Allow1100NoNo
18644270METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICEApril 2024March 2025Allow1100NoNo
18636490Source/Drain Device and Method of Forming ThereofApril 2024February 2025Allow1000NoNo
18624386Isolation Structures Of Semiconductor DevicesApril 2024March 2025Allow1100NoNo
18622230METAL GATE STRUCTURES AND METHODS OF FABRICATING THE SAME IN FIELD-EFFECT TRANSISTORSMarch 2024August 2025Allow1720NoNo
18614945SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICEMarch 2024July 2025Allow1610NoNo
18595033Fill Structures With Air GapsMarch 2024February 2025Allow1100NoNo
18429755SEMICONDUCTOR STRUCTURE WITH EXTENDED CONTACT STRUCTUREFebruary 2024April 2025Allow1410NoNo
18430568INTEGRATED FAN-OUT PACKAGEFebruary 2024February 2025Allow1310NoNo
18426010DIELECTRIC ISOLATION STRUCTURE FOR MULTI-GATE TRANSISTORSJanuary 2024March 2025Allow1310NoNo
18422778SEMICONDUCTOR PACKAGE HAVING CHIP STACKJanuary 2024February 2025Allow1301NoNo
18410917SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTSJanuary 2024September 2024Allow800NoNo
18409509INTEGRATED CIRCUIT STRUCTURES HAVING GERMANIUM-BASED CHANNELSJanuary 2024November 2024Allow1001NoNo
18404855SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJanuary 2024January 2025Allow1320NoNo
18402734SEMICONDUCTOR DEVICEJanuary 2024March 2025Allow1410YesNo
18398120SUBSTRATES FOR SEMICONDUCTOR PACKAGES, INCLUDING HYBRID SUBSTRATES FOR DECOUPLING CAPACITORS, AND ASSOCIATED DEVICES, SYSTEMS, AND METHODSDecember 2023November 2024Allow1000NoNo
18526444MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEDecember 2023December 2024Allow1300NoNo
18524033SEMICONDUCTOR DEVICENovember 2023June 2024Allow700NoNo
18520958Semiconductor Device and Method of ManufactureNovember 2023February 2025Allow1511NoNo
18520214SEMICONDUCTOR DEVICE STRUCTURENovember 2023April 2025Allow1610NoNo
18509874SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMENovember 2023March 2026Allow2800NoNo
18506742SEMICONDUCTOR PACKAGE STRUCTURE AND FABRICATION METHOD THEREOFNovember 2023August 2024Allow901NoNo
18504027METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICENovember 2023December 2024Allow1300NoNo
18493894TIN OXIDE NANORIBBON ACETONE GAS SENSOR, PREPARATION METHOD THEREOF AND USE THEREOFOctober 2023February 2026Allow2800NoNo
18383461LATERAL DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICEOctober 2023July 2024Allow910NoNo
18491794PACKAGE STRUCTUREOctober 2023January 2025Allow1510NoNo
18487213SEMICONDUCTOR STRUCTURE WITH NANOSTRUCTUREOctober 2023December 2024Allow1410NoNo
18487141MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTUREOctober 2023January 2026Allow2700NoNo
18486194MEMORY DEVICEOctober 2023December 2024Allow1420NoNo
18485322SEMICONDUCTOR DEVICEOctober 2023July 2024Allow910NoNo
18376839TRANSISTOR STRUCTURE WITH METAL INTERCONNECTION DIRECTLY CONNECTING GATE AND DRAIN/SOURCE REGIONSOctober 2023November 2024Allow1301NoNo
18285724DISPLAY APPARATUS, DISPLAY MODULE, AND ELECTRONIC DEVICEOctober 2023January 2026Allow2800NoNo
18284028SEMICONDUCTOR PACKAGESeptember 2023January 2026Allow2800NoNo
18468861DEVICE PACKAGE SUBSTRATE STRUCTURE AND METHOD THEREFORSeptember 2023May 2025Allow2011NoNo
18235585Semiconductor Device Including Bonding Pad Metal Layer StructureAugust 2023August 2024Allow1210NoNo
18232533SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFAugust 2023March 2024Allow800NoNo
18232544SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFAugust 2023December 2024Allow1611NoNo
18362401SYMMETRICAL SUBSTRATE FOR SEMICONDUCTOR PACKAGINGJuly 2023September 2024Allow1310NoNo
18362722SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2023January 2025Allow1821NoNo
18361530SEMICONDUCTOR PACKAGEJuly 2023November 2025Allow2700NoNo
18227646SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAMEJuly 2023October 2025Allow2700NoNo
18359909PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOFJuly 2023August 2024Allow1311NoNo
18360148CONTACTS FOR HIGHLY SCALED TRANSISTORSJuly 2023February 2025Allow1911YesNo
18360457ACTIVE PATTERN STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAMEJuly 2023July 2024Allow1211YesNo
18358620SEMICONDUCTOR MEMS STRUCTUREJuly 2023September 2024Allow1411NoNo
18358653HIGH VOLTAGE FIELD EFFECT TRANSISTORS WITH DIFFERENT SIDEWALL SPACER CONFIGURATIONS AND METHOD OF MAKING THE SAMEJuly 2023September 2025Allow2600NoNo
18357792FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEJuly 2023July 2024Allow1210NoNo
18357307Parasitic Capacitance ReductionJuly 2023April 2024Allow900NoNo
18357509GATE STRUCTURE AND METHODS THEREOFJuly 2023August 2024Allow1310NoNo
18225139SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAMEJuly 2023August 2024Allow1311NoNo
18221518EMBEDDED FLIP CHIP PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOFJuly 2023January 2026Allow3001NoNo
18347512SEMICONDUCTOR DEVICEJuly 2023September 2025Allow2600NoNo
18346554INTEGRATED CHIP INCLUDING THROUGH-SUBSTRATE VIA (TSV) AND LANDING STRUCTUREJuly 2023January 2026Allow3101NoNo
18215707SEMICONDUCTOR DEVICE INCLUDING A CAPACITORJune 2023April 2024Allow901NoNo
18341529ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOFJune 2023September 2025Allow2700NoNo
18340193SEMICONDUCTOR PACKAGESJune 2023August 2025Allow2600NoNo
18212939SEMICONDUCTOR PACKAGEJune 2023August 2025Allow2600NoNo
18336005SEMICONDUCTOR STRUCTUREJune 2023September 2024Allow1511NoNo
18257484ISOLATED POWER CHIP BASED ON WAFER LEVEL PACKAGING AND METHOD OF MANUFACTURING THE SAMEJune 2023January 2026Allow3100NoNo
18331150CHIP STRUCTURE, SEMICONDUCTOR PACKAGE, AND FABRICATING METHOD THEREOFJune 2023November 2025Allow2901NoNo
18327786DIRECT N/P LOCAL INTERCONNECTJune 2023February 2026Allow3210NoNo
18326241SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAMEMay 2023January 2026Allow3211NoNo
18202735SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGEMay 2023January 2026Allow3201NoNo
18200638SEMICONDUCTOR DEVICES HAVING GATE ISOLATION LAYERSMay 2023February 2024Allow900NoNo
18200735SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAMEMay 2023March 2024Allow1001YesNo
18200248SEMICONDUCTOR DEVICEMay 2023October 2025Allow2900NoNo
18318752SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THEREOFMay 2023May 2024Allow1210NoNo
18316586CONTINUOUS INTERCONNECTS BETWEEN HETEROGENEOUS MATERIALSMay 2023September 2024Allow1610NoNo
18313971SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOFMay 2023February 2024Allow900NoNo
18311223SEMICONDUCTOR STRUCTURE HAVING PASSIVE COMPONENT AND METHOD OF MANUFACTURING THEREOFMay 2023October 2025Allow3001NoNo
18308229SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAMEApril 2023July 2024Allow1410NoNo
18305636DUAL METAL CAPPED VIA CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICESApril 2023May 2024Allow1210NoNo
18137733SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAMEApril 2023January 2024Allow900NoNo
18137803SEMICONDUCTOR PACKAGEApril 2023December 2023Allow700NoNo
18133575SEMICONDUCTOR DEVICES HAVING IMPROVED ELECTRICAL CHARACTERISTICS AND METHODS OF FABRICATING THE SAMEApril 2023November 2023Allow700NoNo
18297849SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEApril 2023April 2024Allow1210NoNo
18188710INTERCONNECT STRUCTURES FOR SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAMEMarch 2023July 2024Allow1610NoNo
18188875Fin Field-Effect Transistor and Method of Forming The SameMarch 2023April 2024Allow1200NoNo
18178371SEMICONDUCTOR DEVICE WITH STACKED MEMORY PERIPHERY AND ARRAY AND METHOD FOR FORMING THE SAMEMarch 2023September 2025Allow3001NoNo
18177962SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEMarch 2023February 2026Allow3611NoNo
18174687TRANSISTOR AND METHOD FOR MANUFACTURING THE SAMEFebruary 2023July 2024Allow1610YesNo
18173547STACKED VIA STRUCTURES AND METHODS FOR FORMING THE SAMEFebruary 2023November 2025Allow3311YesNo
18112753SEMICONDUCTOR DEVICE WITH DEEP TRENCH ISOLATIONFebruary 2023July 2025Allow2900NoNo
18171311SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAMEFebruary 2023June 2024Allow1610NoNo
18170754MICROELECTRONIC DEVICES HAVING AIR GAP STRUCTURES INTEGRATED WITH INTERCONNECT FOR REDUCED PARASITIC CAPACITANCESFebruary 2023July 2024Allow1711NoNo
18169928STEPPED ISOLATION REGIONSFebruary 2023July 2025Allow2901NoNo
18163424Treatment for Adhesion ImprovementFebruary 2023February 2024Allow1210NoNo
18100248MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEJanuary 2023December 2025Allow3510NoNo
18100570ELECTRONIC DEVICEJanuary 2023February 2026Allow3710NoNo
18099543FIELD EFFECT TRANSISTOR HAVING A DIELECTRIC STRUCTUREJanuary 2023July 2025Allow3000NoNo
18015711ANODIZED FILM SUBSTRATE BASE, ANODIZED FILM SUBSTRATE PART HAVING SAME, ANODIZED FILM-BASED INTERPOSER HAVING SAME, AND SEMICONDUCTOR PACKAGE HAVING SAMEJanuary 2023September 2025Allow3210NoNo
18095629ELECTRONIC IC DEVICE COMPRISING INTEGRATED OPTICAL AND ELECTRONIC CIRCUIT COMPONENT AND FABRICATION METHODJanuary 2023October 2023Allow900NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner DOAN, THERESA T.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
8
Examiner Affirmed
7
(87.5%)
Examiner Reversed
1
(12.5%)
Reversal Percentile
25.0%
Lower than average

What This Means

With a 12.5% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
27
Allowed After Appeal Filing
11
(40.7%)
Not Allowed After Appeal Filing
16
(59.3%)
Filing Benefit Percentile
68.0%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 40.7% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner DOAN, THERESA T - Prosecution Strategy Guide

Executive Summary

Examiner DOAN, THERESA T works in Art Unit 2814 and has examined 1,624 patent applications in our dataset. With an allowance rate of 89.3%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 18 months.

Allowance Patterns

Examiner DOAN, THERESA T's allowance rate of 89.3% places them in the 71% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by DOAN, THERESA T receive 1.01 office actions before reaching final disposition. This places the examiner in the 10% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by DOAN, THERESA T is 18 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +1.3% benefit to allowance rate for applications examined by DOAN, THERESA T. This interview benefit is in the 20% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 35.2% of applications are subsequently allowed. This success rate is in the 79% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 40.4% of cases where such amendments are filed. This entry rate is in the 62% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 100.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 73% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 74.2% of appeals filed. This is in the 63% percentile among all examiners. Of these withdrawals, 60.9% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 37.0% are granted (fully or in part). This grant rate is in the 25% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 8.9% of allowed cases (in the 92% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 1.5% of allowed cases (in the 65% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.