Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18755721 | TRANSPARENT DISPLAY DEVICE AND METHOD OF MANUFACTURING A TRANSPARENT DISPLAY DEVICE | June 2024 | September 2025 | Allow | 15 | 1 | 0 | No | No |
| 18485842 | TWO-DIMENSIONAL VERTICAL FINS | October 2023 | May 2024 | Allow | 7 | 1 | 0 | No | No |
| 17981338 | ELECTRONIC DEVICE AND PACKAGE STRUCTURE | November 2022 | September 2025 | Allow | 35 | 1 | 1 | No | No |
| 17896934 | SEMICONDUCTOR DEVICE | August 2022 | September 2025 | Allow | 37 | 1 | 0 | No | No |
| 17861282 | SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE | July 2022 | September 2025 | Allow | 39 | 1 | 0 | No | No |
| 17777136 | METHOD OF MANUFACTURING DISPLAY DEVICE | May 2022 | September 2025 | Allow | 40 | 1 | 0 | No | No |
| 16722406 | MULTILAYER MOS DEVICE AND METHOD FOR MANUFACTURING THE SAME | December 2019 | June 2022 | Abandon | 30 | 2 | 1 | No | No |
| 15546994 | METHOD FOR MANUFACTURING A HALL SENSOR | July 2017 | March 2019 | Abandon | 20 | 1 | 1 | No | No |
| 15137540 | LOW-NOISE MOS TRANSISTORS AND CORRESPONDING CIRCUIT | April 2016 | August 2017 | Abandon | 16 | 1 | 0 | No | No |
| 15009012 | SEMICONDUCTOR PACKAGE USING A POLYMER SUBSTRATE | January 2016 | March 2019 | Abandon | 38 | 5 | 0 | No | No |
| 14225339 | DEVICE FOR LIGHT-BASED DETECTION FOR ACOUSTIC SPEECH APPLICATIONS | March 2014 | December 2016 | Abandon | 33 | 3 | 0 | No | No |
| 14039055 | INTEGRATED CIRCUIT DIE AND METHOD OF MAKING | September 2013 | June 2015 | Abandon | 21 | 1 | 0 | No | No |
| 13921032 | THROUGH VIA PROCESS | June 2013 | April 2015 | Abandon | 22 | 1 | 0 | No | No |
| 13798467 | STRESS-ENHANCING SELECTIVE EPITAXIAL DEPOSITION OF EMBEDDED SOURCE AND DRAIN REGIONS | March 2013 | May 2015 | Abandon | 27 | 2 | 1 | No | No |
| 13752284 | GAN-BASED LEDS ON SILICON SUBSTRATES WITH MONOLITHICALLY INTEGRATED ZENER DIODES | January 2013 | July 2014 | Abandon | 17 | 1 | 0 | No | No |
| 13722967 | MIS TYPE SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR | December 2012 | June 2015 | Abandon | 30 | 2 | 1 | No | No |
| 13721379 | SEMICONDUCTOR DEVICE | December 2012 | May 2015 | Abandon | 29 | 3 | 0 | No | No |
| 13723159 | NON-VOLATILE MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF | December 2012 | June 2015 | Abandon | 30 | 3 | 1 | Yes | No |
| 13477334 | SEMICONDUCTOR DEVICE | May 2012 | February 2014 | Abandon | 21 | 1 | 1 | No | No |
| 13403422 | RESIN COMPOSITION FOR OPTICAL SEMICONDUCTOR ELEMENT HOUSING PACKAGE, AND OPTICAL SEMICONDUCTOR LIGHT-EMITTING DEVICE OBTAINED USING THE SAME | February 2012 | May 2015 | Abandon | 39 | 4 | 0 | No | No |
| 13260027 | ACTIVE MATRIX SUBSTRATE, DISPLAY PANEL, DISPLAY DEVICE, AND LASER IRRADIATION METHOD | September 2011 | February 2014 | Abandon | 29 | 1 | 1 | No | No |
| 13259381 | DONOR SUBSTRATE, PROCESS FOR PRODUCTION OF TRANSFER FILM, AND PROCESS FOR PRODUCTION OF ORGANIC ELECTROLUMINESCENT ELEMENT | September 2011 | January 2014 | Abandon | 28 | 1 | 0 | No | No |
| 13259012 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE AND SILICON CARBIDE SUBSTRATE | September 2011 | August 2013 | Abandon | 23 | 1 | 0 | No | No |
| 13176880 | 4-TERMINAL PIEZOELECTRONIC TRANSISTOR (PET) | July 2011 | May 2015 | Abandon | 46 | 2 | 1 | No | No |
| 13055525 | Substrate Arrangement and a Method of Manufacturing a Substrate Arrangement | June 2011 | September 2014 | Abandon | 43 | 1 | 0 | No | No |
| 13156207 | LONG WAVELENGTH LIGHT EMITTING DEVICE WITH PHOTOLUMINESCENCE EMISSION AND HIGH QUANTUM EFFICIENCY | June 2011 | May 2014 | Allow | 36 | 2 | 2 | No | No |
| 13090264 | LIGHT EMITTING DIODE STRUCTURE | April 2011 | July 2015 | Abandon | 51 | 4 | 1 | No | No |
| 13122937 | ALUMINUM ALLOY FILM FOR DISPLAY DEVICE, DISPLAY DEVICE, AND SPUTTERING TARGET | April 2011 | July 2014 | Abandon | 39 | 1 | 0 | No | No |
| 13058996 | BODY CONTACT DEVICE STRUCTURE AND METHOD OF MANUFACTURE | February 2011 | July 2014 | Abandon | 41 | 2 | 0 | No | No |
| 12619229 | CAPACITOR OF DYNAMIC RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE CAPACITOR | November 2009 | May 2010 | Allow | 6 | 0 | 0 | No | No |
| 12246700 | DISPLAY DEVICE | October 2008 | June 2009 | Abandon | 8 | 0 | 0 | No | No |
| 12058939 | CHARGE TRANSFER DEVICE | March 2008 | September 2010 | Abandon | 29 | 2 | 0 | No | No |
| 12076509 | Light receiving element | March 2008 | April 2009 | Abandon | 13 | 0 | 0 | No | No |
| 11687339 | IMAGE DISPLAY DEVICE | March 2007 | February 2008 | Abandon | 11 | 0 | 0 | No | No |
| 11681239 | IMAGE DISPLAY DEVICE | March 2007 | March 2008 | Abandon | 12 | 0 | 0 | No | No |
| 11698728 | Semiconductor wafer with high thermal conductivity | January 2007 | March 2015 | Abandon | 60 | 8 | 1 | Yes | No |
| 11536258 | IMAGE DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | September 2006 | March 2008 | Abandon | 17 | 0 | 0 | No | No |
| 11512478 | Method for forming raised structures by controlled selective epitaxial growth of facet using spacer | August 2006 | September 2007 | Abandon | 12 | 0 | 0 | No | No |
| 11493789 | TRI-GATE TRANSISTOR DEVICE WITH STRESS INCORPORATION LAYER AND METHOD OF FABRICATION | July 2006 | December 2009 | Allow | 41 | 1 | 2 | No | No |
| 11452648 | Prevention of latch-up among p-type semiconductor devices | June 2006 | July 2007 | Abandon | 13 | 0 | 0 | No | No |
| 11370000 | SYSTEM FOR PROVIDING A CONTINUOUS MOTION SEQUENTIAL LATERAL SOLIDIFICATION FOR REDUCING OR ELIMINATING ARTIFACTS IN OVERLAP REGIONS, AND A MASK FOR FACILITATING SUCH ARTIFACT REDUCTION/ELIMINATION | March 2006 | December 2009 | Allow | 46 | 1 | 1 | No | No |
| 10754619 | Multi-channel transistor with tunable hot carrier effect | January 2004 | September 2004 | Abandon | 8 | 0 | 0 | No | No |
| 10274588 | METHOD AND APPARATUS FOR MEASURING THE REFRACTIVE INDEX OF AT LEAST TWO SAMPLES | October 2002 | May 2005 | Allow | 31 | 1 | 0 | No | No |
| 10079472 | Gate dielectric structures for integrated circuits and methods for making and using such gate dielectric structures | February 2002 | July 2012 | Abandon | 60 | 8 | 1 | Yes | Yes |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner FAHMY, WAEL M.
With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 0.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.
⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner FAHMY, WAEL M works in Art Unit 2814 and has examined 38 patent applications in our dataset. With an allowance rate of 13.2%, this examiner allows applications at a lower rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 29 months.
Examiner FAHMY, WAEL M's allowance rate of 13.2% places them in the 1% percentile among all USPTO examiners. This examiner is less likely to allow applications than most examiners at the USPTO.
On average, applications examined by FAHMY, WAEL M receive 1.74 office actions before reaching final disposition. This places the examiner in the 37% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.
The median time to disposition (half-life) for applications examined by FAHMY, WAEL M is 29 months. This places the examiner in the 65% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.
Conducting an examiner interview provides a -14.3% benefit to allowance rate for applications examined by FAHMY, WAEL M. This interview benefit is in the 2% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 0.0% of applications are subsequently allowed. This success rate is in the 0% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.
This examiner enters after-final amendments leading to allowance in 14.3% of cases where such amendments are filed. This entry rate is in the 15% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.
This examiner withdraws rejections or reopens prosecution in 0.0% of appeals filed. This is in the 1% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.
When applicants file petitions regarding this examiner's actions, 108.3% are granted (fully or in part). This grant rate is in the 94% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.
Examiner's Amendments: This examiner makes examiner's amendments in 5.3% of allowed cases (in the 86% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.