Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18729977 | HIGH-SPEED LAYOUT METHOD AND LAYOUT DEVICE FOR PHOTOVOLTAIC MODULES | July 2024 | November 2024 | Allow | 4 | 0 | 0 | No | No |
| 18710346 | METHOD OF DEPOSITION ON A SUBSTRATE USED FOR THE MANUFACTURE OF A SOLAR CELL, SCREEN FOR SCREEN PRINTING ON A SUBSTRATE USED FOR THE MANUFACTURE OF A SOLAR CELL, PROCESSING LINE FOR PROCESSING A SUBSTRATE USED FOR THE MANUFACTURE OF A SOLAR CELL | May 2024 | January 2025 | Allow | 9 | 1 | 0 | Yes | No |
| 18635530 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME | April 2024 | November 2024 | Allow | 7 | 0 | 0 | No | No |
| 18697445 | METHOD FOR STRIPPING GALLIUM NITRIDE SUBSTRATE | March 2024 | November 2024 | Allow | 8 | 1 | 0 | No | No |
| 18582672 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | February 2024 | December 2024 | Allow | 10 | 1 | 0 | No | No |
| 18428325 | Integrated Assemblies Having Transistor Body Regions Coupled to Carrier-Sink-Structures; and Methods of Forming Integrated Assemblies | January 2024 | October 2024 | Allow | 8 | 1 | 0 | No | No |
| 18417199 | LEFT-ISD-LTSEE {Low Electrostatic Field Transistor (LEFT) Using Implanted S/D and Selective Low Temperature Epitaxial Extension (ISD-LTSEE)} | January 2024 | May 2024 | Allow | 4 | 2 | 0 | Yes | No |
| 18394479 | LINE BENDING CONTROL FOR MEMORY APPLICATIONS | December 2023 | December 2024 | Allow | 12 | 1 | 0 | No | No |
| 18394273 | MICROELECTRONIC DEVICES COMPRISING STACK STRUCTURES HAVING PILLARS AND ELLIPTICAL CONDUCTIVE CONTACTS | December 2023 | November 2024 | Allow | 11 | 1 | 0 | No | No |
| 18533907 | PREPARATION METHOD OF CONTACT MATERIAL WITH HIGH THERMAL STABILITY AND LOW CONTACT RESISTANCE BASED ON MGAGSB-BASED THERMOELECTRIC MATERIAL | December 2023 | April 2024 | Allow | 4 | 1 | 0 | Yes | No |
| 18506906 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | November 2023 | February 2025 | Abandon | 15 | 1 | 0 | No | No |
| 18500183 | DISPLAY DEVICE | November 2023 | August 2024 | Allow | 9 | 1 | 0 | No | No |
| 18386112 | VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME | November 2023 | September 2024 | Allow | 11 | 1 | 0 | Yes | No |
| 18499703 | MEMORY DEVICES | November 2023 | August 2024 | Allow | 10 | 1 | 0 | No | No |
| 18497035 | NOVEL 3D RAM SL/BL CONTACT MODULATION | October 2023 | October 2024 | Allow | 12 | 1 | 1 | No | No |
| 18370913 | SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME | September 2023 | June 2024 | Allow | 9 | 0 | 0 | No | No |
| 18368689 | SEMICONDUCTOR DEVICE WITH BURIED GATE STRUCTURES | September 2023 | March 2025 | Allow | 18 | 1 | 0 | No | No |
| 18460462 | MEMORY DEVICES INCLUDING DIFFERENT TIER PITCHES, AND RELATED ELECTRONIC SYSTEMS | September 2023 | July 2024 | Allow | 11 | 1 | 0 | No | No |
| 18236823 | SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE AND SEPARATION STRUCTURE | August 2023 | May 2024 | Allow | 9 | 0 | 0 | No | No |
| 18448005 | CELL STRUCTURE WITH INTERMEDIATE METAL LAYERS FOR POWER SUPPLIES | August 2023 | November 2024 | Allow | 15 | 2 | 0 | No | No |
| 18363819 | METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY | August 2023 | October 2023 | Allow | 2 | 0 | 0 | No | No |
| 18359492 | Semiconductor Device and Method | July 2023 | May 2024 | Allow | 10 | 1 | 0 | No | No |
| 18358321 | Buried Metal for FinFET Device and Method | July 2023 | April 2024 | Allow | 9 | 0 | 0 | No | No |
| 18225561 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | July 2023 | May 2024 | Allow | 10 | 1 | 0 | No | No |
| 18218218 | SEMICONDUCTOR DEVICE HAVING DOUBLE BIT CAPACITY AND METHOD FOR MANUFACTURING THE SAME | July 2023 | January 2025 | Allow | 19 | 1 | 0 | No | No |
| 18347234 | ELECTRONIC DEVICE WITH GALLIUM NITRIDE TRANSISTORS AND METHOD OF MAKING SAME | July 2023 | July 2024 | Allow | 12 | 1 | 0 | No | No |
| 18341947 | SEMICONDUCTOR DEVICE, AND ASSOCIATED METHOD AND SYSTEM | June 2023 | July 2024 | Allow | 13 | 2 | 0 | Yes | No |
| 18336908 | DISPLAY APPARATUS | June 2023 | June 2024 | Allow | 12 | 1 | 0 | No | No |
| 18209231 | MEMORY DEVICE INCLUDING SUPPORT STRUCTURES | June 2023 | August 2024 | Allow | 14 | 2 | 0 | Yes | No |
| 18328102 | SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMING | June 2023 | April 2024 | Allow | 10 | 1 | 0 | No | No |
| 18328416 | THREE-DIMENSIONAL MEMORY DEVICE AND MANUFACTURING METHOD THEREOF | June 2023 | February 2024 | Allow | 8 | 0 | 0 | No | No |
| 18328389 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | June 2023 | January 2024 | Allow | 8 | 0 | 0 | No | No |
| 18326682 | SEMICONDUCTOR DEVICE WITH CONFORMAL SOURCE/DRAIN LAYER | May 2023 | April 2024 | Allow | 10 | 1 | 0 | No | No |
| 18316244 | SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME | May 2023 | January 2024 | Allow | 8 | 0 | 0 | No | No |
| 18142992 | ACTIVE PROTECTION CIRCUITS FOR SEMICONDUCTOR DEVICES | May 2023 | October 2024 | Allow | 18 | 0 | 0 | No | No |
| 18308743 | Contact Conductive Feature Formation and Structure | April 2023 | July 2024 | Allow | 15 | 2 | 0 | No | No |
| 18308031 | THREE-DIMENSIONAL MEMORY ARRAY WITH LOCAL LINE SELECTOR | April 2023 | March 2024 | Allow | 11 | 1 | 0 | No | No |
| 18307187 | SEMICONDUCTOR DEVICE STRUCTURE WITH BARRIER LAYER | April 2023 | March 2024 | Allow | 11 | 1 | 0 | No | No |
| 18304422 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME | April 2023 | December 2023 | Allow | 8 | 0 | 0 | No | No |
| 18136216 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | April 2023 | April 2024 | Allow | 12 | 1 | 0 | Yes | No |
| 18135596 | STAIRCASE STRUCTURE IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME | April 2023 | January 2024 | Allow | 9 | 1 | 0 | Yes | No |
| 18189437 | Semiconductor Device and Method | March 2023 | January 2024 | Allow | 10 | 2 | 0 | No | No |
| 18184036 | SEMICONDUCTOR DEVICE HAVING A BUTTED CONTACT AND METHOD OF FORMING | March 2023 | February 2024 | Allow | 11 | 2 | 0 | No | No |
| 18182823 | RADIO FREQUENCY SILICON ON INSULATOR STRUCTURE WITH SUPERIOR PERFORMANCE, STABILITY, AND MANUFACTURABILITY | March 2023 | November 2023 | Allow | 8 | 1 | 0 | No | No |
| 18104328 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME | February 2023 | December 2023 | Allow | 10 | 1 | 0 | No | No |
| 18152952 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | January 2023 | October 2023 | Allow | 9 | 2 | 0 | No | No |
| 18069887 | INTEGRATED CIRCUIT AND METHOD OF GENERATING INTEGRATED CIRCUIT LAYOUT | December 2022 | October 2023 | Allow | 10 | 2 | 0 | No | No |
| 18067870 | NOVEL 3D RAM SL/BL CONTACT MODULATION | December 2022 | June 2023 | Allow | 6 | 0 | 0 | No | No |
| 18083206 | SEMICONDUCTOR MEMORY DEVICE AND ERASING METHOD OF THE SEMICONDUCTOR MEMORY DEVICE | December 2022 | June 2023 | Allow | 6 | 0 | 0 | No | No |
| 18064690 | SEMICONDUCTOR DEVICE WITH MULTIPLE POLARITY GROUPS | December 2022 | July 2023 | Allow | 8 | 1 | 0 | No | No |
| 17931445 | SILICON-ON-INSULATOR WITH CRYSTALLINE SILICON OXIDE | September 2022 | October 2023 | Allow | 13 | 1 | 0 | Yes | No |
| 17929638 | MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS | September 2022 | April 2024 | Allow | 20 | 1 | 0 | No | No |
| 17895205 | VERTICAL MEMORY DEVICES | August 2022 | September 2023 | Allow | 13 | 1 | 0 | Yes | No |
| 17822036 | APPARATUSES AND MEMORY DEVICES INCLUDING SLOT STRUCTURES EXTENDING THROUGH STACK STRUCTURES | August 2022 | July 2023 | Allow | 10 | 1 | 0 | No | No |
| 17894667 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | August 2022 | July 2023 | Allow | 11 | 1 | 0 | No | No |
| 17890565 | Integrated Assemblies, and Methods of Forming Integrated Assemblies | August 2022 | November 2023 | Allow | 15 | 0 | 0 | No | No |
| 17819009 | MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS | August 2022 | July 2023 | Allow | 11 | 0 | 0 | No | No |
| 17818324 | MICROELECTRONIC DEVICES WITH LOWER RECESSED CONDUCTIVE STRUCTURES AND RELATED METHODS | August 2022 | January 2024 | Allow | 18 | 1 | 0 | No | No |
| 17875148 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | July 2022 | June 2023 | Allow | 11 | 1 | 0 | No | No |
| 17869142 | Buried Metal for FinFET Device and Method | July 2022 | June 2023 | Allow | 11 | 1 | 0 | No | No |
| 17869487 | Semiconductor Device and Method | July 2022 | June 2023 | Allow | 11 | 1 | 0 | No | No |
| 17866720 | SEMICONDUCTOR DEVICE HAVING DOUBLE BIT CAPACITY AND METHOD FOR MANUFACTURING THE SAME | July 2022 | January 2025 | Allow | 30 | 2 | 0 | No | No |
| 17861281 | SEMICONDUCTOR DEVICE WITH PASSING GATE | July 2022 | February 2025 | Allow | 31 | 2 | 0 | No | No |
| 17859888 | METHOD OF FORMING AN ELECTRODE ON A SUBSTRATE AND A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING AN ELECTRODE | July 2022 | February 2024 | Allow | 19 | 2 | 0 | Yes | No |
| 17843762 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | June 2022 | July 2023 | Allow | 13 | 1 | 0 | No | No |
| 17841624 | Integrated Assemblies and Methods of Forming Integrated Assemblies | June 2022 | December 2023 | Allow | 18 | 1 | 0 | Yes | No |
| 17833834 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | June 2022 | May 2023 | Allow | 12 | 1 | 0 | No | No |
| 17833363 | SEMICONDUCTOR DEVICE STRUCTURE WITH BARRIER LAYER | June 2022 | June 2023 | Allow | 12 | 1 | 0 | No | No |
| 17828763 | SOLID-STATE IMAGE PICKUP ELEMENT AND ELECTRONIC APPARATUS | May 2022 | March 2024 | Allow | 22 | 4 | 0 | Yes | No |
| 17664906 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | May 2022 | December 2022 | Allow | 7 | 1 | 0 | No | No |
| 17824487 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING PROTRUSION OF WORD LINE | May 2022 | December 2024 | Allow | 31 | 1 | 0 | No | No |
| 17824821 | INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME | May 2022 | December 2023 | Allow | 19 | 1 | 0 | No | No |
| 17750421 | IMPRINT METHOD | May 2022 | September 2024 | Allow | 28 | 0 | 0 | No | No |
| 17664243 | SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD | May 2022 | November 2024 | Allow | 30 | 1 | 0 | No | No |
| 17663898 | STRUCTURES FOR RADIOFREQUENCY APPLICATIONS AND RELATED METHODS | May 2022 | October 2023 | Allow | 17 | 3 | 0 | Yes | No |
| 17776637 | CRITICAL DIMENSION ERROR ANALYSIS METHOD | May 2022 | March 2025 | Allow | 34 | 1 | 0 | No | No |
| 17744026 | INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF | May 2022 | December 2023 | Allow | 19 | 1 | 0 | Yes | No |
| 17738928 | BACKSIDE POWER RAIL FOR PHYSICAL FAILURE ANALYSIS (PFA) | May 2022 | October 2024 | Allow | 29 | 0 | 0 | No | No |
| 17736365 | Conductive Via Of Integrated Circuitry, Memory Array Comprising Strings Of Memory Cells, Method Of Forming A Conductive Via Of Integrated Circuitry, And Method Of Forming A Memory Array Comprising Strings Of Memory Cells | May 2022 | January 2024 | Allow | 20 | 1 | 0 | No | No |
| 17734410 | Integrated Assemblies Having Transistor Body Regions Coupled to Carrier-Sink-Structures; and Methods of Forming Integrated Assemblies | May 2022 | October 2023 | Allow | 17 | 1 | 1 | No | No |
| 17661065 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | April 2022 | November 2024 | Allow | 31 | 1 | 0 | No | No |
| 17728007 | CELL STRUCTURE WITH INTERMEDIATE METAL LAYERS FOR POWER SUPPLIES | April 2022 | April 2023 | Allow | 12 | 1 | 0 | No | No |
| 17660389 | FORMATION OF GATE STACKS COMPRISING A THRESHOLD VOLTAGE TUNING LAYER | April 2022 | January 2025 | Allow | 33 | 1 | 0 | No | No |
| 17726004 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH BIT LINE CONTACTS OF DIFFERENT PITCHES | April 2022 | December 2023 | Allow | 19 | 1 | 0 | No | No |
| 17659990 | THREE-DIMENSIONAL MEMORY DEVICE INCLUDING A STRING SELECTION LINE GATE ELECTRODE HAVING A SILICIDE LAYER | April 2022 | June 2023 | Allow | 13 | 0 | 0 | No | No |
| 17721734 | SEMICONDUCTOR DEVICE, AND ASSOCIATED METHOD AND SYSTEM | April 2022 | March 2023 | Allow | 11 | 1 | 0 | No | No |
| 17721096 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE | April 2022 | May 2023 | Allow | 13 | 1 | 0 | No | No |
| 17719939 | SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME | April 2022 | August 2024 | Allow | 29 | 1 | 0 | No | No |
| 17718676 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE | April 2022 | August 2023 | Allow | 16 | 1 | 0 | Yes | No |
| 17715967 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | April 2022 | October 2024 | Allow | 31 | 1 | 0 | No | No |
| 17710364 | TWO-DIMENSIONAL VERTICAL FINS | March 2022 | July 2023 | Allow | 16 | 1 | 0 | No | No |
| 17657006 | HIGH ASPECT RATIO CONTACT STRUCTURE WITH MULTIPLE METAL STACKS | March 2022 | January 2025 | Allow | 34 | 2 | 1 | Yes | No |
| 17706541 | VAPOR-DEPOSITION MASK, METHOD FOR MANUFACTURING VAPOR-DEPOSITION MASK, AND METHOD FOR MANUFACTURING DISPLAY DEVICE | March 2022 | January 2025 | Allow | 34 | 1 | 0 | No | No |
| 17705943 | Semiconductor Device and Method | March 2022 | November 2022 | Allow | 8 | 0 | 0 | No | No |
| 17702967 | METHOD OF FABRICATING A VERTICAL SEMICONDUCTOR DEVICE | March 2022 | May 2023 | Allow | 14 | 0 | 0 | No | No |
| 17701103 | SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMING | March 2022 | March 2023 | Allow | 12 | 1 | 0 | No | No |
| 17700406 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING WORD LINE STRUCTURE | March 2022 | December 2023 | Allow | 20 | 1 | 0 | No | No |
| 17699168 | ELECTRONIC COMPONENT TRANSFER APPARATUS, ELECTRONIC COMPONENT TRANSFER METHOD, AND METHOD OF MANUFACTURING A LIGHT-EMITTING DIODE PANEL | March 2022 | February 2025 | Allow | 35 | 1 | 0 | No | No |
| 17691641 | SUBSTRATE PROCESSING APPARATUS, ELEVATOR AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | March 2022 | December 2024 | Allow | 34 | 1 | 0 | No | No |
| 17685930 | SUPER JUNCTION SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | March 2022 | August 2024 | Allow | 30 | 0 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner LEE, HSIEN MING.
With a 100.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 45.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.
✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.
✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
Examiner LEE, HSIEN MING works in Art Unit 2814 and has examined 865 patent applications in our dataset. With an allowance rate of 97.3%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 18 months.
Examiner LEE, HSIEN MING's allowance rate of 97.3% places them in the 92% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.
On average, applications examined by LEE, HSIEN MING receive 1.31 office actions before reaching final disposition. This places the examiner in the 25% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.
The median time to disposition (half-life) for applications examined by LEE, HSIEN MING is 18 months. This places the examiner in the 94% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.
Conducting an examiner interview provides a +0.9% benefit to allowance rate for applications examined by LEE, HSIEN MING. This interview benefit is in the 15% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 34.9% of applications are subsequently allowed. This success rate is in the 73% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 72.0% of cases where such amendments are filed. This entry rate is in the 91% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.
When applicants request a pre-appeal conference (PAC) with this examiner, 100.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 71% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.
This examiner withdraws rejections or reopens prosecution in 81.8% of appeals filed. This is in the 72% percentile among all examiners. Of these withdrawals, 55.6% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.
When applicants file petitions regarding this examiner's actions, 34.8% are granted (fully or in part). This grant rate is in the 30% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.
Examiner's Amendments: This examiner makes examiner's amendments in 8.0% of allowed cases (in the 94% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 26.6% of allowed cases (in the 95% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.