USPTO Examiner KIELIN ERIK J - Art Unit 2814

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18662578SYSTEMS, DEVICES, AND METHODS FOR GAS SENSINGMay 2024May 2025Allow1210NoNo
18640125METHOD FOR ENHANCING STABILITY OF N-TYPE SEMICONDUCTOR THROUGH OXYGEN ELIMINATIONApril 2024October 2024Allow520NoNo
18425389LTHC AS CHARGING BARRIER IN INFO PACKAGE FORMATIONJanuary 2024February 2025Allow1320NoNo
18525583INTEGRATED CIRCUIT WITH BIOFETSNovember 2023September 2024Allow1010NoNo
18496126A FLEXIBLE ELECTRONIC DISPLAY DEVICEOctober 2023September 2024Allow1010NoNo
18373868GROUP VI PRECURSOR COMPOUNDSSeptember 2023November 2024Allow1420YesNo
18236434Methods for Forming a Semiconductor Device Having a Second Semiconductor Layer on a First Semiconductor LayerAugust 2023September 2024Allow1320NoNo
18366274SEMICONDUCTOR FEATURE AND METHOD FOR MANUFACTURING THE SAMEAugust 2023May 2024Allow1000NoNo
18356080METHOD OF FORMING FINFET WITH LOW-DIELECTRIC-CONSTANT GATE ELECTRODE SPACERSJuly 2023July 2024Allow1210NoNo
18342246SEMICONDUCTOR PACKAGESJune 2023February 2025Allow2020NoNo
18338800CHUCK ASSEMBLY, PLANARIZATION PROCESS, APPARATUS AND METHOD OF MANUFACTURING AN ARTICLEJune 2023August 2024Allow1420NoNo
18208409THERMAL PROCESS CHAMBER LID WITH BACKSIDE PUMPINGJune 2023June 2025Allow2430NoNo
18330877RESONATOR DEVICE, RESONATOR MODULE, ELECTRONIC APPARATUS, AND VEHICLEJune 2023March 2025Abandon2120NoNo
18318835SEMICONDUCTOR DEVICE WITH CONTACT STRUCTURESMay 2023February 2025Allow2130NoNo
18036430HYDROGEN POTENTIAL SENSORMay 2023December 2023Allow710NoNo
18141422INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAMEApril 2023May 2024Allow1310NoNo
18308364DISPLAY PANEL INCLUDING DISPLAY SIGNAL PADS AND SENSING SIGNAL PADS MOUNTED ON THE DISPLAY PANEL SIDEWALLApril 2023February 2024Allow1010NoNo
18306946Electronic Devices Having Curved Displays With Supporting FramesApril 2023February 2025Abandon2220YesNo
18124484COAXIAL THROUGH VIA WITH NOVEL HIGH ISOLATION CROSS COUPLING METHOD FOR 3D INTEGRATED CIRCUITSMarch 2023April 2024Allow1310NoNo
18167907SEMICONDUCTOR STRUCTURE, ELECTRODE STRUCTURE AND METHOD OF FORMING THE SAMEFebruary 2023October 2024Allow2011NoNo
18003493DEVICES WITH FIELD EFFECT TRANSISTORSDecember 2022September 2023Allow910YesNo
18084670METHOD FOR PRECISION OXIDATION CONTROL BY ION IMPLANTATIONDecember 2022June 2025Allow3010NoNo
18067455MONOLITHIC 3D INTEGRATED CIRCUIT FOR GAS SENSING AND METHOD OF MAKING AND SYSTEM USINGDecember 2022February 2024Allow1421NoNo
18067415METHOD OF DEPOSITING LAYERSDecember 2022January 2024Abandon1410NoNo
18070030Method of Conductive Material DepositionNovember 2022May 2025Allow3000NoNo
17986456Semiconductor PackagesNovember 2022July 2024Allow2020NoNo
17971376PLASMA DOPING OF GAP FILL MATERIALSOctober 2022March 2024Allow1611NoNo
17971217SELECTIVE BLOCKING OF METAL SURFACES USING BIFUNCTIONAL SELF-ASSEMBLED MONOLAYERSOctober 2022October 2023Allow1210NoNo
17971212SELECTIVE BLOCKING OF METAL SURFACES USING BIFUNCTIONAL SELF-ASSEMBLED MONOLAYERSOctober 2022June 2024Allow2030NoNo
17953502HALOGENATION-BASED GAPFILL METHOD AND SYSTEMSeptember 2022June 2025Allow3201NoNo
17819298ADHESIVE MEMBER AND DISPLAY DEVICE INCLUDING THE SAMEAugust 2022May 2023Allow900NoNo
17884382INTEGRATED CIRCUIT WITH BIOFETSAugust 2022August 2023Allow1210NoNo
17876794INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOFJuly 2022August 2024Allow2411NoNo
17795900LIGHT-DRIVEN TRANSITION FROM INSULATOR TO CONDUCTORJuly 2022June 2023Allow1110NoNo
17875205WAFER LEVEL STACKED STRUCTURES HAVING INTEGRATED PASSIVE FEATURESJuly 2022August 2023Allow1210NoNo
17874492LTHC AS CHARGING BARRIER IN INFO PACKAGE FORMATIONJuly 2022October 2023Allow1511NoNo
17852766Method of Making an Integrated Circuit Package Including an Integrated Circuit Die Soldered to a Bond Pad of a Redistribution StructureJune 2022August 2023Allow1310NoNo
17848161PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICEJune 2022March 2024Abandon2120NoNo
17845092SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAMEJune 2022March 2025Allow3321NoNo
17834596SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOFJune 2022August 2024Allow2611NoNo
17831077Method of Forming FinFET with Low-Dielectric-Constant Gate Electrode SpacersJune 2022April 2023Allow1100NoNo
17781213DISPLAY PANEL, DRIVE METHOD THEREFOR, AND DISPLAY APPARATUSMay 2022June 2025Allow3710NoNo
17826418RADAR DEVICEMay 2022December 2024Allow3000NoNo
17826722FLEXIBLE ELECTRONIC DISPLAY DEVICEMay 2022July 2023Allow1410NoNo
17825307METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURESMay 2022January 2025Allow3221NoNo
17746997METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH POWER CONNECTING STRUCTURES UNDER TRANSISTORS AND SEMICONDUCTOR STRUCTURE WITH POWER CONNECTING STRUCTURES UNDER TRANSISTORSMay 2022November 2024Allow3011NoNo
17743006MANUFACTURING AND REUSE OF SEMICONDUCTOR SUBSTRATESMay 2022November 2024Allow3021NoNo
17738715THREE-DIMENSIONAL MEMORY DEVICES AND FABRICATING METHODS THEREOFMay 2022April 2025Allow3611NoNo
17737821TREATMENT OF SPIN ON ORGANIC MATERIAL TO IMPROVE WET RESISTANCEMay 2022February 2025Allow3410YesNo
17736855GROUP VI PRECURSOR COMPOUNDSMay 2022June 2023Allow1400NoNo
17731416SEMICONDUCTOR PACKAGE INCLUDING A DUMMY PATTERNApril 2022September 2024Allow2900NoNo
17755281DISPLAY PANEL AND DISPLAY DEVICEApril 2022January 2025Allow3310NoNo
17755080SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEApril 2022September 2024Allow2900NoNo
17725180SEMICONDUCTOR DEVICEApril 2022June 2025Allow3820YesNo
17720383LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAMEApril 2022December 2024Allow3201NoNo
17720836THERMAL PROCESS CHAMBER LID WITH BACKSIDE PUMPINGApril 2022March 2023Allow1100NoNo
17709307SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOFMarch 2022March 2025Allow3621NoNo
17706039INTERCONNECT STRUCTURE AND FORMING METHOD THEREOFMarch 2022December 2023Allow2021NoNo
17763215DISPLAY PANEL AND MANUFACTURING METHOD THEREFOR, AND DISPLAY APPARATUSMarch 2022March 2025Allow3620NoNo
17699212MEMORY DEVICEMarch 2022January 2025Allow3411NoNo
17762049DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY PANELMarch 2022February 2025Allow3510NoNo
17697311METHOD FOR FORMING INSULATING FILM, APPARATUS FOR PROCESSING SUBSTRATE, AND SYSTEM FOR PROCESSING SUBSTRATEMarch 2022July 2023Allow1610NoNo
17640530Display Panel and Method for Manufacturing the Same, and Display DeviceMarch 2022October 2024Allow3210NoNo
17682175SELECTIVE LIQUIPHOBIC SURFACE MODIFICATION OF SUBSTRATESFebruary 2022June 2024Allow2711NoNo
17677983SEMICONDUCTOR DEVICEFebruary 2022April 2023Allow1420NoNo
17636650SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME, AND SEMICONDUCTOR DEVICEFebruary 2022November 2024Allow3310YesNo
17632523METHOD FOR PRODUCING A RADIATION EMITTING SEMICONDUCTOR CHIP AND RADIATION EMITTING SEMICONDUCTOR CHIPFebruary 2022December 2024Allow3420NoNo
17591439SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUSFebruary 2022August 2024Abandon3040NoNo
17589416LOW RESISTIVITY FILMS CONTAINING MOLYBDENUMJanuary 2022August 2024Abandon3140NoNo
17586046SURFACE TREATMENT OF SOI WAFERJanuary 2022June 2025Abandon4020NoNo
17628374FLEXING SEMICONDUCTOR STRUCTURES AND RELATED TECHNIQUESJanuary 2022June 2025Abandon4120NoNo
17574043INTEGRATED CIRCUIT DEVICES INCLUDING STACKED TRANSISTORS AND METHODS OF FORMING THE SAMEJanuary 2022January 2025Allow3611YesNo
17567403SEMICONDUCTOR DEVICEJanuary 2022June 2023Allow1710NoNo
17646178AlN CHANNEL HETEROSTRUCTURE FIELD EFFECT TRANSISTORDecember 2021November 2024Allow3410NoNo
17623204DISPLAY PANELDecember 2021August 2024Allow3210NoNo
17622083OLED DISPLAY MODULE AND DISPLAY TERMINALDecember 2021November 2024Allow3410NoNo
17549501Image Sensor Device and MethodDecember 2021September 2023Allow2120NoNo
17547172FOLDING DISPLAY DEVICE INCLUDING DETACHABLE PROTECTIVE FILMDecember 2021October 2023Allow2230NoNo
17545468INTERCONNECT STRUCTURE, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING INTERCONNECT STRUCTUREDecember 2021February 2025Allow3931YesNo
17617184LIGHT EMITTER BOARD AND DISPLAY DEVICEDecember 2021November 2024Abandon3510NoNo
17616813SEMICONDUCTOR CHIP INTEGRATED DEVICE MANUFACTURING METHOD, SEMICONDUCTOR CHIP INTEGRATED DEVICE, SEMICONDUCTOR CHIP INTEGRATED DEVICE ASSEMBLY, SEMICONDUCTOR CHIP INK, AND SEMICONDUCTOR CHIP INK EJECTION DEVICEDecember 2021August 2024Allow3210NoNo
17453485WET ETCHING METHODNovember 2021September 2024Allow3410NoNo
17517263SYSTEMS AND METHODS FOR NITRIDIZATION OF NIOBIUM TRACESNovember 2021January 2025Abandon3841NoNo
17514039METAL STACK TO IMPROVE STACK THERMAL STABILITYOctober 2021June 2024Abandon3211NoNo
17507136METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH A LOW-RESISTIVITY METALOctober 2021October 2023Abandon2410NoNo
17499955METHODS FOR SEAMLESS GAP FILLING OF DIELECTRIC MATERIALOctober 2021July 2023Allow2110NoNo
17603450METHOD OF MAKING A METAL SILICIDE CONTACT TO A SILICON SUBSTRATEOctober 2021September 2023Allow2310NoNo
17498190SELF-ASSEMBLED MONOLAYER FOR SELECTIVE DEPOSITIONOctober 2021February 2024Allow2820NoNo
17498071SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAMEOctober 2021May 2024Abandon3121NoNo
17493426DISPLAY PANEL INCLUDING DISPLAY SIGNAL PADS AND SENSING SIGNAL PADS MOUNTED ON THE DISPLAY PANEL SIDEWALLOctober 2021January 2023Allow1610NoNo
17492687SEMICONDUCTOR DEVICEOctober 2021January 2023Allow1610NoNo
17487123LOW RESISTANCE AND HIGH RELIABILITY METALLIZATION MODULESeptember 2021August 2024Allow3541NoNo
17481362TOP VIA PROCESS WITH DAMASCENE METALSeptember 2021October 2023Allow2501NoNo
17480365SEMICONDUCTOR STRUCTURE MANUFACTURING METHODSeptember 2021August 2023Allow2310NoNo
17440752DISPLAY DEVICE, AND METHOD FOR MANUFACTURING DISPLAY DEVICESeptember 2021November 2024Abandon3820NoNo
17471666SEMICONDUCTOR FEATURE AND METHOD FOR MANUFACTURING THE SAMESeptember 2021May 2023Allow2011NoNo
17471256SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFSeptember 2021February 2024Allow2921NoNo
17447041Compartment Shielding With Metal Frame and CapSeptember 2021June 2023Allow2120NoNo
17464917FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH CONTACT STRUCTURESSeptember 2021February 2023Allow1810NoNo
17399049SUBSTRATE PROCESSING METHODAugust 2021August 2024Allow3630YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner KIELIN, ERIK J.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
9
Examiner Affirmed
8
(88.9%)
Examiner Reversed
1
(11.1%)
Reversal Percentile
22.4%
Lower than average

What This Means

With a 11.1% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
19
Allowed After Appeal Filing
2
(10.5%)
Not Allowed After Appeal Filing
17
(89.5%)
Filing Benefit Percentile
11.4%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 10.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner KIELIN, ERIK J - Prosecution Strategy Guide

Executive Summary

Examiner KIELIN, ERIK J works in Art Unit 2814 and has examined 602 patent applications in our dataset. With an allowance rate of 67.8%, this examiner allows applications at a lower rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 24 months.

Allowance Patterns

Examiner KIELIN, ERIK J's allowance rate of 67.8% places them in the 21% percentile among all USPTO examiners. This examiner is less likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by KIELIN, ERIK J receive 2.45 office actions before reaching final disposition. This places the examiner in the 84% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by KIELIN, ERIK J is 24 months. This places the examiner in the 72% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +3.4% benefit to allowance rate for applications examined by KIELIN, ERIK J. This interview benefit is in the 24% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 18.6% of applications are subsequently allowed. This success rate is in the 11% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 20.5% of cases where such amendments are filed. This entry rate is in the 18% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 12% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 40.0% of appeals filed. This is in the 5% percentile among all examiners. Of these withdrawals, 16.7% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 81.5% are granted (fully or in part). This grant rate is in the 93% percentile among all examiners. Strategic Note: Petitions are frequently granted regarding this examiner's actions compared to other examiners. Per MPEP § 1002.02(c), various examiner actions are petitionable to the Technology Center Director, including prematureness of final rejection, refusal to enter amendments, and requirement for information. If you believe an examiner action is improper, consider filing a petition.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 22% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 7.8% of allowed cases (in the 85% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Prepare for rigorous examination: With a below-average allowance rate, ensure your application has strong written description and enablement support. Consider filing a continuation if you need to add new matter.
  • Expect multiple rounds of prosecution: This examiner issues more office actions than average. Address potential issues proactively in your initial response and consider requesting an interview early in prosecution.
  • Plan for RCE after final rejection: This examiner rarely enters after-final amendments. Budget for an RCE in your prosecution strategy if you receive a final rejection.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.