USPTO Art Unit 2812 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19238914Through Package Vertical Interconnect and Method of Making SameJune 2025December 2025Allow610NoNo
19237474INTEGRATION METHOD FOR MODULARIZED SILICON-BASED HETEROGENEOUS PHOTOELECTRIC INTEGRATED ARCHITECTUREJune 2025January 2026Allow710YesNo
19210377SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTUREMay 2025October 2025Allow510NoNo
19190655SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOFApril 2025August 2025Allow400NoNo
19175411LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREOFApril 2025December 2025Allow820YesNo
19084370SOLDER REFLOW WITH OPTICAL ENDPOINT CONTROLMarch 2025October 2025Allow711YesNo
19068401OPTOELECTRONIC DEVICE INCLUDING A LIGHT-EMITTING DIODE STACKED ON A PHOTODETECTORMarch 2025May 2025Allow200NoNo
18727085Method of Fabricating a 3D NAND flash memory With Increased Data Retention CapabilityFebruary 2025November 2025Allow1610NoNo
19033509CONDUCTIVE CHANNEL STRUCTURE FOR SiC DEVICES, FULLY INTEGRATED SiC DEVICE AND FULLY INTEGRATED MANUFACTURING PROCESS THEREOFJanuary 2025June 2025Allow510YesNo
19004132SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTUREDecember 2024May 2025Allow510NoNo
18879209METHOD FOR CONTROLLING SURFACE CHARACTERISTICS AND THICKNESS OF MULTILAYER TRANSITION METAL DICHALCOGENIDE THIN FILMDecember 2024March 2025Allow300NoNo
18981113SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTUREDecember 2024April 2025Allow410NoNo
18980888SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTUREDecember 2024April 2025Allow410NoNo
18979543Semiconductor Structure and Manufacturing Method ThereofDecember 2024February 2025Allow200NoNo
18872218VERTICAL IGBT WITH COMPLEMENTARY CHANNEL FOR HOLE EXTRACTIONDecember 2024April 2025Allow400NoNo
18950687PI-TYPE TRENCH GATE SILICON CARBIDE MOSFET DEVICE AND FABRICATION METHOD THEREOFNovember 2024September 2025Allow1011NoNo
18865498METHOD FOR TRANSFERRING A LAYER FROM A SOURCE SUBSTRATE TO A DESTINATION SUBSTRATENovember 2024May 2025Allow610NoNo
18937369TRENCH GATE SILICON CARBIDE MOSFET DEVICE AND FABRICATION METHOD THEREOFNovember 2024December 2024Allow200NoNo
18911535INTEGRATED POLYPHASE HYDROGEL AND PREPARATION METHOD AND APPLICATION THEREOF IN FLEXIBLE AND STRETCHABLE SUPERCAPACITOROctober 2024April 2025Allow601NoNo
18855222TECHNIQUE FOR HANDLING DATA ELEMENTS STORED IN AN ARRAY STORAGEOctober 2024August 2025Allow1100YesNo
18907921Advanced Low Electrostatic Field TransistorOctober 2024February 2025Allow500YesNo
18897009LATERAL HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A LATERAL HIGH VOLTAGE SEMICONDUCTOR DEVICESeptember 2024October 2025Allow1310NoNo
18816975STACKABLE AND EMBEDDABLE VERTICAL CAPACITORS IN SEMICONDUCTOR DEVICES AND METHOD OF FABRICATIONAugust 2024May 2025Allow902NoNo
18811880Processor with Opportunistic Bypass of Dispatch Buffer and Reservation StationAugust 2024August 2025Allow1100NoNo
18839996SEMICONDUCTOR ASSEMBLY COMPRISING A FIRST SEMICONDUCTOR ELEMENT AND A FIRST CONNECTION ELEMENTAugust 2024October 2025Allow1311NoNo
18792267THROUGH-DIELECTRIC-VIAS (TDVs) FOR 3D INTEGRATED CIRCUITS IN SILICONAugust 2024May 2025Allow920YesNo
18785583SILICON CARBIDE SPLIT-GATE MOSFETS INTEGRATING HIGH-SPEED FREEWHEELING DIODES AND PREPARATION METHODS THEREOFJuly 2024February 2025Allow720NoNo
18778976MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH IMAGE SENSORS AND WAFER BONDINGJuly 2024July 2025Allow1210NoNo
18777737SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICESJuly 2024February 2025Allow700NoNo
18774563TRENCH MOS RECTIFIER WITH TERMINATION STRUCTUREJuly 2024December 2024Allow501YesNo
18771630SEMICONDUCTOR DEVICES WITH BACKSIDE VIA AND METHODS THEREOFJuly 2024October 2025Allow1520NoNo
18769958Conductive Feature FormationJuly 2024March 2025Allow800NoNo
18769902HIGH-ELECTRON-MOBILITY TRANSISTORS WITH INACTIVE GATE BLOCKSJuly 2024September 2024Allow310NoNo
18770547NOVEL PHASE CHANGE RANDOM ACCESS MEMORY DEVICEJuly 2024April 2025Allow910NoNo
18770393BACKSIDE CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICESJuly 2024February 2026Allow1920YesNo
18769940Multigate Device Having Reduced Contact ResistivityJuly 2024August 2025Allow1310NoNo
18768561METHOD FOR FORMING SEMICONDUCTOR STRUCTUREJuly 2024May 2025Allow1000NoNo
18769168SEMICONDUCTOR TRANSISTOR DEVICE STRUCTURE INCLUDING NANOSTRUCTURE AND GATE STRUCTURE WITH PROTECTION LAYER AND FILL LAYER AND METHOD FOR FORMING THE SAMEJuly 2024July 2025Allow1210NoNo
18766701MEMORY DEVICEJuly 2024October 2025Allow1600NoNo
18766944DISPLAY DEVICEJuly 2024April 2025Allow910NoNo
18767291SEMICONDUCTOR DEVICES WITH MODIFIED SOURCE/DRAIN FEATURE AND METHODS THEREOFJuly 2024August 2025Allow1420YesNo
18766867Semiconductor Transistor Devices Having Double-sided Interconnect StructuresJuly 2024June 2025Allow1110NoNo
18766991SEMICONDUCTOR TRANSISTOR DEVICE HAVING BACKSIDE SOURCE/DRAIN CONTACT WITH A LOW-K SPACER AND METHOD OF FORMING THE SAMEJuly 2024July 2025Allow1210NoNo
18764641LIGHT EMITTING ELEMENTJuly 2024June 2025Allow1110YesNo
18764971SEMICONDUCTOR DEVICE HAVING METALLIZATION LAYER WITH LOW CAPACITANCE AND METHOD FOR MANUFACTURING THE SAMEJuly 2024June 2025Allow1110NoNo
18764355SEMICONDUCTOR DEVICE HAVING CONTACT PLUG CONNECTED TO GATE STRUCTURE ON PMOS REGIONJuly 2024July 2025Allow1310NoNo
18762560Manufacturing Method for a Power MOSFET with Gate-Source ESD Diode StructureJuly 2024October 2024Allow310NoNo
18761585PHOTORESIST LAYER SURFACE TREATMENT, CAP LAYER, AND METHOD OF FORMING PHOTORESIST PATTERNJuly 2024July 2025Allow1211NoNo
18760829INCREASING SOURCE/DRAIN DOPANT CONCENTRATION TO REDUCED RESISTANCEJuly 2024March 2025Allow900YesNo
18761200SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAMEJuly 2024June 2025Allow1110NoNo
18760960SEMICONDUCTOR DEVICE HAVING A JUNCTION PORTION CONTACTING A SCHOTTKY METALJuly 2024October 2025Allow1520NoNo
18759037GATE-ALL AROUND TRANSISTOR WITH ISOLATING FEATURE UNDER SOURCE/DRAINJune 2024July 2025Allow1310NoNo
18759611FORMING SEMICONDUCTOR STRUCTURES WITH TWO-DIMENSIONAL MATERIALSJune 2024May 2025Allow1010NoNo
18756008METHOD AND STRUCTURE FOR BARRIER-LESS PLUGJune 2024February 2025Allow801NoNo
18757396GERMANIUM-CONTAINING PHOTODETECTOR AND METHODS OF FORMING THE SAMEJune 2024July 2025Allow1211NoNo
18755041METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING SEGMENTED INTERCONNECTJune 2024July 2025Allow1200NoNo
18754754DISPLAY DEVICE WITH TOUCH SENSING LAYERJune 2024April 2025Allow1010NoNo
18754448IMAGE SENSOR AND MANUFACTURING PROCESS THEREOFJune 2024March 2025Allow900NoNo
18755342MULTI-GATE DEVICE AND RELATED METHODSJune 2024March 2025Allow801NoNo
18753892PACKAGING OF A SEMICONDUCTOR DEVICE WITH A PLURALITY OF LEADSJune 2024May 2025Allow1010NoNo
18752851INTEGRATED CIRCUIT DEVICES INCLUDING LOWER INTERCONNECT METAL LAYERS AT CELL BOUNDARIES AND METHODS OF FORMING THE SAMEJune 2024August 2025Allow1411YesNo
18752963DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICEJune 2024February 2026Allow1910NoNo
18753469GATE-ALL-AROUND TRANSISTOR HAVING INNER SPACE LINED BY A SEMICONDUCTOR LINER AND METHOD OF FORMING THE SAMEJune 2024September 2025Allow1520NoNo
18752086TRANSISTOR AND METHOD FOR MANUFACTURING THE SAMEJune 2024October 2025Allow1510YesNo
18751724CHIP PACKAGE STRUCTURE WITH LIDJune 2024May 2025Allow1010NoNo
18751628SEMICONDUCTOR DEVICE STRUCTURE WITH INTERCONNECT STRUCTURE HAVING AIR GAPJune 2024October 2025Allow1620NoNo
18750063BIPOLAR JUNCTION TRANSISTOR WITH GATE OVER TERMINALSJune 2024January 2025Allow700NoNo
18749899SEMICONDUCTOR STRUCTURE WITH AIR GAP IN PATTERN-DENSE REGION AND METHOD OF MANUFACTURING THE SAMEJune 2024January 2025Allow710NoNo
18750751NANOWIRE TRANSISTOR WITH SOURCE AND DRAIN INDUCED BY ELECTRICAL CONTACTS WITH NEGATIVE SCHOTTKY BARRIER HEIGHTJune 2024April 2025Allow1010NoNo
18748489METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND ENRICHED SILICON 28 EPITAXIAL LAYERJune 2024February 2025Allow710NoNo
18747615Semiconductor Device with Uneven Electrode Surface and Method for Fabricating the SameJune 2024January 2025Allow700NoNo
18746928INTEGRATED CIRCUIT DEVICE INCLUDING N-CHANNEL METAL-OXIDE SEMICONDUCTOR (NMOS) TRANSISTOR REIGION AND A P-CHANNEL METAL-OXIDE SEMICONDUCTOR (PMOS) TRANSISTOR REGIONJune 2024June 2025Allow1110NoNo
18747151Dual Side Source/Drain Contact Structures in Semiconductor Devices and Method for Forming the sameJune 2024July 2025Allow1320YesNo
18743453SEMICONDUCTOR DEVICE WITH PROGRAMMABLE STRUCTURE AND METHOD FOR FABRICATING THE SAMEJune 2024January 2025Allow700NoNo
18741998METHOD OF FORMING A GATE STRUCTURE INCLUDING SEMICONDUCTOR MATERIAL IMPLANTATION INTO DUMMY GATE STACKJune 2024February 2025Allow800NoNo
18742968WINDOW-BASED CONTROL FOR INSTRUCTION ISSUE IN AN OUT-OF-ORDER PROCESSORJune 2024June 2025Allow1200NoNo
18741123SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJune 2024October 2025Allow1610NoNo
18740970TRENCH ETCHING PROCESS FOR PHOTORESIST LINE ROUGHNESS IMPROVEMENTJune 2024July 2025Allow1311NoNo
18739341SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOFJune 2024November 2025Allow1720NoNo
18739336SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOFJune 2024January 2026Allow1920NoNo
18739078REINFORCED THIN-FILM DEVICEJune 2024April 2025Allow1000NoNo
18738742SEMICONDUCTOR DEVICES DEVICES INCLUDING CRYSTALLIZED LAYER HAVING MULTIPLE CRYSTALLINE ORIENTATIONS AND METHODS OF MANUFACTUREJune 2024February 2025Allow800NoNo
18739140SILVER PATTERNING AND INTERCONNECT PROCESSESJune 2024December 2024Allow600NoNo
18736793SEMICONDUCTOR DEVICE WITH ACTIVE PATTERN INCLUDING A TRANSITION PATTERN AND METHOD FOR FABRICATING THE SAMEJune 2024October 2025Allow1700NoNo
18737166Nanosheet Devices With Hybrid Structures And Methods Of Fabricating The SameJune 2024April 2025Allow1010NoNo
18737600IMAGE SENSOR DEVICE AND METHODS OF FORMING THE SAMEJune 2024March 2025Allow1010NoNo
18737382TRANSISTOR DEVICE WITH TAPERED GATE CONTACT PROFILEJune 2024October 2025Allow1620NoNo
18735999SEMICONDUCTOR NANOPARTICLES, METHOD OF PRODUCING THE SEMICONDUCTOR NANOPARTICLES, AND LIGHT-EMITTING DEVICEJune 2024January 2025Allow810NoNo
18734800Display Panel and Display DeviceJune 2024July 2025Allow1310NoNo
18733451LASER DRILLING OF METAL FOILS FOR ASSEMBLY IN AN ELECTROLYTIC CAPACITORJune 2024February 2025Allow810NoNo
18733213Light-Emitting Diode Chip, Display Substrate And Manufacturing Method ThereofJune 2024April 2025Allow1010YesNo
18733564GATE STRUCTURES AND SPACERS IN SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2024July 2025Allow1311NoNo
18732626STRUCTURAL SCREEN WINDOW LIQUID METAL THERMAL INTERFACE PADJune 2024January 2025Allow810NoNo
18732363DISPLAY DEVICE INCLUDING AN OPTICAL SENSOR ON AN AREA OVERLAPPING AN ACTIVE AREA OF A DISPLAY PANELJune 2024October 2025Allow1620NoNo
18732003BURIED PAD FOR USE WITH GATE-ALL-AROUND DEVICEJune 2024April 2025Allow1010NoNo
18678141Multi-Die Package Structures Including an Interconnected Package Component disposed in a Substrate CavityMay 2024August 2025Allow1410NoNo
18678215SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFMay 2024May 2025Allow1110NoNo
18676380FOLDABLE, FLEXIBLE DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEMay 2024March 2025Allow1001NoNo
18676451IMAGE SENSORMay 2024January 2025Allow800NoNo
18675560SEMICONDUCTOR DIE PACKAGE WITH RING STRUCTUREMay 2024March 2025Allow1000NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2812.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
116
Examiner Affirmed
79
(68.1%)
Examiner Reversed
37
(31.9%)
Reversal Percentile
47.5%
Lower than average

What This Means

With a 31.9% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
790
Allowed After Appeal Filing
325
(41.1%)
Not Allowed After Appeal Filing
465
(58.9%)
Filing Benefit Percentile
89.9%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 41.1% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2812 - Prosecution Statistics Summary

Executive Summary

Art Unit 2812 is part of Group 2810 in Technology Center 2800. This art unit has examined 24,170 patent applications in our dataset, with an overall allowance rate of 86.5%. Applications typically reach final disposition in approximately 22 months.

Comparative Analysis

Art Unit 2812's allowance rate of 86.5% places it in the 83% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2812 receive an average of 1.40 office actions before reaching final disposition (in the 16% percentile). The median prosecution time is 22 months (in the 91% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.