Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 19210377 | SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTURE | May 2025 | October 2025 | Allow | 5 | 1 | 0 | No | No |
| 19004132 | SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTURE | December 2024 | May 2025 | Allow | 5 | 1 | 0 | No | No |
| 18981113 | SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTURE | December 2024 | April 2025 | Allow | 4 | 1 | 0 | No | No |
| 18980888 | SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTURE | December 2024 | April 2025 | Allow | 4 | 1 | 0 | No | No |
| 18839996 | SEMICONDUCTOR ASSEMBLY COMPRISING A FIRST SEMICONDUCTOR ELEMENT AND A FIRST CONNECTION ELEMENT | August 2024 | October 2025 | Allow | 13 | 1 | 1 | No | No |
| 18770547 | NOVEL PHASE CHANGE RANDOM ACCESS MEMORY DEVICE | July 2024 | April 2025 | Allow | 9 | 1 | 0 | No | No |
| 18764971 | SEMICONDUCTOR DEVICE HAVING METALLIZATION LAYER WITH LOW CAPACITANCE AND METHOD FOR MANUFACTURING THE SAME | July 2024 | June 2025 | Allow | 11 | 1 | 0 | No | No |
| 18751724 | CHIP PACKAGE STRUCTURE WITH LID | June 2024 | May 2025 | Allow | 10 | 1 | 0 | No | No |
| 18732626 | STRUCTURAL SCREEN WINDOW LIQUID METAL THERMAL INTERFACE PAD | June 2024 | January 2025 | Allow | 8 | 1 | 0 | No | No |
| 18674930 | MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE | May 2024 | April 2025 | Allow | 11 | 1 | 0 | Yes | No |
| 18674649 | SEMICONDUCTOR CIRCUIT STRUCTURE WITH DIRECT DIE HEAT REMOVAL STRUCTURE | May 2024 | December 2024 | Allow | 6 | 1 | 1 | No | No |
| 18631181 | METHOD FOR FORMING SEMICONDUCTOR PACKAGE STRUCTURE | April 2024 | March 2025 | Allow | 11 | 1 | 0 | No | No |
| 18625324 | CHIP CERAMIC ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME | April 2024 | March 2025 | Allow | 11 | 1 | 0 | No | No |
| 18616191 | METHODS OF FORMING SEMICONDUCTOR DEVICE | March 2024 | March 2025 | Allow | 12 | 1 | 0 | Yes | No |
| 18612949 | SEMICONDUCTOR DEVICE STACK-UP WITH BULK SUBSTRATE MATERIAL TO MITIGATE HOT SPOTS | March 2024 | March 2025 | Allow | 11 | 1 | 0 | Yes | No |
| 18428088 | COMPOSITE SUBSTRATE AND METHOD OF PRODUCING THE COMPOSITE SUBSTRATE, AND SEMICONDUCTOR DEVICE COMPRISING THE COMPOSITE SUBSTRATE | January 2024 | January 2025 | Allow | 11 | 1 | 0 | No | No |
| 18406162 | VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS | January 2024 | March 2025 | Allow | 14 | 1 | 0 | No | No |
| 18400871 | COBALT BASED INTERCONNECTS AND METHODS OF FABRICATION THEREOF | December 2023 | January 2025 | Allow | 13 | 1 | 0 | Yes | No |
| 18399504 | INTEGRATED VOLTAGE REGULATOR AND PASSIVE COMPONENTS | December 2023 | October 2024 | Allow | 10 | 0 | 0 | Yes | No |
| 18543133 | DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF | December 2023 | March 2025 | Allow | 15 | 1 | 0 | Yes | No |
| 18537954 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING A MEMORY CELL | December 2023 | December 2024 | Allow | 12 | 1 | 0 | No | No |
| 18525435 | DIE INTERCONNECT SUBSTRATE, AN ELECTRICAL DEVICE AND A METHOD FOR FORMING A DIE INTERCONNECT SUBSTRATE | November 2023 | January 2025 | Allow | 14 | 1 | 0 | No | No |
| 18525131 | METHOD FOR NON-RESIST NANOLITHOGRAPHY | November 2023 | January 2025 | Allow | 14 | 1 | 0 | No | No |
| 18522752 | METHOD OF MAKING SEMICONDUCTOR DEVICE INCLUDING METAL INSULATOR METAL CAPACITOR | November 2023 | April 2025 | Allow | 17 | 1 | 0 | No | No |
| 18520361 | LEADFRAME SPACER FOR DOUBLE-SIDED POWER MODULE | November 2023 | December 2024 | Allow | 13 | 1 | 0 | No | No |
| 18515536 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES | November 2023 | October 2024 | Allow | 11 | 1 | 0 | No | No |
| 18511438 | Metal-Insulator-Metal Structure | November 2023 | October 2024 | Allow | 11 | 1 | 0 | No | No |
| 18500357 | CMOS IMAGE SENSOR HAVING INDENTED PHOTODIODE STRUCTURE | November 2023 | August 2024 | Allow | 10 | 1 | 0 | No | No |
| 18493194 | WIRE BONDED AIR HEAT SINK | October 2023 | December 2024 | Allow | 14 | 1 | 0 | No | No |
| 18375750 | BALL GRID ARRAY PACKAGE DESIGN | October 2023 | September 2024 | Allow | 11 | 1 | 1 | No | No |
| 18472227 | PACKAGE STRUCTURE WITH PHOTONIC DIE AND METHOD | September 2023 | August 2024 | Allow | 11 | 1 | 0 | Yes | No |
| 18469615 | DIRECT BONDED COPPER SUBSTRATES FABRICATED USING SILVER SINTERING | September 2023 | August 2024 | Allow | 11 | 1 | 0 | Yes | No |
| 18367052 | SEMICONDUCTOR DEVICE WITH AIR GAP BELOW LANDING PAD AND METHOD FOR FORMING THE SAME | September 2023 | May 2024 | Allow | 8 | 1 | 0 | No | No |
| 18232750 | NOVEL RESISTIVE RANDOM ACCESS MEMORY DEVICE | August 2023 | May 2024 | Allow | 9 | 1 | 0 | No | No |
| 18446648 | Semiconductor Devices Including Decoupling Capacitors | August 2023 | September 2024 | Allow | 13 | 1 | 1 | No | No |
| 18231750 | PHASE CHANGE RANDOM ACCESS MEMORY DEVICE | August 2023 | May 2024 | Allow | 9 | 1 | 0 | No | No |
| 18366513 | DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF | August 2023 | January 2025 | Allow | 17 | 1 | 0 | No | No |
| 18363865 | DIELECTRIC CAPPING STRUCTURE OVERLYING A CONDUCTIVE STRUCTURE TO INCREASE STABILITY | August 2023 | August 2024 | Allow | 12 | 1 | 1 | No | No |
| 18274747 | Power Semiconductor Device | July 2023 | March 2026 | Allow | 31 | 1 | 0 | No | No |
| 18361560 | REDUCING RC DELAY IN SEMICONDUCTOR DEVICES | July 2023 | May 2024 | Allow | 10 | 1 | 0 | No | No |
| 18360465 | PACKAGE STRUCTURE WITH PROTECTIVE LID | July 2023 | June 2024 | Allow | 10 | 1 | 0 | No | No |
| 18226891 | SEMICONDUCTOR DEVICE | July 2023 | April 2024 | Allow | 9 | 1 | 0 | No | No |
| 18359023 | DEEP TRENCH CAPACITOR INCLUDING STRESS-RELIEF VOIDS AND METHODS OF FORMING THE SAME | July 2023 | June 2024 | Allow | 10 | 1 | 0 | No | No |
| 18359011 | METAL PLATE CORNER STRUCTURE ON METAL INSULATOR METAL | July 2023 | May 2024 | Allow | 10 | 1 | 0 | No | No |
| 18354941 | GALVANIC ISOLATION USING ISOLATION BREAK BETWEEN REDISTRIBUTION LAYER ELECTRODES | July 2023 | March 2026 | Allow | 31 | 1 | 0 | No | No |
| 18223981 | TECHNIQUES AND CONFIGURATIONS TO REDUCE TRANSISTOR GATE SHORT DEFECTS | July 2023 | May 2024 | Allow | 10 | 1 | 0 | No | No |
| 18352465 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | July 2023 | February 2026 | Allow | 31 | 1 | 0 | Yes | No |
| 18352552 | SEMICONDUCTOR DEVICE | July 2023 | February 2026 | Allow | 31 | 1 | 0 | Yes | No |
| 18349292 | SEMICONDUCTOR DEVICE PACKAGE HAVING METAL THERMAL INTERFACE MATERIAL | July 2023 | May 2024 | Allow | 11 | 1 | 0 | No | No |
| 18347794 | RRAM MEMORY CELL WITH MULTIPLE FILAMENTS | July 2023 | April 2024 | Allow | 10 | 1 | 0 | No | No |
| 18348049 | INSULATING SUBSTRATE AND POWER MODULE USING THE SAME | July 2023 | July 2024 | Allow | 13 | 1 | 0 | Yes | No |
| 18346622 | Mechanism for FinFET Well Doping | July 2023 | May 2024 | Allow | 11 | 1 | 0 | No | No |
| 18337069 | METAL INSULATOR METAL CAPACITOR (MIM CAPACITOR) | June 2023 | January 2026 | Allow | 31 | 1 | 0 | Yes | No |
| 18336412 | THIN FILM RESISTOR, THERMISTOR AND METHOD OF PRODUCING THE SAME | June 2023 | March 2026 | Allow | 33 | 1 | 0 | Yes | No |
| 18334381 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | June 2023 | August 2024 | Allow | 14 | 1 | 1 | No | No |
| 18334380 | SEMICONDUCTOR STRUCTURE | June 2023 | January 2026 | Allow | 31 | 1 | 0 | No | No |
| 18333590 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | June 2023 | February 2026 | Allow | 32 | 1 | 1 | No | No |
| 18333863 | REDUCTION OF MIDDLE-OF-LINE RESISTANCE AND CAPACITANCE | June 2023 | March 2026 | Allow | 33 | 1 | 1 | No | No |
| 18207828 | SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD FOR FABRICATING THE SAME | June 2023 | October 2025 | Allow | 28 | 1 | 0 | No | No |
| 18207175 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | June 2023 | April 2024 | Allow | 11 | 1 | 0 | No | No |
| 18330466 | Metal Loss Prevention Using Implantation | June 2023 | April 2024 | Allow | 10 | 1 | 0 | No | No |
| 18203130 | SEMICONDUCTOR PACKAGE | May 2023 | December 2025 | Allow | 30 | 1 | 0 | Yes | No |
| 18325315 | SILICON WAFER AND METHOD FOR FILLING SILICON VIA THEREOF | May 2023 | December 2025 | Allow | 31 | 1 | 0 | No | No |
| 18201995 | SEMICONDUCTOR DEVICE | May 2023 | March 2026 | Allow | 34 | 1 | 0 | Yes | No |
| 18254210 | CIRCUIT BOARD, LIGHT-EMITTING SUBSTRATE, BACKLIGHT MODULE, DISPLAY PANEL AND DISPLAY DEVICE | May 2023 | December 2025 | Allow | 31 | 1 | 0 | No | No |
| 18321210 | DOUBLE-SIDED COOLING PACKAGE FOR DOUBLE-SIDED, BI-DIRECTIONAL JUNCTION TRANSISTOR | May 2023 | February 2026 | Allow | 33 | 1 | 1 | No | No |
| 18318644 | ORGANIC LIGHT EMITTING DIODE DISPLAY | May 2023 | March 2024 | Allow | 10 | 1 | 0 | No | No |
| 18195942 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | May 2023 | October 2025 | Allow | 30 | 1 | 0 | No | No |
| 18314875 | INTEGRATED CIRCUIT DEVICES WITH ANGLED TRANSISTORS AND ANGLED ROUTING TRACKS | May 2023 | November 2025 | Allow | 30 | 1 | 0 | No | No |
| 18314844 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | May 2023 | March 2026 | Allow | 34 | 1 | 1 | No | No |
| 18141118 | ELECTRICALLY ISOLATED DISCRETE PACKAGE WITH HIGH PERFORMANCE CERAMIC SUBSTRATE | April 2023 | December 2025 | Allow | 31 | 1 | 0 | Yes | No |
| 18307197 | METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH RESISTIVE ELEMENTS | April 2023 | March 2024 | Allow | 11 | 1 | 0 | No | No |
| 18138397 | METHOD OF MANUFACTURING LIGHT SOURCE DEVICE HAVING A BONDING LAYER WITH BUMPS AND A BONDING MEMBER | April 2023 | March 2024 | Allow | 11 | 1 | 0 | No | No |
| 18135927 | SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME | April 2023 | December 2025 | Allow | 32 | 1 | 0 | Yes | No |
| 18131462 | SEMICONDUCTOR STRUCTURE HAVING DIELECTRIC LINER AND METHOD OF MANUFACTURING THE SAME | April 2023 | August 2025 | Allow | 28 | 1 | 0 | No | No |
| 18193932 | Lid Structure With Openings To Alleviate Leakage Of Thermal Interface Material Of A Chip Assembly | March 2023 | February 2026 | Allow | 35 | 1 | 1 | Yes | No |
| 18193624 | SEMICONDUCTOR DEVICE FOR ATTACHING TO A FLEXIBLE DISPLAY | March 2023 | February 2024 | Allow | 10 | 1 | 0 | No | No |
| 18181557 | CHIP PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME | March 2023 | December 2025 | Allow | 33 | 1 | 1 | No | No |
| 18172409 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | February 2023 | March 2026 | Allow | 37 | 1 | 1 | No | No |
| 18089615 | SEMICONDUCTOR DEVICE | December 2022 | October 2025 | Allow | 34 | 1 | 0 | Yes | No |
| 18089537 | SEMICONDUCTOR DEVICE STACK-UP WITH BULK SUBSTRATE MATERIAL TO MITIGATE HOT SPOTS | December 2022 | January 2024 | Allow | 13 | 1 | 0 | No | No |
| 18065117 | EMBEDDED ReRAM WITH BACKSIDE CONTACT | December 2022 | October 2025 | Allow | 34 | 1 | 0 | No | No |
| 17986407 | CIRCUIT-BOARD COMPONENT AND MANUFACTURING METHOD THEREOF, AND LIGHT-EMITTING COMPONENT AND MANUFACTURING METHOD THEREOF | November 2022 | December 2025 | Abandon | 37 | 1 | 0 | No | No |
| 17980949 | SEMICONDUCTOR STRUCTURES INCLUDING MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK | November 2022 | November 2024 | Allow | 24 | 2 | 0 | No | No |
| 18050413 | SEMICONDUCTOR PACKAGE, METHOD OF FORMING THE PACKAGE AND ELECTRONIC DEVICE | October 2022 | October 2025 | Allow | 36 | 1 | 0 | Yes | No |
| 17972892 | Hybrid Power Rail Formation in Dielectric Isolation for Semiconductor Device | October 2022 | November 2025 | Allow | 37 | 1 | 0 | Yes | No |
| 17996888 | SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS | October 2022 | November 2025 | Allow | 37 | 1 | 0 | Yes | No |
| 17917070 | ELECTRIC ASSEMBLY INCLUDING HEAT SPREADING LAYER | October 2022 | July 2025 | Allow | 33 | 1 | 0 | No | No |
| 17937313 | POWER VIA WITH REDUCED RESISTANCE | September 2022 | October 2025 | Allow | 37 | 1 | 0 | No | No |
| 17915975 | SEMICONDUCTOR DEVICE | September 2022 | September 2025 | Abandon | 36 | 1 | 0 | No | No |
| 17956806 | SEMICONDUCTOR MODULE, SEMICONDUCTOR APPARATUS, AND VEHICLE | September 2022 | July 2025 | Allow | 33 | 1 | 0 | No | No |
| 17934672 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | September 2022 | October 2025 | Allow | 37 | 1 | 1 | No | No |
| 17913662 | Power Module Device with an Embedded Power Semiconductor Device | September 2022 | August 2025 | Allow | 35 | 1 | 1 | No | No |
| 17906847 | SEMICONDUCTOR DEVICE | September 2022 | July 2025 | Allow | 34 | 1 | 0 | No | No |
| 17932887 | SEMICONDUCTOR DEVICE HAVING EDGE SEAL AND METHOD OF MAKING THEREOF WITHOUT METAL HARD MASK ARCING | September 2022 | October 2025 | Allow | 37 | 1 | 1 | No | No |
| 17945542 | DECOUPLING CAPACITOR STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME | September 2022 | November 2025 | Allow | 38 | 1 | 0 | Yes | No |
| 17945200 | PACKAGE SUBSTRATE BASED ON MOLDING PROCESS AND MANUFACTURING METHOD THEREOF | September 2022 | December 2025 | Allow | 39 | 1 | 1 | No | No |
| 17930123 | DUAL STRUCTURED BURIED RAIL | September 2022 | August 2025 | Allow | 35 | 1 | 1 | No | No |
| 17909471 | POWER MODULE | September 2022 | June 2025 | Allow | 34 | 1 | 0 | No | No |
| 17899740 | DIELECTRIC CAPS FOR POWER AND SIGNAL LINE ROUTING | August 2022 | April 2025 | Allow | 32 | 1 | 0 | No | No |
No appeal data available for this record. This may indicate that no appeals have been filed or decided for applications in this dataset.
Examiner VALENZUELA, PATRICIA D works in Art Unit 2812 and has examined 79 patent applications in our dataset. With an allowance rate of 94.9%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 33 months.
Examiner VALENZUELA, PATRICIA D's allowance rate of 94.9% places them in the 84% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.
On average, applications examined by VALENZUELA, PATRICIA D receive 1.20 office actions before reaching final disposition. This places the examiner in the 15% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.
The median time to disposition (half-life) for applications examined by VALENZUELA, PATRICIA D is 33 months. This places the examiner in the 48% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.
Conducting an examiner interview provides a +0.1% benefit to allowance rate for applications examined by VALENZUELA, PATRICIA D. This interview benefit is in the 17% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 25.0% of applications are subsequently allowed. This success rate is in the 38% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.
This examiner enters after-final amendments leading to allowance in 66.7% of cases where such amendments are filed. This entry rate is in the 90% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.
When applicants file petitions regarding this examiner's actions, 0.0% are granted (fully or in part). This grant rate is in the 4% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 24% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 30% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.