Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18441658 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH SUBMOUNT INCLUDING GROOVE ON SURFACE OF SUBMOUNT HAVING HEAT DISSIPATION PORTION | February 2024 | January 2025 | Allow | 11 | 1 | 0 | No | No |
| 18121730 | Illumination apparatus comprising passive optical nanostructures | March 2023 | May 2025 | Allow | 26 | 3 | 0 | No | No |
| 18041087 | PROCESSING TASK START METHOD AND DEVICE IN SEMICONDUCTOR PROCESSING APPARATUS | February 2023 | June 2025 | Allow | 28 | 0 | 0 | No | No |
| 17775392 | ARRAY PANEL, AND DISPLAY DEVICE HAVING TOUCH SIGNAL LINE, COMMON ELECTRODE AND PIXEL ELECTRODE SEQUENTLIALLY STACKED AND OVERLAPPING SUB-PIXEL OPENING AREA. | May 2022 | March 2025 | Allow | 35 | 1 | 0 | No | No |
| 17727487 | Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells | April 2022 | February 2025 | Allow | 34 | 0 | 1 | No | No |
| 17699430 | SEMICONDUCTOR DEVICE AND METHOD | March 2022 | June 2025 | Allow | 39 | 1 | 1 | No | No |
| 17687854 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD FOR THE SAME | March 2022 | April 2025 | Abandon | 37 | 1 | 1 | No | No |
| 17681912 | Display Device WITH LED DISPOSED ON SUBSTRATE INCLUDING TRANSLUSENT BODY AND CONDUCTIVE WIRE LAYER | February 2022 | June 2025 | Abandon | 39 | 2 | 0 | No | No |
| 17584391 | ELECTRONIC DEVICE WITH IMPROVED STRUCTURAL RELIABILITY INCLUDING ELECTRONIC COMPONENT AND DRIVING STRUCTURE COUPLED VIA CONDUCTOR LAYER | January 2022 | November 2024 | Abandon | 34 | 4 | 0 | No | No |
| 17295062 | METAL GATE STRUCTURE AND MANUFACTURING METHOD THEREOF | January 2022 | April 2025 | Abandon | 46 | 2 | 0 | No | No |
| 17574652 | Method for Manufacturing Contact Hole, Semiconductor Structure and Electronic Equipment | January 2022 | August 2024 | Allow | 31 | 0 | 0 | No | No |
| 17564740 | FULL-COLOR LED DISPLAY USING ULTRA-THIN LED ELEMENT AND METHOD FOR MANUFACTURING THEREOF | December 2021 | November 2024 | Allow | 34 | 1 | 1 | No | No |
| 17645513 | INFRARED DEVICE COMPRISING MESA PORTION INCLUDING THREE LATERAL SURFACES FORMING SPECIFICED ANGLES WITH SUBSTRATE FACE | December 2021 | December 2024 | Allow | 36 | 2 | 1 | Yes | No |
| 17551182 | LED MODULE AND DISPLAY DEVICE HAVING LED MODULE | December 2021 | November 2024 | Abandon | 35 | 1 | 0 | No | No |
| 17515954 | INTEGRATED CIRCUIT DEVICE HAVING PARALLEL CONDUCTIVE LINES WITH BULGING END PORTION(S) AND METHOD OF MANUFACTURING THE SAME | November 2021 | February 2024 | Allow | 27 | 2 | 1 | Yes | No |
| 17486775 | DISPLAY WITH OVERLAPPING SIGNAL LINES ON DIFFERENT LAYERS AND SHIELDING LAYER THEREBETWEEN | September 2021 | September 2024 | Allow | 36 | 1 | 0 | No | No |
| 17598232 | DISPLAY ASSEMBLY AND DISPLAY DEVICE EACH INCLUDING FLEXIBLE CIRCUIT BOARD WITH REINFORCEMENT PLATE HAVING WAVE SHAPED EDGE | September 2021 | September 2024 | Allow | 36 | 1 | 0 | No | No |
| 17476772 | MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE INCLUDING COMPLEMENTARY FIRST AND SECOND MASK PATTERNS | September 2021 | September 2024 | Allow | 36 | 1 | 0 | No | No |
| 17472577 | METAL INTERCONNECT STRUCTURE HAVING SERPENT METAL LINE | September 2021 | March 2025 | Allow | 42 | 6 | 0 | Yes | No |
| 17438395 | DISPLAY APPARATUS HAVING FLEXIBLE PANEL AND SHIELDED MULTIPLEXER IN NON-DISPLAY SUB-REGION AND METHOD FOR MANUFACTURING THE SAME | September 2021 | May 2025 | Allow | 44 | 3 | 0 | No | No |
| 17432908 | Controlled Wetting in the Manufacture of Electronic Components | August 2021 | January 2025 | Allow | 41 | 3 | 0 | Yes | No |
| 17405606 | SEMICONDUCTOR DEVICE WITH ACTIVE PATTERN INCLUDING A TRANSITION PATTERN AND METHOD FOR FABRICATING THE SAME | August 2021 | March 2024 | Allow | 31 | 2 | 1 | Yes | No |
| 17427107 | Display Panel Having Touch Electrode Leads Arranged between Substrate and Dam Structure and Preparation Method therefor, and Display Apparatus | July 2021 | July 2024 | Allow | 36 | 2 | 0 | No | No |
| 17375352 | PELLICLE FOR EUV LITHOGRAPHY AND METHOD OF MANUFACTURING THE SAME | July 2021 | September 2024 | Abandon | 38 | 1 | 1 | No | No |
| 17368567 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | July 2021 | January 2025 | Allow | 43 | 2 | 1 | Yes | No |
| 17353719 | ELECTRONIC DEVICE INCLUDING A PROTECTION LAYER | June 2021 | June 2024 | Allow | 36 | 2 | 1 | No | No |
| 17353262 | VAPOR DEPOSITION OF FILMS COMPRISING MOLYBDENUM | June 2021 | February 2025 | Allow | 44 | 3 | 0 | Yes | No |
| 17349896 | FILLER CELLS FOR INTEGRATED CIRCUIT DESIGN | June 2021 | May 2024 | Allow | 35 | 1 | 1 | Yes | No |
| 17346344 | SEMICONDUCTOR MEMORY DEVICE HAVING STACK OF POLYCRYSTALLINE SEMICONDUCTOR LAYERS WITH DIVERSE AVERAGE CRYSTAL GRAIN SIZES | June 2021 | March 2024 | Allow | 33 | 2 | 1 | Yes | No |
| 17324964 | AI SYSTEM ON CHIP (SOC) FOR ROBOTICS VISION APPLICATIONS | May 2021 | October 2024 | Allow | 41 | 2 | 0 | No | No |
| 17280912 | DISPLAY PANEL WITH TRANSISTOR DISPOSED IN REGION CORRESPONDING TO DATA LINE | March 2021 | April 2025 | Allow | 49 | 4 | 0 | No | No |
| 17204380 | HIGHLY INTEGRATED MEMORY AND PERIPHERAL CIRCUITS DEVICES HAVING DISH-SHAPED DUMMY MOLD STRUCTURES THEREIN | March 2021 | December 2024 | Abandon | 45 | 2 | 0 | Yes | No |
| 17276060 | ELECTROLUMINESCENT DEVICES HAVING SENSITIZER AND FLUORESCENT EMITTER | March 2021 | June 2025 | Allow | 51 | 4 | 0 | Yes | No |
| 17274519 | SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS | March 2021 | June 2024 | Allow | 39 | 3 | 0 | No | No |
| 17169230 | SEMICONDUCTOR DEVICE INCLUDING AN EXPOSED SOLDERABLE ELEMENT | February 2021 | July 2024 | Allow | 41 | 3 | 0 | No | No |
| 17262723 | OLED DISPLAY PANEL WITH LIGHT EMITTING LAYER BROKEN AT UNDERCUT STRUCTURE, AND PREPARATION METHOD THEREOF | January 2021 | June 2025 | Abandon | 52 | 4 | 0 | No | No |
| 17124352 | MICROELECTRONIC STRUCTURES INCLUDING GLASS CORES | December 2020 | February 2025 | Allow | 50 | 2 | 1 | Yes | No |
| 17033655 | SELECTIVE USE OF DIFFERENT ADVANCED INTERFACE BUS WITH ELECTRONIC CHIPS | September 2020 | March 2025 | Allow | 54 | 3 | 1 | Yes | No |
| 16979677 | Optoelectronic Semiconductor Device and Method for Producing an Optoelectronic Semiconductor Device | September 2020 | January 2025 | Abandon | 52 | 4 | 0 | Yes | No |
No appeal data available for this record. This may indicate that no appeals have been filed or decided for applications in this dataset.
Examiner CORNELY, JOHN PATRICK works in Art Unit 2812 and has examined 38 patent applications in our dataset. With an allowance rate of 76.3%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 38 months.
Examiner CORNELY, JOHN PATRICK's allowance rate of 76.3% places them in the 34% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.
On average, applications examined by CORNELY, JOHN PATRICK receive 2.13 office actions before reaching final disposition. This places the examiner in the 72% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.
The median time to disposition (half-life) for applications examined by CORNELY, JOHN PATRICK is 38 months. This places the examiner in the 12% percentile for prosecution speed. Applications take longer to reach final disposition with this examiner compared to most others.
Conducting an examiner interview provides a +14.9% benefit to allowance rate for applications examined by CORNELY, JOHN PATRICK. This interview benefit is in the 58% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.
When applicants file an RCE with this examiner, 32.6% of applications are subsequently allowed. This success rate is in the 62% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 28.6% of cases where such amendments are filed. This entry rate is in the 32% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.
When applicants file petitions regarding this examiner's actions, 0.0% are granted (fully or in part). This grant rate is in the 3% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 21% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 28% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.