USPTO Art Unit 2813 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18922186BACK-GATE EFFECT CONTROL VIA DOPINGOctober 2024June 2025Allow710YesNo
18786636MEMORY STRUCTURES AND METHODS OF FORMING THE SAMEJuly 2024March 2025Allow810NoNo
18763686SEMICONDUCTOR PACKAGEJuly 2024April 2025Allow1010NoNo
18739428CAP STRUCTURE COUPLED TO SOURCE TO REDUCE SATURATION CURRENT IN HEMT DEVICEJune 2024March 2025Allow900NoNo
18738161VIA STRUCTURE AND METHODS OF FORMING THE SAMEJune 2024June 2025Allow1210NoNo
18679002SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAMEMay 2024January 2025Allow800NoNo
18673892DISPLAY DEVICEMay 2024March 2025Allow1000NoNo
18669577SEMICONDUCTOR DIE INCLUDING GUARD RING STRUCTURE AND THREE-DIMENSIONAL DEVICE STRUCTURE INCLUDING THE SAMEMay 2024June 2025Allow1311NoNo
18663423ALEFT-ISD-LTSEE{Advanced Low Electrostatic Field Transistor Using Implanted S/D and Low Temperature Selective Epitaxial Extension}May 2024January 2025Allow930YesNo
18663878DUMMY STACKED STRUCTURES SURROUNDING TSVS AND METHOD FORMING THE SAMEMay 2024June 2025Allow1411NoNo
18661750APPARATUS FOR FABRICATING A SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICEMay 2024April 2025Allow1211NoNo
18659519DEPFET TRANSISTORMay 2024May 2025Allow1201NoNo
18658027METHODS OF EQUALIZING GATE HEIGHTS IN EMBEDDED NON-VOLATILE MEMORY ON HKMG TECHNOLOGYMay 2024October 2024Allow601NoNo
18655453RANDOM NUMBER GENERATORS INCLUDING MAGNETIC-TUNNEL-JUNCTION LAYER STACKSMay 2024November 2024Allow611NoNo
18654293VERTICAL DEVICE TRIGGERED SILICON CONTROL RECTIFIERMay 2024February 2025Allow1011NoNo
18654247NEUTRAL pH COPPER PLATING SOLUTION FOR UNDERCUT REDUCTIONMay 2024January 2025Allow900NoNo
18654186HIGH VOLTAGE AVALANCHE DIODE FOR ACTIVE CLAMP DRIVERSMay 2024April 2025Allow1101NoNo
18654794SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTUREMay 2024May 2025Allow1201NoNo
18649247STRUCTURES INCLUDING A PHOTODETECTOR AND MULTIPLE CATHODE CONTACTSApril 2024March 2025Allow1020YesNo
18649713SEMICONDUCTOR DEVICEApril 2024November 2024Allow700NoNo
18648466SEMICONDUCTOR PACKAGEApril 2024May 2025Allow1201NoNo
18642052DEVICE WITH METAL FIELD PLATE EXTENSIONApril 2024January 2025Allow911YesNo
18637915BUFFERED TOP THIN FILM RESISTOR, MIM CAPACITOR, AND METHOD OF FORMING THE SAMEApril 2024March 2025Allow1120YesNo
18637061SEMICONDUCTOR DEVICEApril 2024February 2025Allow1000NoNo
18635399SEMICONDUCTOR DEVICE STRUCTUREApril 2024November 2024Allow700NoNo
18632960UNDER-SOURCE BODY CONTACTApril 2024March 2025Allow1220YesNo
18633188DISPLAY DEVICE, METHOD OF MANUFACTURING DISPLAY DEVICE, AND ELECTRONIC APPARATUSApril 2024January 2025Allow900NoNo
18632506STRUCTURES FOR A LATERALLY-DIFFUSED METAL-OXIDE-SEMICONDUCTOR TRANSISTORApril 2024August 2024Allow501NoNo
18632902STRUCTURE INCLUDING MULTI-LEVEL FIELD PLATE AND METHOD OF FORMING THE STRUCTUREApril 2024August 2024Allow411NoNo
18632532SEMICONDUCTOR DEVICE WITH COMPOSITE CONDUCTIVE FEATURES AND METHOD FOR FABRICATING THE SAMEApril 2024January 2025Allow1000NoNo
18629606EPITAXIAL OXIDE TRANSISTORApril 2024February 2025Allow1000NoNo
18629555EPITAXIAL OXIDE TRANSISTORApril 2024April 2025Allow1200NoNo
18628275Laser Edge Shaping for Semiconductor WafersApril 2024November 2024Allow710NoNo
18626720BIPOLAR TRANSISTORApril 2024March 2025Allow1111NoNo
18625604SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEApril 2024June 2025Allow1411YesNo
18619182METHOD OF MANUFACTURING MERGED PiN SCHOTTKY (MPS) DIODEMarch 2024October 2024Allow700NoNo
18617971HEAT SINK FOR FACE BONDED SEMICONDUCTOR DEVICEMarch 2024March 2025Allow1111NoNo
18617795SURFACE DAMAGE CONTROL IN DIODESMarch 2024March 2025Allow1110YesNo
18617113SEMICONDUCTOR PACKAGEMarch 2024January 2025Allow1010YesNo
18616221SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAMEMarch 2024June 2025Allow1501NoNo
18616427Fan-Out Package Having a Main Die and a Dummy DieMarch 2024October 2024Allow600NoNo
18615573SEMICONDUCTOR DEVICE INCLUDING GATE CONTACT STRUCTURE FORMED FROM GATE STRUCTUREMarch 2024November 2024Allow701NoNo
18615615MULTI-CHANNEL TRANSISTORMarch 2024September 2024Allow601NoNo
18613356METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH OFFSET SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICEMarch 2024July 2024Allow400NoNo
18613389THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICESMarch 2024September 2024Allow600NoNo
18614439SEMICONDUCTOR RECTIFIER AND MANUFACTURING METHOD OF THE SAMEMarch 2024August 2024Allow511NoNo
18611923TRANSISTOR STACKS HAVING INSULATING SPACERS, AND RELATED FABRICATION METHODSMarch 2024March 2025Allow1221YesNo
18611723SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMarch 2024February 2025Allow1120NoNo
18608957SEMICONDUCTOR STRUCTUREMarch 2024February 2025Allow1110NoNo
18604620METHOD FOR MAKING A RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) WAFER INCLUDING A SUPERLATTICEMarch 2024January 2025Allow1120YesNo
18603932METHOD FOR PROCESSING MEMORY DEVICEMarch 2024September 2024Allow610NoNo
18602704LIGHT EMITTING DIODE STRUCTURE HAVING RESONANT CAVITY AND METHOD FOR MANUFACTURING THE SAMEMarch 2024April 2025Allow1310NoNo
18598870SEMICONDUCTOR DEVICEMarch 2024September 2024Allow700NoNo
18598167SEMICONDUCTOR DEVICE WITH COMPOSITE CONDUCTIVE FEATURES AND METHOD FOR FABRICATING THE SAMEMarch 2024December 2024Allow910NoNo
18592553SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMarch 2024November 2024Allow910NoNo
18588986METHODS OF FORMING SEMICONDUCTOR PACKAGESFebruary 2024March 2025Allow1310NoNo
18443357HIGH ELECTRON MOBILITY TRANSISTOR WITH DOPED SEMICONDUCTOR REGION IN GATE STRUCTUREFebruary 2024March 2025Allow1310NoNo
18443143WIDE BAND GAP SEMICONDUCTOR ELECTRONIC DEVICE HAVING A JUNCTION-BARRIER SCHOTTKY DIODEFebruary 2024January 2025Allow1110NoNo
18439652ULTRATHIN SOLID STATE DIES AND METHODS OF MANUFACTURING THE SAMEFebruary 2024September 2024Allow700NoNo
18438338RADIO-FREQUENCY SWITCHING DEVICES HAVING IMPROVED VOLTAGE HANDLING CAPABILITYFebruary 2024September 2024Allow800YesNo
18437609MICROELECTRONIC DEVICES INCLUDING OXIDE MATERIAL BETWEEN DECKS THEREOF, AND RELATED MEMORY DEVICESFebruary 2024January 2025Allow1110NoNo
18436942LIGHT EMITTING DEVICE WITH LED STACK FOR DISPLAY AND DISPLAY APPARATUS HAVING THE SAMEFebruary 2024February 2025Allow1201NoNo
18436325DISPLAY DEVICE AND METHOD OF PROVIDING THE SAMEFebruary 2024April 2025Allow1420YesNo
18436812SEMICONDUCTOR DEVICE HAVING GATE ISOLATION LAYERFebruary 2024August 2024Allow700NoNo
18432923METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEFebruary 2024December 2024Allow1001NoNo
18430414SEMICONDUCTOR MODULEFebruary 2024May 2024Allow300NoNo
18430609METHOD OF MANUFACTURING WIDE-BAND GAP SEMICONDUCTOR DEVICEFebruary 2024October 2024Allow800NoNo
18428533VERTICAL POWER DEVICES FABRICATED USING IMPLANTED METHODSJanuary 2024January 2025Allow1110NoNo
18423986EPITAXIAL OXIDE TRANSISTORJanuary 2024February 2025Allow1200NoNo
18424190SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEJanuary 2024August 2024Allow700NoNo
18419015SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STACKED DEVICESJanuary 2024November 2024Allow1001NoNo
18415549METHOD FOR FABRICATING A CHIP PACKAGEJanuary 2024March 2025Allow1410NoNo
18579130SEMICONDUCTOR ARRANGEMENT COMPRISING A SEMICONDUCTOR ELEMENT, A SUBSTRATE AND BOND CONNECTING MEANSJanuary 2024June 2024Allow500NoNo
18406460COVERS FOR SEMICONDUCTOR PACKAGE COMPONENTSJanuary 2024September 2024Allow800NoNo
18405875BOND PAD CONNECTION LAYOUTJanuary 2024November 2024Allow1110NoNo
18405099PASSIVATION LAYER FOR EPITAXIAL SEMICONDUCTOR PROCESSJanuary 2024March 2025Allow1511YesNo
18405053SEGMENTED SCHOTTKY DIODEJanuary 2024January 2025Allow1210YesNo
18402426SEMICONDUCTOR DEVICE ASSEMBLY WITH SACRIFICIAL PILLARS AND METHODS OF MANUFACTURING SACRIFICIAL PILLARSJanuary 2024August 2024Allow700NoNo
18398204INTEGRATED CIRCUIT STRUCTUREDecember 2023January 2025Allow1210YesNo
18396987ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT WITH DISABLE FEATURE BASED ON HOT-PLUG CONDITION DETECTIONDecember 2023February 2025Allow1410NoNo
18395785DISPLAY DEVICEDecember 2023April 2025Allow1520NoNo
18395649LAYOUT PATTERN FOR MAGNETORESISTIVE RANDOM ACCESS MEMORYDecember 2023August 2024Allow810NoNo
18395249SELF-PASSIVATED NITROGEN-POLAR III-NITRIDE TRANSISTORDecember 2023October 2024Allow1010NoNo
18391442ELECTRONIC DEVICES INCLUDING PILLARS IN ARRAY REGIONS AND NON-ARRAY REGIONSDecember 2023November 2024Allow1110NoNo
18389651SEMICONDUCTOR PACKAGE WITH NICKEL-SILVER PRE-PLATED LEADFRAMEDecember 2023July 2024Allow700NoNo
18545337Backside Gate Contact, Backside Gate Etch Stop Layer, and Methods of Forming SameDecember 2023June 2024Allow601NoNo
18544100INTERCONNECT STRUCTURE WITH LOW CAPACITANCE AND HIGH THERMAL CONDUCTIVITYDecember 2023April 2024Allow401NoNo
18543111INTEGRATED CIRCUIT DEVICES INCLUDING DISCHARGING PATH AND METHODS OF FORMING THE SAMEDecember 2023May 2024Allow501NoNo
18541441SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEDecember 2023August 2024Allow811NoNo
18535829DISPLAY APPARATUS HAVING A SUBSTRATE HOLEDecember 2023May 2025Allow1720NoNo
18532847Display DeviceDecember 2023April 2025Allow1611NoNo
18530988LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUSDecember 2023November 2024Allow1110NoNo
18528816LATERAL DIFFUSION METAL-OXIDE SEMICONDUCTOR DEVICEDecember 2023January 2025Allow1311NoNo
18528806LATERAL DIFFUSION METAL-OXIDE SEMICONDUCTOR DEVICEDecember 2023March 2025Allow1511NoNo
18529308SEMICONDUCTOR PACKAGE WITH WIRE BOND JOINTSDecember 2023September 2024Allow900NoNo
18564532CLAMPING ELEMENT AND METHOD FOR PRODUCING A POWER SEMICONDUCTOR DEVICENovember 2023June 2024Allow700NoNo
18519742DISPLAY APPARATUSNovember 2023August 2024Allow900NoNo
18518579SEMICONDUCTOR STRUCTURENovember 2023January 2025Allow1310NoNo
18517330BUFFER DESIGN FOR PACKAGE INTEGRATIONNovember 2023May 2025Allow1820NoNo
18516971SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAMENovember 2023July 2024Allow800NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2813.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
153
Examiner Affirmed
113
(73.9%)
Examiner Reversed
40
(26.1%)
Reversal Percentile
19.0%
Lower than average

What This Means

With a 26.1% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
572
Allowed After Appeal Filing
180
(31.5%)
Not Allowed After Appeal Filing
392
(68.5%)
Filing Benefit Percentile
42.6%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 31.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Art Unit 2813 - Prosecution Statistics Summary

Executive Summary

Art Unit 2813 is part of Group 2810 in Technology Center 2800. This art unit has examined 19,046 patent applications in our dataset, with an overall allowance rate of 84.3%. Applications typically reach final disposition in approximately 23 months.

Comparative Analysis

Art Unit 2813's allowance rate of 84.3% places it in the 77% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2813 receive an average of 1.48 office actions before reaching final disposition (in the 23% percentile). The median prosecution time is 23 months (in the 85% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.