USPTO Examiner CRAWFORD EASON LATANYA N - Art Unit 2813

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18922186BACK-GATE EFFECT CONTROL VIA DOPINGOctober 2024June 2025Allow710YesNo
18611723SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMarch 2024February 2025Allow1120NoNo
18602704LIGHT EMITTING DIODE STRUCTURE HAVING RESONANT CAVITY AND METHOD FOR MANUFACTURING THE SAMEMarch 2024April 2025Allow1310NoNo
18588986METHODS OF FORMING SEMICONDUCTOR PACKAGESFebruary 2024March 2025Allow1310NoNo
18415549METHOD FOR FABRICATING A CHIP PACKAGEJanuary 2024March 2025Allow1410NoNo
18535829DISPLAY APPARATUS HAVING A SUBSTRATE HOLEDecember 2023May 2025Allow1720NoNo
18493520DISPLAY APPARATUSOctober 2023June 2025Allow1930NoNo
18470443LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAMESeptember 2023August 2024Allow1110NoNo
18237014MAGNETIC DEVICEAugust 2023November 2024Allow1410NoNo
18355385MEMORY DEVICEJuly 2023March 2025Allow2020NoNo
18351797STACKED DIE ASSEMBLYJuly 2023September 2024Allow1410NoNo
18336592Semiconductor Packages and Methods of Forming the SameJune 2023November 2024Allow1710YesNo
18308914Semiconductor Device and Manufacturing Method of Semiconductor DeviceApril 2023April 2025Allow2430NoNo
18305509DISPLAY DEVICESApril 2023July 2024Allow1510YesNo
18132942LIGHT EMITTING DEVICE AND DISPLAY APPARATUS HAVING THE SAMEApril 2023July 2024Allow1520NoNo
18297928METHOD OF FORMING SEMICONDUCTOR DEVICE USING HIGH STRESS CLEAVE PLANEApril 2023August 2024Allow1610NoNo
18194766STACKED DIE ASSEMBLYApril 2023April 2025Allow2430YesNo
18186917DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAMEMarch 2023May 2024Allow1410NoNo
18094866CHEMICAL DIRECT PATTERN PLATING METHODJanuary 2023July 2024Allow1820NoNo
17978027SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFOctober 2022February 2024Allow1510NoNo
17966614INVERTEROctober 2022July 2023Allow900NoNo
17964935SOT MRAM STRUCTURE AND FABRICATING METHOD OF THE SAMEOctober 2022March 2025Allow2900NoNo
17902975METHOD OF FORMING AN ELECTRONIC DEVICE STRUCTURE HAVING AN ELECTRONIC COMPONENT WITH AN ON-EDGE ORIENTATION AND RELATED STRUCTURESSeptember 2022January 2025Allow2830NoNo
17901655LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOFSeptember 2022July 2023Allow1000NoNo
17885521MAGNETIC MEMORY AND MANUFACTURING METHOD THEREOFAugust 2022January 2025Allow2910NoNo
17867593Memory Device Having Electrically Floating Body TransistorJuly 2022January 2024Allow1810NoNo
17807016METHOD OF MANUFACTURING MAGNETIC RANDOM ACCESS MEMORY AND MAGNETIC RANDOM ACCESS MEMORYJune 2022March 2025Allow3310NoNo
17806100SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAMEJune 2022January 2024Allow1910NoNo
17756639METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY SUBSTRATE AND DISPLAY PANELMay 2022April 2025Allow3410NoNo
17756609METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN LAYER OF MONOCRYSTALLINE SIC ON AN SIC CARRIER SUBSTRATEMay 2022March 2025Allow3400NoNo
17746737METHOD FOR PREPARING SEMICONDUCTOR DEVICE STRUCTURE WITH FLUORINE-CATCHING LAYERMay 2022March 2025Allow3410NoNo
17743459SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMay 2022June 2025Allow3840NoNo
17743248Memory Cell Comprising First and Second Transistors and Methods of OperatingMay 2022December 2023Allow1910NoNo
17736329IGBT LIGHT LOAD EFFICIENCYMay 2022June 2023Allow1300NoNo
17723495SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEApril 2022April 2025Allow3640NoNo
17716054SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SAMEApril 2022October 2024Allow3000NoNo
17716112SEMICONDUCTOR DEVICE STRUCTURE WITH OVERLAY MARKApril 2022May 2025Allow3720NoNo
17656016DISPLAY DEVICE HAVING ULTRAVIOLET LIGHT BLOCKING PROPERTIESMarch 2022March 2024Allow2420NoNo
17698725SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUMMarch 2022February 2025Abandon3501NoNo
17695844SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFMarch 2022September 2024Allow3031NoNo
17688044RESISTIVE RANDOM-ACCESS MEMORY (RRAM) CELL WITH RECESSED BOTTOM ELECTRODE SIDEWALLSMarch 2022September 2023Allow1810YesNo
17677007CONTACT RESISTANCE REDUCTION IN NANOSHEET DEVICE STRUCTUREFebruary 2022December 2023Allow2130NoNo
17670781ENCAPSULATED CONSTRUCTURE FOR QUANTUM RESISTANCE STANDARDFebruary 2022May 2024Abandon2710NoNo
17668514MEMORY STRUCTURE AND FORMATION METHOD THEREOFFebruary 2022March 2024Allow2511NoNo
17592751CAPACITOR AND METHOD FOR FORMING THE SAMEFebruary 2022October 2024Allow3301NoNo
17590871SEMICONDUCTOR WAFER HAVING AN AUXILIARY STRUCTURE POSITIONED IN A SCRIBE LINE REGION, SEMICONDUCTOR CHIP AND METHOD OF FABRICATING A SEMICONDUCTOR WAFERFebruary 2022March 2024Allow2520NoNo
17586202SUBSTRATE PROCESSING APPARATUS, SUBSTRATE HOLDING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEJanuary 2022April 2025Allow3811NoNo
17578414METHOD OF MANUFACTURING NON-VOLATILE MEMORY DEVICEJanuary 2022March 2025Allow3820NoNo
17574569SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJanuary 2022May 2024Allow2820NoNo
17568984CONDUCTIVE FEATURES WITH AIR SPACER AND METHOD OF FORMING SAMEJanuary 2022November 2024Allow3421NoNo
17567309Semiconductor Device and MethodJanuary 2022May 2025Allow4140NoNo
17645749METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEDecember 2021June 2024Allow3020YesNo
17558699METHODS OF FABRICATING SEMICONDUCTOR DEVICESDecember 2021September 2024Allow3310NoNo
17550348METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH STRESS RELIEF STRUCTUREDecember 2021August 2023Allow2030NoNo
17528366SPIN-ORBIT TORQUE DEVICENovember 2021February 2024Allow2710NoNo
17525948ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICENovember 2021September 2023Allow2210NoNo
17522012SEMICONDUCTOR DEVICE WITH CMOS PROCESS BASED HALL SENSOR AND MANUFACTURING METHODNovember 2021April 2024Allow2910NoNo
17453557WAFER MANUFACTURING METHOD AND LAMINATED DEVICE CHIP MANUFACTURING METHODNovember 2021February 2025Allow4020YesNo
17518571SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMENovember 2021January 2024Allow2620NoNo
17500971SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEOctober 2021January 2024Allow2720NoNo
17449607MANUFACTURING METHOD OF DISPLAY SUBSTRATE, DISPLAY SUBSTRATE AND DISPLAY DEVICESeptember 2021April 2024Allow3120NoNo
17488664ARTIFICIAL ANTIFERROMAGNETIC STRUCTURE AND STORAGE ELEMENTSeptember 2021September 2024Abandon3620NoNo
17464601METHOD FOR MANUFACTURING A CONDUCTIVE BRIDGING MEMORY DEVICESeptember 2021February 2025Allow4220NoNo
17458557METHOD FOR FABRICATING A CHIP PACKAGEAugust 2021October 2023Allow2510YesNo
17445858SEMICONDUCTOR DIE WITH SENSOR SECTION LOCATED AT THE EDGEAugust 2021June 2025Allow4630YesNo
17408471SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAMEAugust 2021April 2024Allow3211NoNo
17397975MANUFACTURING METHOD OF INTEGRATED SUBSTRATEAugust 2021April 2024Allow3200NoNo
17388398BONDING METHOD OF MICRO-LIGHT EMITTING DIODE CHIPJuly 2021January 2025Allow4220NoNo
17386187SPIN-ORBIT TORQUE STRUCTURE INCLUDING TOPOLOGICAL MATERIALS AND MAGNETIC MEMORY DEVICE INCLUDING THE SPIN-ORBIT TORQUE STRUCTUREJuly 2021September 2024Allow3830YesNo
17382080THIN FILM TRANSISTOR WITH SMALL STORAGE CAPACITOR WITH METAL OXIDE SWITCHJuly 2021December 2023Allow2920YesNo
17381721FLEXIBLE DISPLAY APPARATUSJuly 2021June 2024Allow3440NoNo
17379365Semiconductor Package and MethodJuly 2021November 2023Allow2820NoNo
17376623SEMICONDUCTOR ON INSULATOR HAVING A SEMICONDUCTOR LAYER WITH DIFFERENT THICKNESSESJuly 2021August 2024Allow3721NoNo
17370427SYSTEMS FOR THERMALLY TREATING CONDUCTIVE ELEMENTS ON SEMICONDUCTOR AND WAFER STRUCTURESJuly 2021November 2023Allow2830NoNo
17369484SEMICONDUCTOR DEVICE and MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEJuly 2021January 2023Allow1910NoNo
17362794OXYGEN CONTROLLED PVD ALN BUFFER FOR GAN-BASED OPTOELECTRONIC AND ELECTRONIC DEVICESJune 2021October 2022Allow1510NoNo
17355146MEMORY DEVICEJune 2021May 2023Allow2320NoNo
17352910DISPLAY DEVICEJune 2021February 2024Allow3220NoNo
173510813D IC DECOUPLING CAPACITOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAMEJune 2021October 2023Allow2820NoNo
17333660SEMICONDUCTOR DEVICE AND A METHOD OF FABRICATING THE SAMEMay 2021March 2024Allow3440YesNo
17296896SPIN-ORBIT TORQUE MAGNETIZATION ROTATIONAL ELEMENT, SPIN-ORBIT TORQUE MAGNETORESISTANCE EFFECT ELEMENT, MAGNETIC MEMORY, AND RESERVOIR ELEMENTMay 2021September 2023Allow2710NoNo
17295529HALL INTEGRATED CIRCUIT AND CORRESPONDING METHOD OF MANUFACTURING OF A HALL INTEGRATED CIRCUIT USING WAFER STACKINGMay 2021March 2024Allow3410NoNo
17322845LIGHT-EMITTING APPARATUS AND MANUFACTURING METHOD THEREOFMay 2021February 2023Allow2110NoNo
17306784CHEMICAL DIRECT PATTERN PLATING METHODMay 2021September 2022Allow1610NoNo
17224745TRANSPARENT MICRO DISPLAY DEVICEApril 2021March 2025Allow4741NoNo
17225064CHIP TRANSFERRING METHOD AND LED CHIP STRUCTUREApril 2021October 2022Allow1810NoNo
17222041SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAMEApril 2021February 2023Allow2210NoNo
17221824SILICON-ON-INSULATOR WAFER AND LOW TEMPERATURE METHOD TO MAKE THEREOFApril 2021August 2022Allow1610NoNo
17217298Light Emitting Device, Method for Making the Same and Display ApparatusMarch 2021September 2022Allow1810NoNo
17209658LIGHT EMITTING DIODE STRUCTURE HAVING RESONANT CAVITY AND METHOD FOR MANUFACTURING THE SAMEMarch 2021January 2024Allow3411NoNo
17208285LIGHT-EMITTING DIODE GRAIN STRUCTURE WITH MULTIPLE CONTACT POINTSMarch 2021October 2022Allow1810NoNo
17207687MEMORY DEVICE HAVING ELECTRICALLY FLOATING BODY TRANSISTORMarch 2021April 2022Allow1300YesNo
17203402SEMICONDUCTOR DEVICE AND SEMICONDUCTOR COMPONENT INCLUDING THE SAMEMarch 2021June 2024Allow3930NoNo
17192296MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORYMarch 2021August 2023Allow2930NoNo
17188783DISPLAY DEVICEMarch 2021December 2023Allow3330NoNo
17179084MAGNETO RESISTIVE MEMORY DEVICEFebruary 2021April 2022Allow1400NoNo
17269173SPIN-ORBIT TORQUE MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORYFebruary 2021January 2023Allow2220NoNo
17175357METHOD OF FORMING SEMICONDUCTOR DEVICE USING RANGE COMPENSATING MATERIALFebruary 2021November 2022Allow2210YesNo
17172663SEMICONDUCTOR STACK FOR HALL EFFECT DEVICEFebruary 2021August 2022Allow1810NoNo
17171623MAGNETIC DEVICEFebruary 2021June 2023Allow2830YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner CRAWFORD EASON, LATANYA N.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
1
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
9.9%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
8
Allowed After Appeal Filing
1
(12.5%)
Not Allowed After Appeal Filing
7
(87.5%)
Filing Benefit Percentile
13.0%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 12.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the bottom 25% across the USPTO, indicating that filing appeals is less effective here than in most other areas.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner CRAWFORD EASON, LATANYA N - Prosecution Strategy Guide

Executive Summary

Examiner CRAWFORD EASON, LATANYA N works in Art Unit 2813 and has examined 892 patent applications in our dataset. With an allowance rate of 79.8%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 29 months.

Allowance Patterns

Examiner CRAWFORD EASON, LATANYA N's allowance rate of 79.8% places them in the 42% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.

Office Action Patterns

On average, applications examined by CRAWFORD EASON, LATANYA N receive 2.18 office actions before reaching final disposition. This places the examiner in the 74% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by CRAWFORD EASON, LATANYA N is 29 months. This places the examiner in the 47% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -1.9% benefit to allowance rate for applications examined by CRAWFORD EASON, LATANYA N. This interview benefit is in the 6% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 28.9% of applications are subsequently allowed. This success rate is in the 44% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 44.6% of cases where such amendments are filed. This entry rate is in the 62% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 0.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 12% percentile among all examiners. Note: Pre-appeal conferences show limited success with this examiner compared to others. While still worth considering, be prepared to proceed with a full appeal brief if the PAC does not result in favorable action.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 75.0% of appeals filed. This is in the 61% percentile among all examiners. Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 57.4% are granted (fully or in part). This grant rate is in the 74% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 3.4% of allowed cases (in the 84% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 2.5% of allowed cases (in the 68% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.