USPTO Examiner NICELY JOSEPH C - Art Unit 2813

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18632506STRUCTURES FOR A LATERALLY-DIFFUSED METAL-OXIDE-SEMICONDUCTOR TRANSISTORApril 2024August 2024Allow501NoNo
18628275Laser Edge Shaping for Semiconductor WafersApril 2024November 2024Allow710NoNo
18615615MULTI-CHANNEL TRANSISTORMarch 2024September 2024Allow601NoNo
18608957SEMICONDUCTOR STRUCTUREMarch 2024February 2025Allow1110NoNo
18592553SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMarch 2024November 2024Allow910NoNo
18395785DISPLAY DEVICEDecember 2023April 2025Allow1520NoNo
18545337Backside Gate Contact, Backside Gate Etch Stop Layer, and Methods of Forming SameDecember 2023June 2024Allow601NoNo
18517458Contacts for Semiconductor Devices and Methods of Forming the SameNovember 2023October 2024Allow1010NoNo
18389057DISPLAY APPARATUS INCLUDING TRANSMISSIVE LIGHT SOURCENovember 2023October 2024Allow1110NoNo
18502109SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMENovember 2023April 2025Allow1840YesNo
18490866SEMICONDUCTOR DOPED REGION WITH BIASED ISOLATED MEMBERSOctober 2023September 2024Allow1110YesNo
18487505TRANSISTOR DEVICE HAVING A FIELD PLATEOctober 2023May 2024Allow700NoNo
18467482METHODS FOR FORMING SEMICONDUCTOR STRUCTURESSeptember 2023July 2024Allow1010NoNo
18447783LDMOS WITH ENHANCED SAFE OPERATING AREA AND METHOD OF MANUFACTUREAugust 2023October 2024Allow1410NoNo
18446113Semiconductor Structures And Methods Of Forming The SameAugust 2023April 2024Allow900NoNo
18360508Structure and Method for Semiconductor DevicesJuly 2023May 2025Allow2210YesNo
18355549THICKER CORNER OF A GATE DIELECTRIC STRUCTURE AROUND A RECESSED GATE ELECTRODE FOR AN MV DEVICEJuly 2023August 2024Allow1310NoNo
18351149SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2023August 2024Allow1310YesNo
18348334MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTUREJuly 2023February 2024Allow700NoNo
18217719METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH CONTACT STRUCTUREJuly 2023January 2024Allow700NoNo
18338815LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE USING THE SAMEJune 2023January 2025Allow1910NoNo
18139862BRIDGE INTERCONNECTION WITH LAYERED INTERCONNECT STRUCTURESApril 2023June 2024Allow1410NoNo
18138528SEMICONDUCTOR DEVICE INCLUDING BACK SIDE POWER SUPPLY CIRCUITApril 2023March 2024Allow1100NoNo
18137257FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEApril 2023October 2023Allow600NoNo
18298230SEMICONDUCTOR DEVICES HAVING BURIED GATESApril 2023June 2024Allow1411YesNo
18129961Gate Stack Treatment For Ferroelectric TransistorsApril 2023November 2023Allow800NoNo
18130201P-TYPE DIPOLE FOR P-FETApril 2023March 2024Allow1210YesNo
18125958METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGEMarch 2023June 2025Allow2700NoNo
18167776CRYSTALLINE SEMICONDUCTOR LAYER FORMED IN BEOL PROCESSESFebruary 2023March 2024Allow1310YesNo
18102831TRANSISTOR DEVICE HAVING A CELL FIELD AND METHOD OF FABRICATING A GATE OF THE TRANSISTOR DEVICEJanuary 2023October 2024Allow2020NoNo
18101712SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SAMEJanuary 2023April 2024Allow1501NoNo
18155887SILICIDE-SANDWICHED SOURCE/DRAIN REGION AND METHOD OF FABRICATING SAMEJanuary 2023October 2023Allow900NoNo
18155394INTEGRATION OF A SCHOTTKY DIODE WITH A MOSFETJanuary 2023January 2024Allow1210NoNo
18152087METHODS FOR IMPROVEMENT OF PHOTORESIST PATTERNING PROFILEJanuary 2023May 2024Allow1611NoNo
18091091DISPLAY DEVICEDecember 2022October 2023Allow910NoNo
18069367HIGH ELECTRON MOBILITY TRANSISTOR AND HIGH ELECTRON MOBILITY TRANSISTOR FORMING METHODDecember 2022August 2023Allow811YesNo
18081373SEMICONDUCTOR DEVICEDecember 2022January 2024Allow1320NoNo
17925806SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREOFNovember 2022May 2023Allow600NoNo
17985315TRANSISTOR DEVICE HAVING A FIELD PLATE IN AN ELONGATE ACTIVE TRENCHNovember 2022July 2023Allow800NoNo
17970601SEMICONDUCTOR DEVICEOctober 2022July 2023Allow900NoNo
17967904SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEOctober 2022December 2023Allow1410NoNo
17938378FLEXIBLE TRANSISTORS WITH NEAR-JUNCTION HEAT DISSIPATIONOctober 2022January 2024Allow1610NoNo
17934913SEMICONDUCTOR BACKSIDE TRANSISTOR INTEGRATION WITH BACKSIDE POWER DELIVERY NETWORKSeptember 2022March 2025Allow3000NoNo
17947164SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAMESeptember 2022March 2025Allow3000NoNo
17942562SEMICONDUCTOR DEVICESeptember 2022March 2025Allow3000NoNo
17899704SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEAugust 2022May 2025Allow3301NoNo
17898816STORAGE DEVICE, STORAGE SYSTEM, AND OPERATION METHOD OF STORAGE DEVICEAugust 2022June 2025Allow3301NoNo
17894226SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTUREAugust 2022May 2025Allow3320NoNo
17819971Split-Gate Trench MOSFETAugust 2022July 2023Allow1110NoNo
17887703UNIFORM IMPLANT REGIONS IN A SEMICONDUCTOR RIDGE OF A FINFETAugust 2022June 2024Allow2211NoNo
17885159LDMOS WITH ENHANCED SAFE OPERATING AREA AND METHOD OF MANUFACTUREAugust 2022April 2023Allow900YesNo
17874772Fin Field-Effect Transistor and Method of Forming The SameJuly 2022January 2023Allow600NoNo
17874565SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJuly 2022November 2023Allow1611YesNo
17874471THICKER CORNER OF A GATE DIELECTRIC STRUCTURE AROUND A RECESSED GATE ELECTRODE FOR AN MV DEVICEJuly 2022June 2023Allow1110NoNo
17814325Contacts for Semiconductor Devices and Methods of Forming the SameJuly 2022August 2023Allow1310YesNo
17869337Semiconductor Device with Air Gaps and Method of Fabrication ThereofJuly 2022July 2023Allow1200NoNo
17813860METHOD FOR MANUFACTURING A SOI OR SIGEOI TYPE SEMICONDUCTOR-ON-INSULATOR SUBSTRATE BY BESOI AND STRUCTURE FOR MANUFACTURING SUCH A SUBSTRATEJuly 2022May 2025Allow3411NoNo
17863069GALLIUM NITRIDE-BASED DEVICES AND METHODS OF TESTING THEREOFJuly 2022June 2025Allow3601YesNo
17852393SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJune 2022August 2023Allow1400NoNo
17851046ELECTRONIC APPARATUSJune 2022July 2023Allow1300NoNo
17851047ELECTROMAGNETIC WAVE ADJUSTMENT APPARATUSJune 2022February 2024Allow2000NoNo
17848984FIELD EFFECT TRANSISTOR WITH STACKED UNIT SUBCELL STRUCTUREJune 2022May 2025Allow3410YesNo
17840524GREYSCALE LITHOGRAPHY TECHNIQUES FOR MANUFACTURING FIELD PLATESJune 2022May 2025Allow3511YesNo
17834013FIELD EFFECT TRANSISTOR WITH MULTIPLE STEPPED FIELD PLATEJune 2022December 2024Allow3000YesNo
17804159WAFER PROCESSING METHODMay 2022March 2025Allow3410YesNo
17745639METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH MEMORY CELLS, HIGH VOLTAGE DEVICES AND LOGIC DEVICES ON A SUBSTRATE USING A DUMMY AREAMay 2022September 2024Allow2900NoNo
17744238THREE DIMENSIONAL DEVICE FORMATION USING EARLY REMOVAL OF SACRIFICIAL HETEROSTRUCTURE LAYERMay 2022October 2024Allow2900NoNo
17735800Oblique Deposition and Etch ProcessesMay 2022January 2025Allow3201NoNo
17734634CONTROLLING POSITIVE FEEDBACK IN FILAMENTARY RRAM STRUCTURESMay 2022August 2023Allow1510NoNo
17708316VERTICAL SEMICONDUCTOR DEVICESMarch 2022December 2022Allow900NoNo
17706715METHODS FOR MEASURING A MAGNETIC CORE LAYER PROFILE IN AN INTEGRATED CIRCUITMarch 2022April 2025Allow3611NoNo
17764256ARRAY SUBSTRATE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOFMarch 2022January 2025Allow3410NoNo
17702015SEMICONDUCTOR DEVICEMarch 2022April 2025Allow3620YesNo
17683384SEMICONDUCTOR DEVICEMarch 2022January 2023Allow1000NoNo
17682868CAPACITOR EMBEDDED 3D RESONATOR FOR BROADBAND FILTERFebruary 2022June 2025Allow3910NoNo
17678040ELECTRONIC APPARATUS AND MANUFACTURING METHOD THEREOFFebruary 2022March 2024Allow2411NoNo
17650854SYMMETRIC ARRANGEMENT OF FIELD PLATES IN SEMICONDUCTOR DEVICESFebruary 2022December 2022Allow1000NoNo
17668992P-Type Dipole For P-FETFebruary 2022March 2023Allow1310YesNo
17667704SEQUENTIAL PLASMA AND THERMAL TREATMENTFebruary 2022September 2024Allow3100YesNo
17666386SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFFebruary 2022April 2023Allow1410NoNo
17649837PHOTOVOLTAIC CELLFebruary 2022August 2024Allow3100NoNo
17590409Structure and Method for Semiconductor DevicesFebruary 2022March 2023Allow1410NoNo
17583754METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJanuary 2022November 2024Allow3411YesNo
17629648METHOD FOR TREATING A STACK OBTAINED DURING THE MANUFACTURE OF A HETEROJUNCTION PHOTOVOLTAIC CELLJanuary 2022October 2024Allow3310NoNo
17581966FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND TEST METHOD OF SEMICONDUCTOR DEVICEJanuary 2022July 2024Allow3000NoNo
17647654MANUFACTURING METHOD AND MEASUREMENT METHOD OF SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR STRUCTUREJanuary 2022August 2024Allow3110NoNo
17571216Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory CellsJanuary 2022June 2024Allow2900NoNo
17622470MODIFICATION OF STRESS RESPONSE AND ADHESION BEHAVIOR OF DIELECTRIC THROUGH TUNING OF MECHANICAL PROPERTIESDecember 2021November 2024Allow3520YesNo
17622021MANUFACTURING METHOD OF SEMICONDUCTOR POWER DEVICEDecember 2021February 2024Allow2600NoNo
17553477SPLIT-GATE TRENCH MOS TRANSISTOR WITH SELF-ALIGNMENT OF GATE AND BODY REGIONSDecember 2021May 2025Allow4131YesNo
17457908SEMICONDUCTOR DEVICEDecember 2021February 2024Allow2700NoNo
17542610TRENCH-TYPE MOSFET AND METHOD FOR MANUFACTURING THE SAMEDecember 2021August 2024Allow3310NoNo
17541845SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SAMEDecember 2021April 2024Allow2810NoNo
17541817METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEDecember 2021November 2023Allow2410NoNo
17541745METHOD FOR MANUFACTURING A FUSE COMPONENTDecember 2021March 2024Allow2810NoNo
17455691SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFNovember 2021October 2024Allow3511NoNo
17527936SEMICONDUCTOR DEVICE CONTACT AND METHOD OF MAKING SAMENovember 2021July 2024Allow3211YesNo
17452788SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOFOctober 2021August 2024Allow3311NoNo
17514947SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEOctober 2021March 2024Allow2820YesNo
17511646THIN FILM TRANSISTOR BASED MEMORY CELLS ON BOTH SIDES OF A LAYER OF LOGIC DEVICESOctober 2021February 2023Allow1610YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner NICELY, JOSEPH C.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
5
Examiner Affirmed
5
(100.0%)
Examiner Reversed
0
(0.0%)
Reversal Percentile
9.9%
Lower than average

What This Means

With a 0.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is in the bottom 25% across the USPTO, indicating that appeals face significant challenges here.

Strategic Value of Filing an Appeal

Total Appeal Filings
22
Allowed After Appeal Filing
5
(22.7%)
Not Allowed After Appeal Filing
17
(77.3%)
Filing Benefit Percentile
27.3%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 22.7% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner NICELY, JOSEPH C - Prosecution Strategy Guide

Executive Summary

Examiner NICELY, JOSEPH C works in Art Unit 2813 and has examined 1,013 patent applications in our dataset. With an allowance rate of 84.0%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 21 months.

Allowance Patterns

Examiner NICELY, JOSEPH C's allowance rate of 84.0% places them in the 53% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by NICELY, JOSEPH C receive 1.33 office actions before reaching final disposition. This places the examiner in the 27% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by NICELY, JOSEPH C is 21 months. This places the examiner in the 85% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +15.7% benefit to allowance rate for applications examined by NICELY, JOSEPH C. This interview benefit is in the 60% percentile among all examiners. Recommendation: Interviews provide an above-average benefit with this examiner and are worth considering.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 23.4% of applications are subsequently allowed. This success rate is in the 23% percentile among all examiners. Strategic Insight: RCEs show lower effectiveness with this examiner compared to others. Consider whether a continuation application might be more strategic, especially if you need to add new matter or significantly broaden claims.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 47.3% of cases where such amendments are filed. This entry rate is in the 66% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 36.4% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 33% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 68.8% of appeals filed. This is in the 49% percentile among all examiners. Of these withdrawals, 63.6% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 32.6% are granted (fully or in part). This grant rate is in the 25% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 3.5% of allowed cases (in the 85% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.9% of allowed cases (in the 56% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.