USPTO Art Unit 2183 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19017416Translating Between CXL.mem and CXL.cache Read TransactionsJanuary 2025March 2025Allow200NoNo
19002787Illegal Address Mask Method and Device for Cores of DSPDecember 2024March 2025Allow200NoNo
18896789IMPROVING COMPUTING EFFICIENCY OF A PROCESSOR BY OPTIMIZING A COMPUTATIONAL SIZE OF EACH COMPUTING CORE IN THE PROCESSORSeptember 2024March 2025Allow610NoNo
18772354MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICEJuly 2024February 2025Allow700NoNo
18725085DATA PROCESSING METHOD AND APPARATUS, ELECTRONIC DEVICE, AND READABLE STORAGE MEDIUMJune 2024January 2025Allow700YesNo
18739272TWO-LEVEL ARBITRATION IN A COMPUTING SYSTEMJune 2024April 2025Allow1110NoNo
18680970SYSTEM DECODER FOR TRAINING ACCELERATORSMay 2024April 2025Allow1010NoNo
18672917METHODS AND SYSTEMS TO MONITOR A MEDIA DEVICE VIA A USB PORTMay 2024August 2024Allow300NoNo
18670721PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO ATOMICALLY STORE TO MEMORY DATA WIDER THAN A NATIVELY SUPPORTED DATA WIDTHMay 2024June 2025Allow1310NoNo
18647891PROCESSING PIPELINE WITH ZERO LOOP OVERHEADApril 2024June 2025Allow1410YesNo
18632143DEVICE AND METHODS FOR COMMUNICATION BETWEEN ELECTRONIC COMPONENTSApril 2024June 2025Allow1500NoNo
18626689SYSTEM AND METHOD TO ACCELERATE REDUCE OPERATIONS IN GRAPHICS PROCESSORApril 2024May 2025Allow1310NoNo
18625903INLINE DATA INSPECTION FOR WORKLOAD SIMPLIFICATIONApril 2024April 2025Allow1300NoNo
18621539UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYSMarch 2024May 2025Allow1310NoNo
18618648SUPPORTING 8-BIT FLOATING POINT FORMAT OPERANDS IN A COMPUTING ARCHITECTUREMarch 2024October 2024Allow700NoNo
18613319METHOD FOR CONTROL FLOW ISOLATION WITH PROTECTION KEYS AND INDIRECT BRANCH TRACKINGMarch 2024June 2025Allow1510NoNo
18607703STREAM DATA UNIT WITH MULTIPLE HEAD REGISTERSMarch 2024December 2024Allow900NoNo
18602924NEURAL PROCESSING DEVICE, PROCESSING ELEMENT INCLUDED THEREIN AND METHOD FOR OPERATING VARIOUS FORMATS OF NEURAL PROCESSING DEVICEMarch 2024November 2024Allow810NoNo
18601598TECHNOLOGY FOR CONTROLLING PEAK POWER BY DIVIDING CLOCKMarch 2024July 2024Allow410NoNo
18601640Atomic Operation Predictor to Predict Whether An Atomic Operation Will Complete SuccessfullyMarch 2024October 2024Allow700NoNo
18598722COMBINING READ REQUESTS HAVING SPATIAL LOCALITYMarch 2024May 2025Allow1400NoNo
18594091STREAMING ENGINE WITH VARIABLE STREAM TEMPLATE FORMATMarch 2024May 2025Allow1410NoNo
18594461VECTOR SIMD VLIW DATA PATH ARCHITECTUREMarch 2024June 2025Allow1610NoNo
18588277SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAMEFebruary 2024May 2025Allow1500NoNo
18586186Instruction Fetch Using a Sequential Prediction CircuitFebruary 2024June 2025Allow1610YesNo
18581552INSERTING PREDEFINED PAD VALUES INTO A STREAM OF VECTORSFebruary 2024September 2024Allow700NoNo
18581273OVERLAY CODE RETRIEVAL FROM A HOST SYSTEMFebruary 2024May 2025Allow1500NoNo
18427411CONDITIONAL BRANCH INSTRUCTIONSJanuary 2024April 2025Allow1400NoNo
18426237LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC USING FLOW CONTROLLERS FOR RESPECTIVE SYNCHRONOUS FLOWSJanuary 2024March 2025Allow1310NoNo
18423210Load/Store Unit for a Tensor Engine and Methods for Loading or Storing a TensorJanuary 2024September 2024Allow800NoNo
18423203SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STOREJanuary 2024April 2025Allow1500NoNo
18421650Method for Operating a Field Device of Process Measurement Technology and Filling System with which the Method is Carried OutJanuary 2024May 2025Allow1600NoNo
18420431Interface Bus CombiningJanuary 2024April 2025Allow1510NoNo
18415523NEURAL PROCESSOR AND METHOD FOR FETCHING INSTRUCTIONS THEREOFJanuary 2024May 2025Allow1610NoNo
18414164DUAL VECTOR ARITHMETIC LOGIC UNITJanuary 2024January 2025Allow1210NoNo
18412504Branch Prediction Using loop Iteration CountJanuary 2024April 2025Allow1510YesNo
18404794INTERCONNECTS FOR PHYSICALLY UNCLONABLE FUNCTION AND METHOD OF ACHIEVING PHYSICALLY UNCLONABLE FUNCTION THROUGH INTERCONNECTSJanuary 2024April 2025Allow1500NoNo
18400560WORKFLOW EXECUTION STATE VARIABLESDecember 2023April 2025Allow1520NoNo
18399578INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECISION INPUT OPERANDSDecember 2023January 2025Allow1210NoNo
18393825CONTROL OF INSTRUCTION ISSUE BASED ON ISSUE GROUPSDecember 2023January 2025Allow1300NoNo
18393657PROCESSOR-GUIDED EXECUTION OF OFFLOADED INSTRUCTIONS USING FIXED FUNCTION OPERATIONSDecember 2023July 2024Allow700NoNo
18389984PROCESSOR INSTRUCTION DISPATCH CONFIGURATIONDecember 2023August 2024Allow800NoNo
18545115TIMING CONTROLLER AND DISPLAY DEVICE INCLUDING THE SAMEDecember 2023June 2025Allow1800NoNo
18544901REDUCED POWER CONSUMPTION PREDICTION USING PREDICTION TABLESDecember 2023March 2025Allow1500YesNo
18534012SYSTEMS, METHODS, AND APPARATUS FOR TILE CONFIGURATIONDecember 2023December 2024Allow1200NoNo
18534411DYNAMIC PROCESSOR ARCHITECTUREDecember 2023May 2024Allow501NoNo
18532245ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAYDecember 2023September 2024Allow900YesNo
18532502APPARATUS AND METHODS RELATED TO MICROCODE INSTRUCTIONS INDICATING INSTRUCTION TYPESDecember 2023February 2025Allow1410NoNo
18567905INSTRUCTION EXECUTION METHOD, PROCESSOR AND ELECTRONIC APPARATUSDecember 2023June 2025Allow1810NoNo
18530673COORDINATE ROTATION DIGITAL COMPUTER USING DIRECT MEMORY ACCESS ENGINESDecember 2023March 2025Allow1500NoNo
18528340INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERATIONS FOR MACHINE LEARNINGDecember 2023October 2024Allow1010NoNo
18524149Stateful Vector Group Permutation with Storage ReuseNovember 2023May 2025Allow1800NoNo
18524942EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULTIPLE CONFIGURABLE PROCESSING ELEMENTS USING MULTIPLE SPOKE COUNTSNovember 2023January 2025Allow1310NoNo
18525462Providing Access to a Single-Ported Storage DeviceNovember 2023January 2025Allow1410YesNo
18523632MULTI-MODE ARCHITECTURE FOR UNIFYING MATRIX MULTIPLICATION, 1X1 CONVOLUTION AND 3X3 CONVOLUTIONNovember 2023February 2024Allow200YesNo
18522822PROCESSOR FOR CONFIGURABLE PARALLEL COMPUTATIONSNovember 2023February 2025Allow1400NoNo
18522614METHODS AND SYSTEMS FOR DATA TRANSMISSIONNovember 2023August 2024Allow900NoNo
18521373MEMORY COMMANDS FOR MULTI-HOST COMMUNICATIONSNovember 2023June 2025Allow1910YesNo
18519210PROCESSING CORE INCLUDING INTEGRATED HIGH CAPACITY HIGH BANDWIDTH STORAGE MEMORYNovember 2023June 2025Allow1810NoNo
18515091SYSTEM ON CHIP HAVING SEMAPHORE FUNCTION AND METHOD FOR IMPLEMENTING SEMAPHORE FUNCTIONNovember 2023June 2024Allow700NoNo
18512210COMMUNICATION INTERFACE CONTROLLER WITH OUTPUT MONITORINGNovember 2023January 2025Allow1400NoNo
18507222NESTED LOOP CONTROLNovember 2023August 2024Allow900NoNo
18388797TECHNIQUES FOR DECOUPLED ACCESS-EXECUTE NEAR-MEMORY PROCESSINGNovember 2023April 2025Allow1710NoNo
18502291SYSTEMS AND METHODS OF INSTRUCTIONS TO ACCELERATE MULTIPLICATION OF SPARSE MATRICES USING BITMASKS THAT IDENTIFY NON-ZERO ELEMENTSNovember 2023January 2025Allow1410NoNo
18499750MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORYNovember 2023December 2024Allow1310YesNo
18384714METHODS AND APPARATUS FOR DEEP LEARNING NETWORK EXECUTION PIPELINE ON MULTI-PROCESSOR PLATFORMOctober 2023October 2024Allow1110YesNo
18495645PROCESSOR AND METHOD FOR ASSIGNING CONFIG ID FOR CORE INCLUDED IN THE SAMEOctober 2023March 2024Allow510NoNo
18383311METHOD OF NOTIFYING A PROCESS OR PROGRAMMABLE ATOMIC OPERATION TRAPSOctober 2023January 2025Allow1510NoNo
18382938HIERARCHICAL NETWORKS ON CHIP (NOC) FOR NEURAL NETWORK ACCELERATOROctober 2023January 2025Allow1410NoNo
18490640MECHANISM FOR INSTRUCTION FUSIONOctober 2023April 2025Allow1800NoNo
18489993SYSTEMS AND METHODS FOR DESKTOP BUS (D-BUS) CACHINGOctober 2023June 2025Allow2010NoNo
18287193ACCELERATOR CONTROL SYSTEM, ACCELERATOR CONTROL METHOD AND ACCELERATOR CONTROL PROGRAMOctober 2023June 2025Allow2010NoNo
18555473MESSAGE BASED PROCESSOR WITH TRANSMISSION DISABLING MODEOctober 2023July 2024Allow1010NoNo
18486254METHODS AND SYSTEMS FOR PROCESSING REQUESTS USING LOAD-DEPENDENT THROTTLINGOctober 2023October 2024Allow1210NoNo
18484582Hardware Verification of Dynamically Generated CodeOctober 2023January 2025Allow1510NoNo
18483026INSTRUCTION FORMAT AND INSTRUCTION SET ARCHITECTURE FOR TENSOR STREAMING PROCESSOROctober 2023December 2024Allow1400NoNo
18377804Execution or Write Mask Generation for Data Selection in a Multi-Threaded, Self-Scheduling Reconfigurable Computing FabricOctober 2023July 2024Allow900NoNo
18376494General-Purpose Systolic ArrayOctober 2023December 2024Allow1510YesNo
18479165HISTOGRAM OPERATIONOctober 2023October 2024Allow1220NoNo
18477657LOOK-UP TABLE READSeptember 2023March 2025Allow1820YesNo
18477457NEURAL PROCESSOR AND METHOD FOR FETCHING INSTRUCTIONS THEREOFSeptember 2023December 2023Allow200NoNo
18373682APPARATUS FOR ACCELERATING NEURAL NETWORKSSeptember 2023April 2025Allow1910NoNo
18473088INSTRUCTION AND LOGIC FOR TRACKING FETCH PERFORMANCE BOTTLENECKSSeptember 2023October 2024Allow1300NoNo
18473119EXECUTION UNIT SHARING BETWEEN PROCESSING CORES IN A CLUSTER OF A SYSTEM-ON-CHIP (SOC)September 2023December 2024Allow1500NoNo
18469008Vector Instruction Cracking After Scalar DispatchSeptember 2023March 2025Allow1800NoNo
18468642LOCK-FREE UNORDERED IN-PLACE COMPACTIONSeptember 2023February 2025Allow1700NoNo
18369082FREQUENCY SCALING FOR PER-CORE ACCELERATOR ASSIGNMENTSSeptember 2023November 2024Allow1410NoNo
18465189INSTRUCTION SIMULATION DEVICE AND METHOD THEREOFSeptember 2023February 2025Allow1710NoNo
18463961CONTROL SYSTEM AND METHOD OF MACHINE AND HOST COMPUTERSeptember 2023June 2025Allow2210NoNo
18243994INTELLIGENT GRAPH EXECUTION AND ORCHESTRATION ENGINE FOR A RECONFIGURABLE DATA PROCESSORSeptember 2023June 2025Allow2210YesNo
18462742STORAGE OF PREDICTION-RELATED DATASeptember 2023April 2025Allow1900NoNo
18463256VECTOR PROCESSOR STORAGESeptember 2023November 2024Allow1510NoNo
18461643METHODS AND SYSTEMS TO MONITOR A MEDIA DEVICE VIA A USB PORTSeptember 2023October 2024Allow1310YesNo
18460772TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EXECUTIONSeptember 2023August 2024Allow1100NoNo
18242034MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICESeptember 2023May 2024Allow800NoNo
18279664Processor and Method for Executing an Instruction with a ProcessorAugust 2023April 2025Allow2010NoNo
18459311SCALABLE I/O VIRTUALIZATION INTERRUPT AND SCHEDULINGAugust 2023September 2024Allow1210NoNo
18459241NEURAL PROCESSING DEVICE, PROCESSING ELEMENT INCLUDED THEREIN AND METHOD FOR OPERATING VARIOUS FORMATS OF NEURAL PROCESSING DEVICEAugust 2023February 2024Allow610NoNo
18240287INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMSAugust 2023September 2024Allow1210NoNo
18239106VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOFAugust 2023April 2024Allow800NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2183.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
260
Examiner Affirmed
175
(67.3%)
Examiner Reversed
85
(32.7%)
Reversal Percentile
51.4%
Higher than average

What This Means

With a 32.7% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
745
Allowed After Appeal Filing
267
(35.8%)
Not Allowed After Appeal Filing
478
(64.2%)
Filing Benefit Percentile
65.4%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 35.8% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2183 - Prosecution Statistics Summary

Executive Summary

Art Unit 2183 is part of Group 2180 in Technology Center 2100. This art unit has examined 9,598 patent applications in our dataset, with an overall allowance rate of 78.4%. Applications typically reach final disposition in approximately 35 months.

Comparative Analysis

Art Unit 2183's allowance rate of 78.4% places it in the 52% percentile among all USPTO art units. This art unit has an above-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2183 receive an average of 2.07 office actions before reaching final disposition (in the 71% percentile). The median prosecution time is 35 months (in the 21% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With more office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is longer than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.