Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18779177 | TWO-DIMENSIONAL ZERO PADDING IN A STREAM OF MATRIX ELEMENTS | July 2024 | November 2025 | Allow | 15 | 0 | 0 | No | No |
| 18774243 | DYNAMIC PROCESSING MEMORY CORE ON A SINGLE MEMORY CHIP | July 2024 | December 2025 | Abandon | 17 | 2 | 0 | No | No |
| 18774678 | Cached Instruction Recoding for Prediction Embedding | July 2024 | February 2026 | Allow | 19 | 2 | 0 | No | No |
| 18655929 | PROCESSOR AND METHOD FOR EXECUTING A LOOPING CODE SEGMENT WITH ZERO OVERHEAD | May 2024 | October 2025 | Allow | 18 | 0 | 0 | Yes | No |
| 18702959 | APPARATUS AND METHOD USING HINT CAPABILITY FOR CONTROLLING MICRO-ARCHITECTURAL CONTROL FUNCTION | April 2024 | December 2025 | Allow | 19 | 1 | 0 | Yes | No |
| 18627001 | Trace Cache that Supports Multiple Different Trace Lengths | April 2024 | October 2025 | Allow | 18 | 1 | 0 | Yes | No |
| 18610302 | Static Instruction Caching in a Coprocessor Architecture | March 2024 | May 2025 | Allow | 14 | 0 | 0 | Yes | No |
| 18586186 | Instruction Fetch Using a Sequential Prediction Circuit | February 2024 | June 2025 | Allow | 16 | 1 | 0 | Yes | No |
| 18428334 | BRANCH PREDICTION BASED ON A PREDICTED CONFIDENCE THAT A CORRESPONDING FUNCTION OF SAMPLED REGISTER STATE CORRELATES TO A LATER BRANCH INSTRUCTION OUTCOME | January 2024 | May 2025 | Allow | 15 | 0 | 0 | Yes | No |
| 18412504 | Branch Prediction Using loop Iteration Count | January 2024 | April 2025 | Allow | 15 | 1 | 0 | Yes | No |
| 18399959 | RETURN ADDRESS STACK WITH BRANCH MISPREDICT RECOVERY | December 2023 | October 2025 | Allow | 22 | 1 | 0 | No | No |
| 18544901 | REDUCED POWER CONSUMPTION PREDICTION USING PREDICTION TABLES | December 2023 | March 2025 | Allow | 15 | 0 | 0 | Yes | No |
| 18542985 | Irregular Cadence Data Processing Units | December 2023 | March 2026 | Allow | 27 | 1 | 0 | Yes | No |
| 18532946 | DEVICE AND METHOD FOR IMPLEMENTING AN OPERATING MODE BASED ON OPCODES | December 2023 | February 2026 | Allow | 26 | 1 | 0 | Yes | No |
| 18522884 | SEQUENTIAL PROCESSING METHOD AND APPARATUS OF DATA PACKET | November 2023 | December 2025 | Allow | 24 | 1 | 0 | No | No |
| 18494565 | EXPLICIT LOCKSTEP FOR FUNCTIONAL SAFETY | October 2023 | July 2025 | Allow | 21 | 1 | 0 | Yes | No |
| 18382974 | HIGH PERFORMANCE PROCESSOR WITH IMPROVED MICROPROGRAM EXECUTION TRIGGERED WITH A SINGLE ISSUED EXECUTION TRIGGER INSTRUCTION | October 2023 | August 2025 | Allow | 22 | 1 | 0 | Yes | No |
| 18287192 | ACCELERATOR CONTROL SYSTEM USING CONTROL DATA TO PERFORM ARITHMETIC PROCESSING ON A PLURALITY OF ACCELERATORS | October 2023 | November 2025 | Allow | 25 | 1 | 0 | Yes | No |
| 18479320 | INSTRUCTION EXECUTION CONTROL APPARATUS AND METHOD USING CORRESPONDENCE INFORMATION BETWEEN DIFFERENT PROCESSOR INSTRUCTION SETS | October 2023 | August 2025 | Allow | 22 | 1 | 0 | No | No |
| 18375124 | INFORMATION PROCESSING APPARATUS AND METHOD OF PROCESSING INFORMATION | September 2023 | September 2025 | Abandon | 24 | 1 | 0 | No | No |
| 18368492 | ACCELERATOR ARCHITECTURE ON A PROGRAMMABLE PLATFORM | September 2023 | January 2026 | Allow | 28 | 4 | 0 | Yes | No |
| 18456649 | FLUSH-ON-DEMAND PROCESSOR INSTRUCTION TRACE | August 2023 | February 2026 | Allow | 30 | 3 | 0 | Yes | No |
| 18361985 | STREAMING ENGINE WITH EARLY EXIT FROM LOOP LEVELS SUPPORTING EARLY EXIT LOOPS AND IRREGULAR LOOPS | July 2023 | July 2025 | Allow | 23 | 2 | 0 | No | No |
| 18224002 | MICROPROCESSOR WITH APPARATUS AND METHOD FOR HANDLING OF INSTRUCTIONS WITH LONG THROUGHPUT | July 2023 | January 2026 | Allow | 30 | 1 | 1 | Yes | No |
| 18335944 | COMPUTATIONAL ARRAY MICROPROCESSOR SYSTEM USING NON-CONSECUTIVE DATA FORMATTING | June 2023 | September 2024 | Allow | 15 | 1 | 0 | Yes | No |
| 18208444 | Forming Constant Extensions in the Same Execute Packet in a VLIW Processor | June 2023 | November 2024 | Allow | 18 | 2 | 0 | No | No |
| 18201293 | DYNAMIC PROCESSING MEMORY CORE ON A SINGLE MEMORY CHIP | May 2023 | March 2024 | Allow | 9 | 1 | 0 | No | No |
| 18192589 | DEVICE AND METHOD FOR ON-THE-FLY PROCESSING CHAIN RECONFIGURATION IN A STREAMING BASED NEURAL PROCESSING UNIT | March 2023 | January 2026 | Allow | 34 | 0 | 0 | Yes | No |
| 18163472 | Floating Point Norm Instruction | February 2023 | June 2025 | Allow | 28 | 1 | 0 | Yes | No |
| 18157942 | COMPUTER-READABLE RECORDING MEDIUM STORING INSTRUCTION SEQUENCE GENERATION PROGRAM, INSTRUCTION SEQUENCE GENERATION METHOD, AND INFORMATION PROCESSING DEVICE | January 2023 | February 2024 | Abandon | 13 | 0 | 0 | No | No |
| 18155834 | Dual-Mode Floating Point Processor Operation | January 2023 | December 2025 | Allow | 35 | 2 | 0 | Yes | No |
| 18092712 | MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS | January 2023 | September 2023 | Allow | 8 | 1 | 0 | No | No |
| 18148759 | INSTRUCTION RETIREMENT UNIT, INSTRUCTION EXECUTION UNIT, PROCESSING UNIT, COMPUTING DEVICE, AND INSTRUCTION PROCESSING METHOD FOR PERFORMING RETIREMENT PROCESSING ON INSTRUCTIONS BASED ON INSTRUCTION COMPLETION INFORMATION | December 2022 | February 2025 | Allow | 26 | 1 | 0 | Yes | No |
| 18148654 | COMPUTING DEVICE AND METHOD FOR FUSING AND EXECUTING VECTOR INSTRUCTIONS | December 2022 | September 2024 | Allow | 20 | 1 | 0 | Yes | No |
| 18086478 | STORAGE OF TENSOR IN A CACHE | December 2022 | January 2026 | Allow | 37 | 3 | 0 | Yes | Yes |
| 18083249 | ACCELERATING FETCH TARGET QUEUE (FTQ) PROCESSING IN A PROCESSOR | December 2022 | November 2024 | Allow | 23 | 2 | 0 | No | No |
| 18066115 | SYSTEM AND METHOD FOR SCHEDULING OPERATIONS IN A GRAPHICS PIPELINE | December 2022 | June 2025 | Allow | 30 | 1 | 0 | Yes | No |
| 18076592 | Instruction Scheduling Method, Instruction Scheduling Apparatus, Device And Storage Medium Based on Durations Consumed by Memory Access instructions During Instruction Running Scenarios | December 2022 | April 2025 | Allow | 29 | 1 | 0 | Yes | No |
| 18070781 | PROCESSOR, PROCESSING METHOD, AND RELATED DEVICE FOR ACCELERATING GRAPH CALCULATION | November 2022 | May 2024 | Allow | 29 | 1 | 0 | No | No |
| 17993564 | Software-Defined Tensor Streaming Multiprocessor for Large-Scale Machine Learning | November 2022 | December 2024 | Allow | 25 | 0 | 0 | Yes | No |
| 17959872 | METHOD AND APPARATUS FOR PERFORMING REDUCTION OPERATIONS ON A PLURALITY OF ASSOCIATED DATA ELEMENT VALUES | October 2022 | October 2025 | Allow | 36 | 6 | 0 | Yes | No |
| 17957604 | METHODS AND APPARATUS FOR PROVIDING MASK REGISTER OPTIMIZATION FOR VECTOR OPERATIONS | September 2022 | October 2024 | Allow | 24 | 2 | 0 | Yes | No |
| 17916146 | A SYSTEM AND METHOD FOR ENABLING RECONFIGURABLE AND FLEXIBLE MODULAR COMPUTE | September 2022 | September 2025 | Allow | 35 | 2 | 0 | Yes | No |
| 17912811 | SYSTEM ON CHIP ARCHITECTURE, INTERPOSER, FPGA AND METHOD OF DESIGN | September 2022 | July 2025 | Abandon | 34 | 3 | 0 | Yes | No |
| 17940731 | ASYNCHRONOUS PIPELINE MERGING USING LONG VECTOR ARBITRATION | September 2022 | June 2023 | Allow | 9 | 0 | 0 | Yes | No |
| 17889838 | METHOD FOR EXTRACTING TARGET STRING AT HIGH-SPEED USING VECTOR INSTRUCTION | August 2022 | December 2025 | Abandon | 40 | 3 | 0 | Yes | No |
| 17879299 | PREDICTION UNIT THAT PROVIDES A FETCH BLOCK DESCRIPTOR EACH CLOCK CYCLE | August 2022 | January 2024 | Allow | 18 | 0 | 0 | Yes | No |
| 17855860 | PREDICTION CLASS DETERMINATION | July 2022 | June 2023 | Allow | 12 | 0 | 0 | Yes | No |
| 17852821 | BACKWARD COMPATIBILITY BY RESTRICTION OF HARDWARE RESOURCES | June 2022 | November 2023 | Allow | 16 | 2 | 0 | Yes | No |
| 17808916 | PROVIDING EXTENDED BRANCH TARGET BUFFER (BTB) ENTRIES FOR STORING TRUNK BRANCH METADATA AND LEAF BRANCH METADATA | June 2022 | October 2023 | Allow | 16 | 1 | 0 | Yes | No |
| 17842613 | REGISTERS IN A VECTOR PROCESSOR THAT STORE ADDRESSES FOR ACCESSING VECTORS | June 2022 | August 2025 | Allow | 38 | 4 | 0 | No | No |
| 17838713 | MICRO-OPERATION SUPPLY RATE VARIATION | June 2022 | January 2024 | Allow | 19 | 1 | 0 | No | No |
| 17806234 | Instruction Fetch Using a Return Prediction Circuit | June 2022 | November 2023 | Allow | 18 | 1 | 0 | Yes | No |
| 17835352 | FOLDED INSTRUCTION FETCH PIPELINE | June 2022 | August 2023 | Allow | 14 | 0 | 0 | No | No |
| 17833504 | REGISTER BASED SIMD LOOKUP TABLE OPERATIONS | June 2022 | January 2025 | Allow | 31 | 3 | 0 | Yes | No |
| 17804949 | METHOD AND APPARATUS TO EXPEDITE SYSTEM SERVICES USING PROCESSING-IN-MEMORY (PIM) | June 2022 | April 2024 | Allow | 22 | 1 | 0 | Yes | No |
| 17828075 | COMPUTER-READABLE RECORDING MEDIUM STORING PROGRAM FOR CONVERTING FIRST SINGLE INSTRUCTION MULTIPLE DATA (SIMD) COMMAND USING FIRST MASK REGISTER INTO SECOND SIMD COMMAND USING SECOND MASK REGISTER, COMMAND CONVERSION METHOD FOR CONVERTING FIRST SIMD COMMAND USING FIRST MASK REGISTER INTO SECOND SIMD COMMAND USING SECOND MASK REGISTER, AND COMMAND CONVERSION APPARATUS FOR CONVERTING FIRST SIMD COMMAND USING FIRST MASK REGISTER INTO SECOND SIMD COMMAND USING SECOND MASK REGISTER | May 2022 | July 2023 | Allow | 14 | 0 | 0 | No | No |
| 17827291 | REUSING FETCHED, FLUSHED INSTRUCTIONS AFTER AN INSTRUCTION PIPELINE FLUSH IN RESPONSE TO A HAZARD IN A PROCESSOR TO REDUCE INSTRUCTION RE-FETCHING | May 2022 | March 2023 | Allow | 10 | 0 | 0 | Yes | No |
| 17752060 | RE-ENABLING USE OF PREDICTION TABLE AFTER EXECUTION STATE SWITCH | May 2022 | August 2023 | Allow | 15 | 1 | 0 | No | No |
| 17733728 | MICROPROCESSOR WITH SHARED READ AND WRITE BUSES AND INSTRUCTION ISSUANCE TO MULTIPLE REGISTER SETS IN ACCORDANCE WITH A TIME COUNTER | April 2022 | July 2024 | Allow | 27 | 1 | 0 | Yes | No |
| 17755130 | DECOUPLED ACCESS-EXECUTE PROCESSING | April 2022 | February 2024 | Allow | 21 | 1 | 0 | Yes | No |
| 17770553 | METHOD AND SYSTEM FOR DISTRIBUTING INSTRUCTIONS IN RECONFIGURABLE PROCESSOR AND STORAGE MEDIUM | April 2022 | February 2024 | Allow | 22 | 1 | 0 | No | No |
| 17721193 | PROCESSOR AUTHENTICATION METHOD | April 2022 | August 2023 | Allow | 16 | 1 | 0 | No | No |
| 17718258 | FETCH STAGE HANDLING OF INDIRECT JUMPS IN A PROCESSOR PIPELINE | April 2022 | June 2023 | Allow | 14 | 1 | 0 | Yes | No |
| 17712966 | METHOD AND APPARATUS FOR PERFORMING REDUCTION OPERATIONS ON A PLURALITY OF ASSOCIATED DATA ELEMENT VALUES | April 2022 | December 2024 | Abandon | 32 | 4 | 0 | Yes | No |
| 17709824 | TAG CHECKING PROCEDURE CALLS | March 2022 | October 2025 | Allow | 43 | 1 | 0 | Yes | No |
| 17705946 | TRACKER FOR INDIVIDUAL BRANCH MISPREDICTION COST | March 2022 | September 2025 | Allow | 42 | 1 | 0 | No | No |
| 17703773 | ISSUING INSTRUCTIONS BASED ON RESOURCE CONFLICT CONSTRAINTS IN MICROPROCESSOR | March 2022 | September 2023 | Allow | 18 | 1 | 0 | No | No |
| 17702714 | STACK TRACES USING SHADOW STACK | March 2022 | October 2023 | Allow | 18 | 0 | 0 | Yes | No |
| 17689368 | METHOD FOR PATCHING CHIP AND CHIP | March 2022 | January 2025 | Abandon | 35 | 2 | 0 | Yes | No |
| 17640589 | METHOD, SYSTEM AND DEVICE FOR IMPROVED EFFICIENCY OF PIPELINE PROCESSING OF INSTRUCTIONS, AND COMPUTER STORAGE MEDIUM | March 2022 | October 2023 | Allow | 20 | 1 | 0 | Yes | No |
| 17682091 | REDUCING SILENT DATA ERRORS USING A HARDWARE MICRO-LOCKSTEP TECHNIQUE | February 2022 | January 2026 | Abandon | 46 | 1 | 0 | No | No |
| 17590719 | Conditional Instructions Prediction | February 2022 | April 2024 | Allow | 26 | 2 | 0 | Yes | No |
| 17578516 | PROCESSING DEVICE WITH A MICROBRANCH TARGET BUFFER FOR BRANCH PREDICTION USING LOOP ITERATION COUNT | January 2022 | September 2023 | Allow | 20 | 1 | 0 | No | No |
| 17577577 | EFFICIENT INTER-THREAD COMMUNICATION BETWEEN HARDWARE PROCESSING THREADS OF A HARDWARE MULTITHREADED PROCESSOR BY SELECTIVE ALIASING OF REGISTER BLOCKS | January 2022 | April 2023 | Allow | 15 | 1 | 0 | No | No |
| 17571130 | ARITHMETIC LOGIC UNIT LAYOUT FOR A PROCESSOR | January 2022 | August 2023 | Allow | 19 | 1 | 0 | No | No |
| 17565001 | MULTI-TABLE INSTRUCTION PREFETCH UNIT FOR MICROPROCESSOR | December 2021 | December 2023 | Allow | 24 | 2 | 1 | Yes | No |
| 17558361 | DEVICE, METHOD, AND SYSTEM TO FACILITATE IMPROVED BANDWIDTH OF A BRANCH PREDICTION UNIT | December 2021 | June 2025 | Allow | 42 | 1 | 0 | No | No |
| 17549727 | TECHNOLOGIES FOR HARDWARE MICROSERVICES ACCELERATED IN XPU | December 2021 | February 2026 | Allow | 50 | 2 | 0 | Yes | No |
| 17611670 | METHOD AND APPARATUS FOR SCHEDULING OUT-OF-ORDER EXECUTION QUEUE IN OUT-OF-ORDER PROCESSOR | November 2021 | April 2024 | Allow | 29 | 2 | 0 | No | No |
| 17515538 | PROCESSOR AND OPERATING METHOD THEREOF FOR RENAMING DESTINATION LOGICAL REGISTER OF MOVE INSTRUCTION | October 2021 | April 2024 | Allow | 30 | 4 | 0 | Yes | No |
| 17512082 | Memory Systems and Memory Control Methods | October 2021 | March 2025 | Abandon | 41 | 4 | 0 | Yes | No |
| 17509897 | PROGRAM FLOW PREDICTION FOR LOOPS | October 2021 | January 2023 | Allow | 14 | 1 | 0 | No | No |
| 17451984 | COMPUTATIONAL ARRAY MICROPROCESSOR SYSTEM USING NON-CONSECUTIVE DATA FORMATTING | October 2021 | January 2023 | Allow | 15 | 0 | 0 | Yes | No |
| 17493667 | APPARATUS AND METHOD FOR LOOP FLATTENING AND REDUCTION IN A SINGLE INSTRUCTION MULTIPLE DATA (SIMD) PIPELINE | October 2021 | March 2024 | Abandon | 29 | 1 | 0 | No | No |
| 17492068 | CONTROL OF BRANCH PREDICTION FOR ZERO-OVERHEAD LOOP | October 2021 | January 2023 | Allow | 16 | 1 | 0 | No | No |
| 17384646 | ZERO OPERAND INSTRUCTION CONVERSION FOR ACCELERATING SPARSE COMPUTATIONS IN A CENTRAL PROCESSING UNIT PIPELINE | July 2021 | March 2023 | Allow | 20 | 1 | 0 | Yes | No |
| 17369021 | DYNAMIC PROCESSING MEMORY | July 2021 | March 2024 | Allow | 33 | 1 | 0 | Yes | No |
| 17366244 | THREAD PRIORITIES USING MISPREDICTION RATE AND SPECULATIVE DEPTH | July 2021 | August 2023 | Allow | 26 | 4 | 0 | Yes | No |
| 17364824 | CONSTRAINED CARRIES ON SPECULATIVE COUNTERS | June 2021 | January 2023 | Allow | 18 | 1 | 0 | Yes | No |
| 17344070 | PROCESSOR AND PIPELINE PROCESSING METHOD FOR PROCESSING MULTIPLE THREADS INCLUDING WAIT INSTRUCTION PROCESSING | June 2021 | January 2023 | Allow | 19 | 2 | 0 | No | No |
| 17335089 | MICROPROCESSOR WITH SHARED FUNCTIONAL UNIT FOR EXECUTING MULTI-TYPE INSTRUCTIONS | June 2021 | August 2022 | Allow | 14 | 1 | 0 | Yes | No |
| 17322598 | Exception Handling | May 2021 | March 2022 | Allow | 10 | 0 | 0 | Yes | No |
| 17318252 | PROCESSOR DEPENDENCY-AWARE INSTRUCTION EXECUTION | May 2021 | August 2022 | Allow | 15 | 2 | 0 | Yes | No |
| 17232386 | SYSTEMS AND METHODS FOR REDUCING POWER CONSUMPTION IN EMBEDDED MACHINE LEARNING ACCELERATORS | April 2021 | January 2025 | Allow | 45 | 5 | 0 | No | No |
| 17232634 | UNIVERSAL SYNCHRONOUS FIFO IP CORE FOR FIELD PROGRAMMABLE GATE ARRAYS | April 2021 | September 2025 | Allow | 53 | 8 | 0 | Yes | No |
| 17282608 | DYNAMIC PROCESSING MEMORY CORE ON A SINGLE MEMORY CHIP | April 2021 | July 2025 | Abandon | 51 | 3 | 0 | No | No |
| 17214804 | Reconfigurable Multi-Thread Processor for Simultaneous Operations on Split Instructions and Operands | March 2021 | June 2023 | Allow | 26 | 1 | 1 | Yes | No |
| 17213453 | CONTROL FLOW MECHANISM FOR EXECUTION OF GRAPHICS PROCESSOR INSTRUCTIONS USING ACTIVE CHANNEL PACKING | March 2021 | August 2022 | Allow | 17 | 2 | 0 | Yes | No |
| 17203205 | MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS | March 2021 | August 2022 | Allow | 17 | 1 | 0 | Yes | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner SPANN, COURTNEY P.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 25.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner SPANN, COURTNEY P works in Art Unit 2183 and has examined 211 patent applications in our dataset. With an allowance rate of 77.7%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 34 months.
Examiner SPANN, COURTNEY P's allowance rate of 77.7% places them in the 45% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.
On average, applications examined by SPANN, COURTNEY P receive 2.72 office actions before reaching final disposition. This places the examiner in the 80% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.
The median time to disposition (half-life) for applications examined by SPANN, COURTNEY P is 34 months. This places the examiner in the 43% percentile for prosecution speed. Prosecution timelines are slightly slower than average with this examiner.
Conducting an examiner interview provides a +36.8% benefit to allowance rate for applications examined by SPANN, COURTNEY P. This interview benefit is in the 85% percentile among all examiners. Recommendation: Interviews are highly effective with this examiner and should be strongly considered as a prosecution strategy. Per MPEP § 713.10, interviews are available at any time before the Notice of Allowance is mailed or jurisdiction transfers to the PTAB.
When applicants file an RCE with this examiner, 26.1% of applications are subsequently allowed. This success rate is in the 42% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.
This examiner enters after-final amendments leading to allowance in 17.7% of cases where such amendments are filed. This entry rate is in the 20% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.
When applicants request a pre-appeal conference (PAC) with this examiner, 200.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 94% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.
This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 89% percentile among all examiners. Of these withdrawals, 100.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.
When applicants file petitions regarding this examiner's actions, 46.2% are granted (fully or in part). This grant rate is in the 40% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.
Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 12% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 1.2% of allowed cases (in the 63% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.