USPTO Examiner COLEMAN ERIC - Art Unit 2183

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19002787Illegal Address Mask Method and Device for Cores of DSPDecember 2024March 2025Allow200NoNo
18626689SYSTEM AND METHOD TO ACCELERATE REDUCE OPERATIONS IN GRAPHICS PROCESSORApril 2024May 2025Allow1310NoNo
18621539UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYSMarch 2024May 2025Allow1310NoNo
18601598TECHNOLOGY FOR CONTROLLING PEAK POWER BY DIVIDING CLOCKMarch 2024July 2024Allow410NoNo
18594091STREAMING ENGINE WITH VARIABLE STREAM TEMPLATE FORMATMarch 2024May 2025Allow1410NoNo
18423210Load/Store Unit for a Tensor Engine and Methods for Loading or Storing a TensorJanuary 2024September 2024Allow800NoNo
18415523NEURAL PROCESSOR AND METHOD FOR FETCHING INSTRUCTIONS THEREOFJanuary 2024May 2025Allow1610NoNo
18414164DUAL VECTOR ARITHMETIC LOGIC UNITJanuary 2024January 2025Allow1210NoNo
18534012SYSTEMS, METHODS, AND APPARATUS FOR TILE CONFIGURATIONDecember 2023December 2024Allow1200NoNo
18523632MULTI-MODE ARCHITECTURE FOR UNIFYING MATRIX MULTIPLICATION, 1X1 CONVOLUTION AND 3X3 CONVOLUTIONNovember 2023February 2024Allow200YesNo
18388797TECHNIQUES FOR DECOUPLED ACCESS-EXECUTE NEAR-MEMORY PROCESSINGNovember 2023April 2025Allow1710NoNo
18495645PROCESSOR AND METHOD FOR ASSIGNING CONFIG ID FOR CORE INCLUDED IN THE SAMEOctober 2023March 2024Allow510NoNo
18383311METHOD OF NOTIFYING A PROCESS OR PROGRAMMABLE ATOMIC OPERATION TRAPSOctober 2023January 2025Allow1510NoNo
18483026INSTRUCTION FORMAT AND INSTRUCTION SET ARCHITECTURE FOR TENSOR STREAMING PROCESSOROctober 2023December 2024Allow1400NoNo
18376494General-Purpose Systolic ArrayOctober 2023December 2024Allow1510YesNo
18477457NEURAL PROCESSOR AND METHOD FOR FETCHING INSTRUCTIONS THEREOFSeptember 2023December 2023Allow200NoNo
18373682APPARATUS FOR ACCELERATING NEURAL NETWORKSSeptember 2023April 2025Allow1910NoNo
18473088INSTRUCTION AND LOGIC FOR TRACKING FETCH PERFORMANCE BOTTLENECKSSeptember 2023October 2024Allow1300NoNo
18469008Vector Instruction Cracking After Scalar DispatchSeptember 2023March 2025Allow1800NoNo
18465189INSTRUCTION SIMULATION DEVICE AND METHOD THEREOFSeptember 2023February 2025Allow1710NoNo
18463961CONTROL SYSTEM AND METHOD OF MACHINE AND HOST COMPUTERSeptember 2023June 2025Allow2210NoNo
18243994INTELLIGENT GRAPH EXECUTION AND ORCHESTRATION ENGINE FOR A RECONFIGURABLE DATA PROCESSORSeptember 2023June 2025Allow2210YesNo
18279664Processor and Method for Executing an Instruction with a ProcessorAugust 2023April 2025Allow2010NoNo
18240287INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMSAugust 2023September 2024Allow1210NoNo
18239106VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOFAugust 2023April 2024Allow800NoNo
18239040MULTI-CORE PROCESSING AND MEMORY ARRANGEMENTAugust 2023April 2024Allow800YesNo
18448079GENERATING AND EXECUTING A CONTROL FLOWAugust 2023October 2024Allow1400NoNo
18446357MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAYAugust 2023April 2024Allow900NoNo
18365790ISSUING INSTRUCTIONS ON A VECTOR PROCESSORAugust 2023April 2024Allow800NoNo
18230139COMPUTATIONAL MEMORYAugust 2023January 2024Allow610NoNo
18224146COMPUTATIONAL MEMORY WITH COOPERATION AMONG ROWS OF PROCESSING ELEMENTS AND MEMORY THEREOFJuly 2023March 2024Allow810NoNo
18353181QUICK CLEARING OF REGISTERSJuly 2023June 2024Allow1100NoNo
18351916COMPILER OPERATIONS FOR TENSOR STREAMING PROCESSORJuly 2023September 2024Allow1510NoNo
18220225INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMSJuly 2023March 2024Allow800YesNo
18344367MODEL PROCESSING METHOD AND APPARATUSJune 2023October 2024Allow1500NoNo
18207432FLOW MODEL COMPUTATION SYSTEM WITH DISCONNECTED GRAPHSJune 2023November 2023Allow510YesNo
18328693SYSTEMS AND METHODS FOR PROCESSING FUNCTIONS IN COMPUTATIONAL STORAGEJune 2023September 2024Allow1500NoNo
18202928VECTOR PROCESSOR WITH EXTENDED VECTOR REGISTERSMay 2023August 2024Allow1500NoNo
18199996Determining Distances Between VectorsMay 2023December 2024Allow1910YesNo
18321050METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTSMay 2023April 2024Allow1100NoNo
18313026APPARATUSES, METHODS, AND SYSTEMS FOR 8-BIT FLOATING-POINT MATRIX DOT PRODUCT INSTRUCTIONSMay 2023March 2024Allow1100NoNo
18312052TECHNIQUE FOR PREDICTING BEHAVIOUR OF CONTROL FLOW INSTRUCTIONSMay 2023August 2024Allow1600NoNo
18310129COMPUTING EFFICIENT CROSS CHANNEL OPERATIONS IN PARALLEL COMPUTING MACHINES USING SYSTOLIC ARRAYSMay 2023May 2024Allow1200YesNo
18305151Re-use of Speculative Load Instruction Results from Wrong PathApril 2023August 2024Allow1600NoNo
18302874Atomic Instruction Set and Architecture with Bus Arbitration LockingApril 2023April 2025Allow2420YesNo
18301386SCALABLE SPARSE MATRIX MULTIPLY ACCELERATION USING SYSTOLIC ARRAYS WITH FEEDBACK INPUTSApril 2023March 2024Allow1100NoNo
18193635TECHNIQUE FOR HARDWARE ACTIVATION FUNCTION COMPUTATION IN RNS ARTIFICIAL NEURAL NETWORKSMarch 2023October 2024Allow1910NoNo
18127875DEEP NEURAL NETWORK ACCELERATOR FOR OPTIMIZED DATA PROCESSING, AND CONTROL METHOD OF THE DEEP NEURAL NETWORK ACCELERATORMarch 2023June 2024Allow1500NoNo
18246662RISC-V-based Artificial Intelligence Inference Method and SystemMarch 2023September 2023Allow600NoNo
18125020PARALLEL DECISION SYSTEM AND METHOD FOR DISTRIBUTED DATA PROCESSINGMarch 2023May 2023Allow200NoNo
18185416SYSTEM AND METHOD FOR SYNCHRONIZING PROCESSING BETWEEN A PLURALITY OF PROCESSORSMarch 2023June 2024Allow1500YesNo
18185880Network Computer with Two Embedded RingsMarch 2023November 2024Allow2010YesNo
18185236THROUGHPUT INCREASE FOR TENSOR OPERATIONSMarch 2023May 2024Allow1400NoNo
18176034Machine Code InstructionFebruary 2023June 2024Allow1500NoNo
18111661SYSTEMS AND METHODS FOR PERFORMING NEURAL NETWORK OPERATIONSFebruary 2023December 2024Abandon2210NoNo
18170696NATIVE SUPPORT FOR EXECUTION OF GET EXPONENT, GET MANTISSSA, AND SCALE INSTRUCTIONS WITHIN A GRAPHICS PROCESSING UNIT VIA REUSE OF FUSED MULTIPLY-ADD EXECUTION UNIT HARDWARE LOGICFebruary 2023April 2024Allow1400YesNo
18104749Neural Network Architecture Using Convolution EnginesFebruary 2023March 2024Allow1400NoNo
18098068PRE-STAGED INSTRUCTION REGISTERS FOR VARIABLE LENGTH INSTRUCTION SET MACHINEJanuary 2023May 2024Allow1600YesNo
18089157COMPILER-BASED INPUT SYNCHRONIZATION FOR PROCESSOR WITH VARIANT STAGE LATENCIESDecember 2022March 2025Allow2710YesNo
18067790HIERARCHICAL RING-BASED INTERCONNECTION NETWORK FOR SYMMETRIC MULTIPROCESSORSDecember 2022June 2024Allow1710NoNo
18067538GRAPH INSTRUCTION PROCESSING METHOD AND APPARATUSDecember 2022July 2024Allow1910YesNo
18077362RECONFIGURABLE COMPUTING CHIPDecember 2022November 2023Allow1101NoNo
18073313METHOD AND APPARATUS FOR VECTOR SORTINGDecember 2022February 2024Allow1500NoNo
18060615SYSTEM AND METHOD OF WORKLOAD MANAGEMENT FOR DISTRIBUTING WORKLOAD OVER SIMD BASED PARALLEL PROCESSING ARCHITECTUREDecember 2022February 2024Allow1400NoNo
18060276MEMORY LOOKUP COMPUTING MECHANISMSNovember 2022December 2023Allow1210NoNo
18072081APPLICATION PROGRAMMING INTERFACE TO WAIT ON MATRIX MULTIPLY-ACCUMULATENovember 2022September 2024Allow2110YesNo
18059981PERFORMANCE MANAGEMENT FOR ACCESSING STORED ENTITIES BY MULTIPLE COMPUTE NODES OF A STORAGE SYSTEMNovember 2022January 2024Allow1400NoNo
17985469INSTRUCTION DECODING USING HASH TABLESNovember 2022January 2024Allow1400NoNo
18052908INSTRUCTION EXECUTION METHOD AND INSTRUCTION EXECUTION DEVICENovember 2022April 2024Allow1710NoNo
18052909INSTRUCTION EXECUTION METHOD AND INSTRUCTION EXECUTION DEVICENovember 2022April 2024Allow1710NoNo
18052774MODULO-SPACE PROCESSING IN MULTIPLY-AND-ACCUMULATE UNITSNovember 2022January 2024Allow2510NoNo
17975596PROCESSOR HAVING MULTIPLE CORES, SHARED CORE EXTENSION LOGIC, AND SHARED CORE EXTENSION UTILIZATION INSTRUCTIONSOctober 2022May 2024Allow1810NoNo
17974314INSTRUCTION PREFETCH BASED POWER CONTROLOctober 2022December 2023Allow1400NoNo
17972675STREAMING ENGINE WITH FLEXIBLE STREAMING ENGINE TEMPLATE SUPPORTING DIFFERING NUMBER OF NESTED LOOPS WITH CORRESPONDING LOOP COUNTS AND LOOP OFFSETSOctober 2022October 2023Allow1200NoNo
17972681Cooperative Instruction Prefetch on Multicore SystemOctober 2022November 2023Allow1300NoNo
18046634PROCESSOR AND METHOD FOR FLUSHING TRANSLATION LOOKASIDE BUFFER ACCORDING TO DESIGNATED KEY IDENTIFICATION CODEOctober 2022November 2023Allow1300NoNo
17964291MEMORY OPERATION FOR SYSTOLIC ARRAYOctober 2022February 2024Allow1610NoNo
17960390BRANCH PREDICTOR TRIGGERINGOctober 2022October 2023Allow1300NoNo
17958219Reducing Overhead In Processor Array SearchingSeptember 2022February 2024Allow1710NoNo
17950560CONTENT-ADDRESSABLE PROCESSING ENGINESeptember 2022January 2024Allow1610NoNo
17944889MULTI DIMENSIONAL CONVOLUTION IN NEURAL NETWORK PROCESSORSeptember 2022July 2023Allow1000NoNo
17942816COMPUTATIONAL MEMORY WITH COOPERATION AMONG ROWS OF PROCESSING ELEMENTS AND MEMORY THEREOFSeptember 2022January 2024Allow1610NoNo
17901480METHOD OF NOTIFYING A PROCESS OR PROGRAMMABLE ATOMIC OPERATION TRAPSSeptember 2022July 2023Allow1000NoNo
17892807NEURAL NETWORK COMPUTE TILEAugust 2022July 2023Allow1000NoNo
17883407PERFORMANCE ESTIMATION-BASED RESOURCE ALLOCATION FOR RECONFIGURABLE ARCHITECTURESAugust 2022July 2023Allow1100NoNo
17878609RECONFIGURABLE PROCESSING-IN-MEMORY LOGIC USING LOOK-UP TABLESAugust 2022November 2023Allow1610NoNo
17876136METHOD AND APPARATUS WITH DATA PROCESSINGJuly 2022October 2023Allow1410YesNo
17872927TECHNOLOGY TO LEARN AND OFFLOAD COMMON PATTERNS OF MEMORY ACCESS AND COMPUTATIONJuly 2022September 2023Allow1410YesNo
17865903PROCESSING-IN-MEMORY (PIM) DEVICEJuly 2022October 2023Allow1510NoNo
17865148PROCESSING-IN-MEMORY (PIM) DEVICESJuly 2022May 2023Allow1000YesNo
17852306ENABLING ACCELERATED PROCESSING UNITS TO PERFORM DATAFLOW EXECUTIONJune 2022November 2023Allow1610NoNo
17849991ARCHITECTURE TO SUPPORT SYNCHRONIZATION BETWEEN CORE AND INFERENCE ENGINE FOR MACHINE LEARNINGJune 2022April 2023Allow1000YesNo
17844169Multiplexing Between Different Processing ChannelsJune 2022May 2023Allow1100YesNo
17825816CALCULATION ENGINE FOR PERFORMING CALCULATIONS BASED ON DEPENDENCIES IN A SELF-DESCRIBING DATA SYSTEMMay 2022August 2023Allow1410YesNo
17664632PARALLEL MERGE SORTER CIRCUITMay 2022June 2023Allow1300NoNo
17743062GENERATING AND EXECUTING A CONTROL FLOWMay 2022March 2023Allow1000NoNo
17733717METHODS AND SYSTEMS FOR CONVERTING A RELATED GROUP OF PHYSICAL MACHINES TO VIRTUAL MACHINESApril 2022August 2023Allow1610NoNo
17722477QUICK CLEARING OF REGISTERSApril 2022March 2023Allow1000NoNo
17659642MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAYApril 2022May 2023Allow1310YesNo
17717947LOOK-UP TABLE CONTAINING PROCESSOR-IN-MEMORY CLUSTER FOR DATA-INTENSIVE APPLICATIONSApril 2022May 2023Allow1300NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner COLEMAN, ERIC.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
10
Examiner Affirmed
7
(70.0%)
Examiner Reversed
3
(30.0%)
Reversal Percentile
45.7%
Lower than average

What This Means

With a 30.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
38
Allowed After Appeal Filing
18
(47.4%)
Not Allowed After Appeal Filing
20
(52.6%)
Filing Benefit Percentile
74.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 47.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner COLEMAN, ERIC - Prosecution Strategy Guide

Executive Summary

Examiner COLEMAN, ERIC works in Art Unit 2183 and has examined 1,382 patent applications in our dataset. With an allowance rate of 94.1%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 28 months.

Allowance Patterns

Examiner COLEMAN, ERIC's allowance rate of 94.1% places them in the 83% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by COLEMAN, ERIC receive 1.23 office actions before reaching final disposition. This places the examiner in the 22% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by COLEMAN, ERIC is 28 months. This places the examiner in the 50% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +6.1% benefit to allowance rate for applications examined by COLEMAN, ERIC. This interview benefit is in the 33% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 40.2% of applications are subsequently allowed. This success rate is in the 90% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 54.3% of cases where such amendments are filed. This entry rate is in the 76% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 61.5% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 49% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 75.0% of appeals filed. This is in the 60% percentile among all examiners. Of these withdrawals, 43.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 45.3% are granted (fully or in part). This grant rate is in the 50% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 6.5% of allowed cases (in the 92% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.5% of allowed cases (in the 49% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.