USPTO Art Unit 2815 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19191370FORMATION OF AN ARRAY OF NANOSTRUCTURESApril 2025September 2025Allow510NoNo
19012337SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEJanuary 2025September 2025Allow821NoNo
18957406FORMATION OF AN ARRAY OF NANOSTRUCTURESNovember 2024April 2025Allow510YesNo
18848769SEMICONDUCTOR DEVICESeptember 2024September 2025Allow1221YesNo
18779095SEMICONDUCTOR TRENCH CAPACITOR STRUCTURE AND MANUFACTURING METHOD THEREOFJuly 2024January 2026Allow1810NoNo
18776271PACKAGE STRUCTURE WITH CONDUCTIVE PATTERNS IN A REDISTRIBUTION LAYERJuly 2024August 2025Allow1310YesNo
18777258CARRIER SUBSTRATE FOR SEMICONDUCTOR STRUCTURES SUITABLE FOR A TRANSFER BY TRANSFER PRINT AND MANUFACTURING OF THE SEMICONDUCTOR STRUCTURES ON THE CARRIER SUBSTRATEJuly 2024March 2026Abandon1921YesNo
18771786SEMICONDUCTOR DEVICE INCLUDING DEEP TRENCH CAPACITORS AND VIA CONTACTSJuly 2024October 2025Allow1510NoNo
18763075SEMICONDUCTOR STRUCTURES HAVING DEEP TRENCH CAPACITOR AND METHODS FOR MANUFACTURING THE SAMEJuly 2024March 2025Allow810NoNo
18755379Ferroelectric Tunnel Junction Devices with a Sparse Seed Layer and Methods for Forming the SameJune 2024July 2025Allow1310NoNo
18748475Vertical Static Random Access Memory and Method of Fabricating ThereofJune 2024October 2025Allow1520NoNo
18747379SEMICONDUCTOR DEVICE, FERROELECTRIC CAPACITOR AND LAMINATED STRUCTUREJune 2024May 2025Allow1110NoNo
18743431SEMICONDUCTOR STRUCTURES HAVING DEEP TRENCH CAPACITOR AND METHODS FOR MANUFACTURING THE SAMEJune 2024January 2025Allow700NoNo
18741063FIN FIELD-EFFECT TRANSISTOR DEVICE AND METHODJune 2024April 2025Allow1010NoNo
18740603SEMICONDUCTOR DEVICEJune 2024March 2025Allow901NoNo
18740444IC PACKAGE WITH HEAT SPREADERJune 2024March 2025Allow900NoNo
18737611MEMS AND NEMS STRUCTURESJune 2024October 2025Allow1620NoNo
18733945MULTI-TIER DEEP TRENCH CAPACITOR AND METHODS OF FORMING THE SAMEJune 2024December 2025Allow1811NoNo
18732725RRAM BOTTOM ELECTRODEJune 2024March 2025Allow910NoNo
18731945REDUCING PATTERN LOADING IN THE ETCH-BACK OF METAL GATEJune 2024November 2025Allow1730NoNo
18680253SOFT ASHING PROCESS FOR FORMING PROTECTIVE LAYER ON CONDUCTIVE CAP LAYER OF SEMICONDUCTOR DEVICEMay 2024May 2025Allow1100NoNo
18678270LEAD FRAME AND MANUFACTURING METHOD THEREOFMay 2024April 2025Allow1010YesNo
18675401VERTICAL SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMay 2024December 2025Allow1920YesNo
18675467SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICEMay 2024November 2025Abandon1811NoNo
18674923METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE INCLUDING A MOS TRANSISTOR HAVING A SILICIDE LAYERMay 2024July 2025Allow1410NoNo
18669565SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAMEMay 2024March 2025Allow1010NoNo
18666035SEMICONDUCTOR MEMORY DEVICEMay 2024December 2024Allow700NoNo
18664656HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOFMay 2024February 2025Allow920NoNo
18659523SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MEMORY DEVICE, AND ELECTRONIC DEVICEMay 2024December 2024Allow700NoNo
18656631SEMICONDUCTOR POWER DEVICE AND METHOD FOR MANUFACTURING THE SAMEMay 2024November 2025Allow1921NoNo
18649840SELF-ASSEMBLED MONOLAYER FOR ELECTRODE MODIFICATION AND DEVICE COMPRISING SUCH SELF-ASSEMBLED MONOLAYERApril 2024March 2025Allow1010NoNo
18644330MULTI-LAYER DIELECTRIC REFILL FOR PROFILE CONTROL IN SEMICONDUCTOR DEVICESApril 2024April 2025Allow1110NoNo
18645366MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEApril 2024January 2025Allow910NoNo
18641815MEMS RESONATOR INTEGRATED CICRUIT FABRICATIONApril 2024May 2025Allow1310NoNo
18639648LIGHT-EMITTING DEVICE INCLUDING SEALING MEMEBER WITH UPPER SURFACE HAVING FLAT REGIONApril 2024September 2025Abandon1720NoNo
18631641BURIED GRID WITH SHIELD IN WIDE BAND GAP MATERIALApril 2024February 2025Allow1010NoNo
18632253Fabricating Method of Semiconductor DeviceApril 2024July 2025Allow1620NoNo
18632214DISPLAY DEVICEApril 2024April 2025Allow1210YesNo
18630676PACKAGE FOR AN INTEGRATED CIRCUIT AND MANUFACTURING METHODApril 2024November 2024Allow700NoNo
18627931A STRUCTURE AND METHODS OF FORMING THE STRUCTUREApril 2024February 2025Allow1010NoNo
18626472METHOD AND APPARATUS FOR MANUFACTURING A SEMICONDUCTOR LAYER AND SUBSTRATE PROVIDED THEREWITHApril 2024May 2025Allow1310YesNo
18627266STRAINED SEMICONDUCTOR USING ELASTIC EDGE RELAXATION OF A STRESSOR COMBINED WITH BURIED INSULATING LAYERApril 2024October 2025Allow1800NoNo
18625547SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEApril 2024February 2025Allow1010NoNo
18623766LATERAL FIN STATIC INDUCTION TRANSISTORApril 2024February 2025Allow1110NoNo
18619261SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEMarch 2024October 2024Allow700NoNo
18614757SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEMarch 2024November 2024Allow700NoNo
18614985FIN ISOLATION STRUCTURE FOR FINFET AND METHOD OF FORMING THE SAMEMarch 2024October 2025Allow1810YesNo
18611143WIDE BAND GAP SEMICONDUCTOR DEVICE WITH SURFACE INSULATING FILMMarch 2024February 2026Allow2210NoNo
18608949Semiconductor structureMarch 2024February 2025Allow1120NoNo
18604713SEMICONDUCTOR DEVICEMarch 2024June 2025Abandon1510NoNo
18603246SEMICONDUCTOR STRUCTURE, METHOD FOR FABRICATING THEREOF, AND METHOD FOR FABRICATING SEMICONDUCTOR LAYOUTMarch 2024May 2025Allow1420NoNo
18595569LOW STRESS ASYMMETRIC DUAL SIDE MODULEMarch 2024March 2025Allow1210NoNo
18594215TRENCH CAPACITOR STRUCTURE WITH HYBRID FILLING LAYERMarch 2024January 2025Allow1110NoNo
18593959THREE-DIMENSIONAL MEMORY DEVICE AND MANUFACTURING METHOD THEREOFMarch 2024July 2025Allow1710NoNo
18592704LOW STRESS ASYMMETRIC DUAL SIDE MODULEMarch 2024March 2025Allow1210NoNo
18589774METHOD TO INDUCE STRAIN IN FINFET CHANNELS FROM AN ADJACENT REGIONFebruary 2024October 2024Allow810NoNo
18590915LIGHT EMITTING DIODE DEVICEFebruary 2024July 2025Allow1610NoNo
18590282FERROELECTRIC CAPACITORS, TRANSISTORS, MEMORY DEVICES, AND METHODS OF MANUFACTURING FERROELECTRIC DEVICESFebruary 2024July 2025Allow1610YesNo
18586255THIN FILM TRANSISTOR AND VERTICAL NON-VOLATILE MEMORY DEVICE INCLUDING TRANSITION METAL-INDUCED POLYCRYSTALLINE METAL OXIDE CHANNEL LAYERFebruary 2024September 2024Allow700NoNo
18582809SUBSTRATE PROCESSING APPARATUS AND METHOD FOR DETERMINING DETERIORATION DEGREE OF CONDUCTIVE PIPEFebruary 2024December 2024Allow1011NoNo
18581606SEMICONDUCTOR DEVICEFebruary 2024October 2025Abandon2020NoNo
18581813SEMICONDUCTOR DEVICE WITH CONDUCTIVE LAYERS HAVING DIFFERENT PATTERN DENSITIES AND METHOD FOR FABRICATING THE SAMEFebruary 2024March 2026Abandon2540NoNo
18444758SEMICONDUCTOR STRUCTUREFebruary 2024November 2024Allow910NoNo
18439785INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAMEFebruary 2024January 2025Allow1110YesNo
18440071Semiconductor Device and Methods of Forming SameFebruary 2024June 2025Allow1620NoNo
18440915SEMICONDUCTOR DEVICE PACKAGEFebruary 2024April 2025Allow1411NoNo
18438633IMAGING DEVICE COMPRISING NET SHAPE WIRINGFebruary 2024June 2025Allow1720NoNo
18427575LOW THERMAL BUDGET DIELECTRIC FOR SEMICONDUCTOR DEVICESJanuary 2024September 2025Allow1920NoNo
18420767SEMICONDUCTOR PACKAGEJanuary 2024November 2024Allow1010NoNo
18413057MEMORY DEVICEJanuary 2024August 2024Allow700NoNo
18412605SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2024August 2024Allow700NoNo
18406403Semiconductor Package Using A Coreless Signal Distribution StructureJanuary 2024February 2025Allow1310NoNo
18406745THREE-DIMENSIONAL MEMORY DEVICESJanuary 2024June 2025Allow1800NoNo
18405134MULTI-LAYER TRENCH CAPACITOR STRUCTUREJanuary 2024November 2024Allow1010NoNo
18405040SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAMEJanuary 2024April 2025Allow1521NoNo
18398162PLASMA PROCESSING SYSTEM AND EDGE RING REPLACEMENT METHODDecember 2023April 2025Allow1620NoNo
18398589LOW STRESS ASYMMETRIC DUAL SIDE MODULEDecember 2023March 2025Allow1410NoNo
18398499LOW STRESS ASYMMETRIC DUAL SIDE MODULEDecember 2023March 2025Allow1410NoNo
18398114QUANTUM DOT STRUCTURE AND METHOD OF PRODUCING A QUANTUM DOT STRUCTUREDecember 2023January 2026Abandon2441NoNo
18396753SEMICONDUCTOR DEVICE WITH VOLTAGE RESISTANT STRUCTUREDecember 2023June 2025Allow1710YesNo
18395662SEMICONDUCTOR DEVICE AND MANUFACTURING METHODDecember 2023July 2024Allow700NoNo
18395617SEMICONDUCTOR PACKAGES AND MANUFACTURING METHODS THEREOFDecember 2023December 2024Allow1210NoNo
18395110MULTILAYER CAPACITOR ELECTRODEDecember 2023October 2024Allow1010NoNo
18543799Semiconductor Device and MethodDecember 2023March 2025Allow1530YesNo
18537236SPLIT SOURCE DRAIN TRANSISTORDecember 2023March 2025Allow1510NoNo
18535497DISPLAY APPARATUS AND METHOD OF FABRICATING THE SAMEDecember 2023June 2025Allow1810NoNo
18533072Nanosheet FET with Controlled Overlay MarkDecember 2023March 2026Allow2700NoNo
18532975SCALABLE MPS DEVICE BASED ON SICDecember 2023October 2024Allow1010NoNo
18528748METHOD OF FABRICATING SEMICONDUCTOR DEVICEDecember 2023November 2024Allow1110NoNo
18526062Semiconductor Structure Cutting Process and Structures Formed TherebyDecember 2023June 2024Allow700NoNo
18526663THREE-DIMENSIONAL MEMORY DEVICE AND METHODDecember 2023March 2025Allow1600NoNo
18520346REDUCING PARASITIC CAPACITANCE IN SEMICONDUCTOR DEVICESNovember 2023December 2025Allow2510NoNo
18519460INTEGRATED CIRCUIT DEVICENovember 2023December 2024Allow1310NoNo
18515619HALL EFFECT SENSOR WITH LOW OFFSET AND HIGH LEVEL OF STABILITYNovember 2023November 2024Allow1110NoNo
18514060SEMICONDUCTOR DEVICE WITH ELECTRODE HAVING STEP-SHAPED SIDEWALL AND METHOD FOR PREPARING THE SAMENovember 2023February 2026Allow2700NoNo
18513942ROUGH BUFFER LAYER FOR GROUP III-V DEVICES ON SILICONNovember 2023May 2025Allow1811YesNo
18513853SEMICONDUCTOR DEVICE INCLUDING AN ACTIVE PATTERNNovember 2023February 2026Allow2700NoNo
18513042ELECTRONIC DEVICES AND METHODS OF MANUFACTURING THE SAMENovember 2023September 2024Allow1010NoNo
18513431MOLDED DIRECT BONDED AND INTERCONNECTED STACKNovember 2023October 2024Allow1110NoNo
18512096TRENCH PATTERN FOR TRENCH CAPACITOR YIELD IMPROVEMENTNovember 2023September 2024Allow1010NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2815.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
191
Examiner Affirmed
133
(69.6%)
Examiner Reversed
58
(30.4%)
Reversal Percentile
39.3%
Lower than average

What This Means

With a 30.4% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
888
Allowed After Appeal Filing
252
(28.4%)
Not Allowed After Appeal Filing
636
(71.6%)
Filing Benefit Percentile
28.3%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 28.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Art Unit 2815 - Prosecution Statistics Summary

Executive Summary

Art Unit 2815 is part of Group 2810 in Technology Center 2800. This art unit has examined 17,683 patent applications in our dataset, with an overall allowance rate of 75.4%. Applications typically reach final disposition in approximately 28 months.

Comparative Analysis

Art Unit 2815's allowance rate of 75.4% places it in the 46% percentile among all USPTO art units. This art unit has a below-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2815 receive an average of 1.99 office actions before reaching final disposition (in the 58% percentile). The median prosecution time is 28 months (in the 66% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more challenging examination environment compared to the USPTO average.
  • With more office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.