USPTO Examiner LEE EUGENE - Art Unit 2815

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18733945MULTI-TIER DEEP TRENCH CAPACITOR AND METHODS OF FORMING THE SAMEJune 2024December 2025Allow1811NoNo
18664656HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOFMay 2024February 2025Allow920NoNo
18645366MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEApril 2024January 2025Allow910NoNo
18625547SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEApril 2024February 2025Allow1010NoNo
18595569LOW STRESS ASYMMETRIC DUAL SIDE MODULEMarch 2024March 2025Allow1210NoNo
18592704LOW STRESS ASYMMETRIC DUAL SIDE MODULEMarch 2024March 2025Allow1210NoNo
18581813SEMICONDUCTOR DEVICE WITH CONDUCTIVE LAYERS HAVING DIFFERENT PATTERN DENSITIES AND METHOD FOR FABRICATING THE SAMEFebruary 2024March 2026Abandon2540NoNo
18440915SEMICONDUCTOR DEVICE PACKAGEFebruary 2024April 2025Allow1411NoNo
18398589LOW STRESS ASYMMETRIC DUAL SIDE MODULEDecember 2023March 2025Allow1410NoNo
18398499LOW STRESS ASYMMETRIC DUAL SIDE MODULEDecember 2023March 2025Allow1410NoNo
18508581METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURENovember 2023September 2024Allow1010NoNo
18505058DISPLAY DEVICE HAVING CONNECTION UNITNovember 2023January 2025Allow1420YesNo
18372546STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH SUBSTRATE HEAT SINKS AND ASSOCIATED SYSTEMS AND METHODSSeptember 2023September 2024Allow1211NoNo
18474168PACKAGE STRUCTURESeptember 2023August 2024Allow1110NoNo
18551372PHOTODETECTION DEVICE AND ELECTRONIC DEVICESeptember 2023December 2025Allow2700NoNo
18551374Buried Seam with Kirigami Pattern for 3D Micro LED DisplaySeptember 2023December 2025Allow2700NoNo
18459793SEMICONDUCTOR LIGHT-EMITTING DEVICESeptember 2023August 2024Allow1210NoNo
18454413SEMICONDUCTOR DEVICEAugust 2023August 2024Allow1210NoNo
18235104Protector Cap for Package with Thermal Interface MaterialAugust 2023August 2024Allow1210NoNo
18234695ELECTRONIC MODULE, MANUFACTURING METHOD THEREOF AND ELECTRONIC PACKAGE HAVING THE SAMEAugust 2023July 2024Allow1110NoNo
18446755MOBILITY ENHANCEMENT BY SOURCE AND DRAIN STRESS LAYER OR IMPLANTATION IN THIN FILM TRANSISTORSAugust 2023February 2025Allow1821YesNo
18231254METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTUREAugust 2023December 2025Allow2811NoNo
18446382METHOD OF MANUFACTURING LIGHT EMITTING DEVICEAugust 2023February 2025Allow1811NoNo
18230174METHOD FOR PHYSICALLY UNCLONABLE FUNCTION THROUGH GATE HEIGHT TUNINGAugust 2023January 2026Allow2910NoNo
18364217PACKAGE STRUCTUREAugust 2023March 2026Allow3111NoNo
18227233THIN FILM TRANSISTORS HAVING DOUBLE GATESJuly 2023June 2024Allow1101NoNo
18357471Thin Film Transfer Using Substrate with Etch Stop Layer and Diffusion Barrier LayerJuly 2023March 2025Allow2021NoNo
18340873SEMICONDUCTOR STRUCTURES AND METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTUREJune 2023March 2026Allow3211NoNo
18339325MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS HAVING A COMMON ELECTRODEJune 2023September 2025Allow2700NoNo
18331749SEMICONDUCTOR DEVICEJune 2023March 2026Abandon3310NoNo
18207309Anti-Fuse Device by Ferroelectric CharacteristicJune 2023March 2026Abandon3310NoNo
18327112SEMICONDUCTOR DIE HAVING A SODIUM STOPPER IN AN INSULATION LAYER GROOVE AND METHOD OF MANUFACTURING THE SAMEJune 2023September 2024Allow1621NoNo
18327030SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAMEMay 2023September 2024Allow1611NoNo
18254412SEMICONDUCTOR MODULEMay 2023August 2025Allow2700NoNo
18311780SIC SEMICONDUCTOR DEVICE WITH CURRENT SENSING CAPABILITYMay 2023February 2025Allow2120NoNo
18306006Image Sensor and Method of Fabricating SameApril 2023March 2025Allow2221YesNo
18302769INTEGRATED CIRCUIT DEVICE WITH HIGH MOBILITY AND SYSTEM OF FORMING THE INTEGRATED CIRCUITApril 2023June 2024Allow1411NoNo
18193776ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICEMarch 2023December 2025Allow3211NoNo
18028182THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF AND CIRCUITMarch 2023February 2026Allow3411NoNo
18186481SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEMarch 2023September 2025Allow3001NoNo
18182390MICRO LIGHT-EMITTING DIODE DEVICEMarch 2023July 2025Allow2800NoNo
17910323DISPLAY DEVICEFebruary 2023January 2026Allow4020NoNo
18173455LIGHT EMITTING DEVICE AND LIGHTING APPARATUS USING THE SAMEFebruary 2023September 2025Allow3101NoNo
18105226SEMICONDUCTOR DEVICEFebruary 2023July 2025Allow2911NoNo
18019083SUPER JUNCTION SEMICONDUCTOR POWER DEVICEJanuary 2023September 2025Allow3110NoNo
18004763LIGHT-EMITTING DEVICE AND DISPLAY APPARATUSJanuary 2023October 2025Allow3311NoNo
18150247ISOLATION STRUCTURE WITH MULTIPLE COMPONENTS TO INCREASE IMAGE SENSOR PERFORMANCEJanuary 2023September 2025Allow3301NoNo
18088144Quantum Processor Design to Increase Control FootprintDecember 2022January 2024Allow1310NoNo
18085930Body-Source-Tied TransistorDecember 2022November 2025Allow3561NoNo
18085177SEMICONDUCTOR DEVICEDecember 2022November 2025Allow3510NoNo
17964375SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICEOctober 2022January 2024Allow1510NoNo
17929898LOW STRESS ASYMMETRIC DUAL SIDE MODULESeptember 2022December 2023Allow1520NoNo
17929884LOW STRESS ASYMMETRIC DUAL SIDE MODULESeptember 2022December 2023Allow1520NoNo
17903006DISPLAY APPARATUSSeptember 2022January 2024Allow1611NoNo
17823149LOW STRESS ASYMMETRIC DUAL SIDE MODULEAugust 2022September 2023Allow1310NoNo
17823164LOW STRESS ASYMMETRIC DUAL SIDE MODULEAugust 2022September 2023Allow1310NoNo
17896211SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEAugust 2022December 2023Allow1510NoNo
17893543SEMICONDUCTOR DEVICEAugust 2022June 2024Allow2111NoNo
17817222SEMICONDUCTOR LAYOUT STRUCTURE AND SEMICONDUCTOR TEST STRUCTUREAugust 2022February 2026Allow4311NoNo
17816599STRUCTURE FOR RADIO FREQUENCY APPLICATIONSAugust 2022July 2025Allow3511NoNo
17873124WAVELENGTH CONVERSION COMPONENTJuly 2022November 2023Allow1611NoNo
17863925METHOD FOR MANUFACTURING BODY-SOURCE-TIED SOI TRANSISTORJuly 2022June 2023Allow1110NoNo
17791596COOLING DEVICEJuly 2022August 2025Allow3710NoNo
17857166SEMICONDUCTOR PACKAGE, INTEGRATED OPTICAL COMMUNICATION SYSTEMJuly 2022June 2023Allow1211YesNo
17852327LIGHT EMITTING DEVICEJune 2022May 2023Allow1010NoNo
17847006SOI Structures with Carbon in Body Regions for Improved RF-SOI SwitchesJune 2022October 2025Allow4021NoNo
17807930MODULEJune 2022January 2026Abandon4321YesNo
17845715SEMICONDUCTOR DEVICE COMPRISING A LATERAL SUPER JUNCTION FIELD EFFECT TRANSISTORJune 2022July 2024Allow2521NoNo
17840636INTEGRATED FAN-OUT (INFO) PACKAGE STRUCTUREJune 2022May 2024Allow2321YesNo
17806282SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SEMICONDUCTOR MEMORY DEVICE MANUFACTURING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND SUBSTRATE TREATMENT APPARATUSJune 2022November 2024Allow3001NoNo
17830291Power Module with Multi-Layer Substrate and Second Insulation Layer to Increase Power DensityJune 2022May 2025Allow3511NoNo
17756576SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAMEMay 2022May 2025Allow3611NoNo
17752642MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE HAVING ELASTIC MEMBER WITHIN VIAMay 2022October 2024Allow2900NoNo
17749623SUBSTRATE INCLUDING BRIDGE AND ELECTRONIC DEVICEMay 2022October 2025Allow4111NoNo
17748863Asymmetric Halo-Implant Body-Source-Tied Semiconductor-On-Insulator (SOI) DeviceMay 2022January 2025Allow3211NoNo
17663931DISPLAY DEVICEMay 2022March 2025Allow3400NoNo
17776696SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICEMay 2022October 2025Allow4111NoNo
17735899LDMOS TRANSISTOR AND METHOD FOR MANUFACTURING THE SAMEMay 2022June 2023Allow1410NoNo
17735450SOI Structures Including an Indium Retrograde P-Well for Improved RF-SOI SwitchesMay 2022July 2023Abandon1501NoNo
17731099MOTHER PANEL FOR DISPLAY PANELApril 2022June 2025Allow3811NoNo
17772242SENSOR SEMICONDUCTOR PACKAGE, ARTICLE COMPRISING THE SAME AND MANUFACTURING METHOD THEREOFApril 2022December 2024Allow3211NoNo
17771565SEMICONDUCTOR DEVICEApril 2022April 2025Allow3521NoNo
17728298METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICEApril 2022October 2025Abandon4121NoNo
17711890DISPLAY DEVICE HAVING CONNECTION UNITApril 2022July 2023Allow1611NoNo
17707835METHOD AND SYSTEM FOR CONTROL OF SIDEWALL ORIENTATION IN VERTICAL GALLIUM NITRIDE FIELD EFFECT TRANSISTORSMarch 2022October 2024Allow3101NoNo
17764856SEMICONDUCTOR ENCAPSULATION METHOD AND SEMICONDUCTOR ENCAPSULATION STRUCTUREMarch 2022December 2025Allow4531NoNo
17764335DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE, WEARABLE DEVICE, AND DISPLAY METHODMarch 2022December 2025Allow4521NoNo
17703400SUBSTRATE FOR IMPROVED HEAT DISSIPATION AND METHODMarch 2022October 2025Allow4310NoNo
17697141THREE-DIMENSIONAL STACKING SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAMEMarch 2022October 2024Allow3131YesNo
17672241SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICEFebruary 2022August 2024Allow3001NoNo
17670174SEMICONDUCTOR PACKAGES WITH INCREASED POWER HANDLINGFebruary 2022October 2024Allow3221NoNo
17668824SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAMEFebruary 2022January 2025Allow3501NoNo
17669306CURRENT-DISTRIBUTING PIN STRUCTURE AND METHOD OF FORMING SAMEFebruary 2022June 2025Allow4011NoNo
17650389SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTUREFebruary 2022October 2025Abandon4421NoNo
17632209SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS THEREOFFebruary 2022August 2024Allow3001NoNo
17585777IMAGE SENSORJanuary 2022April 2025Allow3811YesNo
17582220METHOD OF FORMING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTUREJanuary 2022July 2023Allow1711NoNo
17578383SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2022April 2024Allow2721NoNo
17577879STACKED MODULE ARRANGEMENTJanuary 2022June 2025Allow4121NoNo
17572858SEMICONDUCTOR PACKAGE HAVING A THERMALLY AND ELECTRICALLY CONDUCTIVE SPACERJanuary 2022October 2024Allow3311NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner LEE, EUGENE.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
18
Examiner Affirmed
13
(72.2%)
Examiner Reversed
5
(27.8%)
Reversal Percentile
43.8%
Lower than average

What This Means

With a 27.8% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
65
Allowed After Appeal Filing
25
(38.5%)
Not Allowed After Appeal Filing
40
(61.5%)
Filing Benefit Percentile
63.4%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 38.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner LEE, EUGENE - Prosecution Strategy Guide

Executive Summary

Examiner LEE, EUGENE works in Art Unit 2815 and has examined 1,135 patent applications in our dataset. With an allowance rate of 80.8%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 29 months.

Allowance Patterns

Examiner LEE, EUGENE's allowance rate of 80.8% places them in the 51% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by LEE, EUGENE receive 2.11 office actions before reaching final disposition. This places the examiner in the 56% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by LEE, EUGENE is 29 months. This places the examiner in the 65% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +6.8% benefit to allowance rate for applications examined by LEE, EUGENE. This interview benefit is in the 35% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 27.9% of applications are subsequently allowed. This success rate is in the 49% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 27.3% of cases where such amendments are filed. This entry rate is in the 38% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 115.4% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 81% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 70.0% of appeals filed. This is in the 56% percentile among all examiners. Of these withdrawals, 52.4% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 28.9% are granted (fully or in part). This grant rate is in the 16% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 7.1% of allowed cases (in the 89% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 7.0% of allowed cases (in the 85% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.