USPTO Art Unit 2811 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19247934METHODS TO PROCESS 3D SEMICONDUCTOR DEVICES AND STRUCTURES WHICH HAVE METAL LAYERSJune 2025March 2026Allow900NoNo
19075303SEMICONDUCTOR DEVICE AND MOUNTING SUBSTRATEMarch 2025January 2026Allow1021NoNo
189590333D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERSNovember 2024June 2025Allow700NoNo
18915352SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CHANNEL AND SELF-ALIGNED CONTACT REGION, AND METHOD OF PREPARING THE SAMEOctober 2024August 2025Allow1021YesNo
18907734SEMICONDUCTOR DEVICEOctober 2024October 2025Allow1220NoNo
18887821ELECTRICAL CONTACT CAVITY STRUCTURE AND METHODS OF FORMING THE SAMESeptember 2024February 2025Allow510YesNo
18823093Backside Integrated Voltage Regulator For Integrated CircuitsSeptember 2024November 2024Allow210NoNo
18834167LOW-POWER WAVEFORM CONTROLLERS FOR SUPERCONDUCTING AND SPIN QUANTUM BITSJuly 2024October 2025Allow1511NoNo
187863723D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC CIRCUITS, MEMORY CELLS, AND PROCESSOR ARRAYJuly 2024November 2025Allow1510YesNo
18776445MEMORY CELL WITH MAGNETIC ACCESS SELECTOR APPARATUSJuly 2024November 2025Allow1600NoNo
18774254SOT MRAM HAVING DIELECTRIC INTERFACIAL LAYER AND METHOD FORMING SAMEJuly 2024September 2025Allow1410NoNo
18773203SEMICONDUCTOR DEVICE FOR A LOW-LOSS ANTENNA SWITCHJuly 2024August 2025Allow1311NoNo
18770678MAGNETIC TUNNEL JUNCTION (MTJ) ELEMENT AND ITS FABRICATION PROCESSJuly 2024March 2025Allow800NoNo
18766644TRANSISTOR, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOFJuly 2024April 2025Allow900NoNo
18764426THREE-STATE MEMORY DEVICEJuly 2024April 2025Allow1000YesNo
18758898SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTUREJune 2024June 2025Allow1110NoNo
18755693LAYOUT PATTERN OF MAGNETORESISTIVE RANDOM ACCESS MEMORYJune 2024March 2025Allow900NoNo
18754468Gate Structures For Semiconductor DevicesJune 2024August 2025Allow1310YesNo
18752906SEMICONDUCTOR DEVICES INCLUDING TWO-DIMENSIONAL MATERIAL AND METHODS OF FABRICATION THEREOFJune 2024October 2025Allow1620NoNo
18753052CHIP STRUCTURE WITH CONDUCTIVE LAYERJune 2024May 2025Allow1010NoNo
18752381SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2024March 2025Allow910NoNo
18752321Circuit Structure with Gate ConfigurationJune 2024July 2025Allow1210YesNo
18752112Self-Aligned Metal Gate for Multigate DeviceJune 2024May 2025Allow1110NoNo
18752182SEMICONDUCTOR DEVICEJune 2024January 2026Allow1920NoNo
18749014FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEJune 2024March 2025Allow910NoNo
18748127ELECTRONIC COMPONENT AND SEMICONDUCTOR DEVICEJune 2024February 2026Allow1921YesNo
18746288SEMICONDUCTOR DEVICES WITH BACKSIDE POWER RAIL AND BACKSIDE SELF-ALIGNED VIAJune 2024May 2025Allow1110NoNo
18746495DISPLAY PANEL AND DISPLAY DEVICEJune 2024August 2025Allow1411YesNo
18745029SEMICONDUCTOR DEVICE STRUCTURE WITH BACKSIDE CONTACTJune 2024May 2025Allow1110NoNo
18743135DIODE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOFJune 2024March 2025Allow900NoNo
18742480SEMICONDUCTOR DEVICE AND METHODJune 2024January 2026Allow2020NoNo
18742126MULTI-LAYER CHANNEL STRUCTURES AND METHODS OF FABRICATING THE SAME IN FIELD-EFFECT TRANSISTORSJune 2024August 2025Allow1420NoNo
18741987Semiconductor Devices Including Backside Vias and Methods of Forming the SameJune 2024January 2025Allow700NoNo
18741356SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2024August 2025Allow1420NoNo
18739519Gate Structures For Semiconductor DevicesJune 2024May 2025Allow1110YesNo
18740024INTEGRATED CIRCUIT AND METHOD FOR FORMING THE SAMEJune 2024July 2025Allow1310NoNo
18738390Semiconductor Structure with Staggered Selective GrowthJune 2024May 2025Allow1210NoNo
18739101POWER MODULE AND FABRICATION METHOD OF THE SAME, GRAPHITE PLATE, AND POWER SUPPLY EQUIPMENTJune 2024July 2025Abandon1310NoNo
18737616INTEGRATED CIRCUIT STRUCTURES INCLUDING A TITANIUM SILICIDE MATERIALJune 2024May 2025Allow1110NoNo
18736589SEMICONDUCTOR STRUCTUREJune 2024April 2025Allow1110NoNo
18736428PLUG AND RECESS PROCESS FOR DUAL METAL GATE ON STACKED NANORIBBON DEVICESJune 2024July 2025Allow1310NoNo
18731494MAGNETIC DEVICE STRUCTURE AND METHODS OF FORMING THE SAMEJune 2024August 2025Allow1410NoNo
18679459NANOWIRE TRANSISTOR AND METHOD FOR FABRICATING THE SAMEMay 2024January 2025Allow810NoNo
18679004SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFMay 2024January 2025Allow800NoNo
18678227GATE STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAMEMay 2024January 2026Allow2030NoNo
18679375ELECTRONIC DEVICEMay 2024April 2025Allow1010NoNo
18678251EMBEDDED SEMICONDUCTOR PACKAGES AND METHODS THEREOFMay 2024March 2025Allow900YesNo
18677372ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICESMay 2024August 2025Allow1410YesNo
18676056Integrated Assemblies and Methods of Forming Integrated AssembliesMay 2024March 2025Allow1010NoNo
18674889SEMICONDUCTOR DEVICEMay 2024December 2024Allow700NoNo
18673960SEMICONDUCTOR DEVICE FABRICATION METHODS AND STRUCTURES THEREOFMay 2024April 2025Allow1110NoNo
18674681ELECTRONIC DEVICE AND DISPLAY DEVICE USING THE SAMEMay 2024September 2025Allow1610NoNo
18672218GAP-INSULATED SEMICONDUCTOR DEVICEMay 2024April 2025Allow1110NoNo
18670123SEMICONDUCTOR DEVICE HAVING FINS AND METHOD OF FABRICATING THE SAMEMay 2024April 2025Allow1110YesNo
18669170NANOWIRE TRANSISTOR FABRICATION WITH HARDMASK LAYERSMay 2024September 2025Allow1620NoNo
18669199EFFECTIVE WORK FUNCTION TUNING VIA SILICIDE INDUCED INTERFACE DIPOLE MODULATION FOR METAL GATESMay 2024April 2025Allow1110NoNo
18669052AIR GAP IN INNER SPACERS AND METHODS OF FABRICATING THE SAME IN FIELD-EFFECT TRANSISTORSMay 2024January 2025Allow800NoNo
18669378SEMICONDUCTOR DEVICE FOR A LOW-LOSS ANTENNA SWITCHMay 2024August 2025Allow1511NoNo
18666322SELECTIVE DUAL SILICIDE FORMATIONMay 2024December 2024Allow700NoNo
18665572TRANSISTOR, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF TRANSISTORMay 2024December 2024Allow700NoNo
18665600SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEMay 2024January 2025Allow800NoNo
18664222SEMICONDUCTOR STRUCTUREMay 2024March 2025Allow1010NoNo
18661741SEMICONDUCTOR DEVICE STRUCTUREMay 2024March 2025Allow1010NoNo
18662544SEMICONDUCTOR DEVICEMay 2024June 2025Allow1320YesNo
18658006CHIP PACKAGE STRUCTURE INCLUDING A SILICON SUBSTRATE INTERPOSER AND METHODS FOR FORMING THE SAMEMay 2024January 2026Allow2121YesNo
18655832FinFET Device and MethodMay 2024May 2025Allow1310YesNo
18655973Source/Drain Contacts and Methods of Forming SameMay 2024March 2025Allow1010NoNo
18656033High Selectivity Etching With Germanium-Containing GasesMay 2024September 2025Allow1720YesNo
18654766SEMICONDUCTOR DEVICE AND METHODMay 2024August 2025Allow1510NoNo
18651757Structure and Formation Method of Semiconductor Device StructureMay 2024November 2025Allow1830NoNo
18652079Assemblies having Conductive Interconnects which are Laterally and Vertically Offset Relative to One AnotherMay 2024June 2025Allow1420NoNo
18652803SEMICONDUCTOR STRUCTURE WITH A LAMINATED LAYERMay 2024July 2025Allow1410NoNo
18650157METALLIZATION LAYER AND FABRICATION METHODApril 2024June 2025Allow1310NoNo
18648876METHODS FOR FORMING MULTI-GATE TRANSISTORSApril 2024March 2025Allow1110NoNo
18650026SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOFApril 2024December 2025Allow1920NoNo
18650067DISPLAY DEVICEApril 2024August 2025Allow1520NoNo
18646773SEMICONDUCTOR DEVICE WITH MULTICHANNEL HETEROSTRUCTURE AND MANUFACTURING METHOD THEREOFApril 2024April 2025Allow1110NoNo
18644664BACK-END-OF-LINE SELECTOR FOR MEMORY DEVICEApril 2024July 2025Allow1420YesNo
18638997SEMICONDUCTOR DEVICEApril 2024June 2025Allow1410NoNo
18638859SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOFApril 2024August 2025Allow1610NoNo
18638337NITRIDE SEMICONDUCTOR DEVICEApril 2024February 2025Allow1010NoNo
18636217SEMICONDUCTOR DEVICE, FINFET DEVICE AND METHODS OF FORMING THE SAMEApril 2024February 2025Allow1010NoNo
18635378SEMICONDUCTOR DEVICE STRUCTURE WITH STACKED CONDUCTIVE PLUGS AND METHOD FOR PREPARING THE SAMEApril 2024January 2025Allow910NoNo
18634620SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUSApril 2024April 2025Allow1200YesNo
18633722SEMICONDUCTOR DEVICEApril 2024December 2025Allow2040YesNo
18634782INTEGRATED CIRCUIT WITH BACKSIDE POWER RAIL AND BACKSIDE INTERCONNECTApril 2024May 2025Allow1310NoNo
18633002SEMICONDUCTOR DEVICESApril 2024March 2025Allow1110NoNo
18632712RFSOI SEMICONDUCTOR STRUCTURES INCLUDING A NITROGEN-DOPED CHARGE-TRAPPING LAYER AND METHODS OF MANUFACTURING THE SAMEApril 2024July 2025Allow1510YesNo
18630549FIN FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING THE SAMEApril 2024March 2025Allow1110NoNo
18628933ARRAY SUBSTRATE AND DISPLAY APPARATUSApril 2024January 2025Allow1010NoNo
18629002CAPACITANCE REDUCTION FOR BACK-SIDE POWER RAIL DEVICEApril 2024February 2026Allow2230NoNo
18627362Semiconductor Structures and Manufacturing Methods ThereofApril 2024January 2025Allow921YesNo
18625282SEMICONDUCTOR DEVICE HAVING NANOSHEET TRANSISTOR AND METHODS OF FABRICATION THEREOFApril 2024April 2025Allow1210YesNo
18626145SEMICONDUCTOR APPARATUS AND EQUIPMENTApril 2024April 2025Allow1310NoNo
18624983SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICEApril 2024June 2025Allow1410NoNo
18623143MULTI-GATE DEVICES AND FABRICATING THE SAME WITH ETCH RATE MODULATIONApril 2024January 2025Allow1010NoNo
18623390ISOLATION STRUCTURES IN MULTI-GATE SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAMEApril 2024February 2025Allow1110NoNo
18623885MULTI-GATE DEVICE STRUCTUREApril 2024October 2025Allow1830NoNo
18619633Selective Formation Of Titanium Silicide And Titanium Nitride By Hydrogen Gas ControlMarch 2024September 2025Allow1711YesNo
18614718ELECTRONIC DEVICEMarch 2024March 2025Allow1110NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2811.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
230
Examiner Affirmed
151
(65.7%)
Examiner Reversed
79
(34.3%)
Reversal Percentile
60.4%
Higher than average

What This Means

With a 34.3% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
937
Allowed After Appeal Filing
283
(30.2%)
Not Allowed After Appeal Filing
654
(69.8%)
Filing Benefit Percentile
38.1%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 30.2% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Art Unit 2811 - Prosecution Statistics Summary

Executive Summary

Art Unit 2811 is part of Group 2810 in Technology Center 2800. This art unit has examined 17,790 patent applications in our dataset, with an overall allowance rate of 75.8%. Applications typically reach final disposition in approximately 27 months.

Comparative Analysis

Art Unit 2811's allowance rate of 75.8% places it in the 48% percentile among all USPTO art units. This art unit has a below-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2811 receive an average of 1.99 office actions before reaching final disposition (in the 58% percentile). The median prosecution time is 27 months (in the 70% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more challenging examination environment compared to the USPTO average.
  • With more office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.