USPTO Examiner ENAD CHRISTINE A - Art Unit 2811

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
187863723D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC CIRCUITS, MEMORY CELLS, AND PROCESSOR ARRAYJuly 2024November 2025Allow1510YesNo
18752381SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2024March 2025Allow910NoNo
18749014FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEJune 2024March 2025Allow910NoNo
18742480SEMICONDUCTOR DEVICE AND METHODJune 2024January 2026Allow2020NoNo
18739519Gate Structures For Semiconductor DevicesJune 2024May 2025Allow1110YesNo
18737616INTEGRATED CIRCUIT STRUCTURES INCLUDING A TITANIUM SILICIDE MATERIALJune 2024May 2025Allow1110NoNo
18736589SEMICONDUCTOR STRUCTUREJune 2024April 2025Allow1110NoNo
18679004SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFMay 2024January 2025Allow800NoNo
18678227GATE STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAMEMay 2024January 2026Allow2030NoNo
18677372ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICESMay 2024August 2025Allow1410YesNo
18670123SEMICONDUCTOR DEVICE HAVING FINS AND METHOD OF FABRICATING THE SAMEMay 2024April 2025Allow1110YesNo
18666322SELECTIVE DUAL SILICIDE FORMATIONMay 2024December 2024Allow700NoNo
18655832FinFET Device and MethodMay 2024May 2025Allow1310YesNo
18654766SEMICONDUCTOR DEVICE AND METHODMay 2024August 2025Allow1510NoNo
18648876METHODS FOR FORMING MULTI-GATE TRANSISTORSApril 2024March 2025Allow1110NoNo
18650026SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOFApril 2024December 2025Allow1920NoNo
18636217SEMICONDUCTOR DEVICE, FINFET DEVICE AND METHODS OF FORMING THE SAMEApril 2024February 2025Allow1010NoNo
18633722SEMICONDUCTOR DEVICEApril 2024December 2025Allow2040YesNo
18634782INTEGRATED CIRCUIT WITH BACKSIDE POWER RAIL AND BACKSIDE INTERCONNECTApril 2024May 2025Allow1310NoNo
18628933ARRAY SUBSTRATE AND DISPLAY APPARATUSApril 2024January 2025Allow1010NoNo
18623143MULTI-GATE DEVICES AND FABRICATING THE SAME WITH ETCH RATE MODULATIONApril 2024January 2025Allow1010NoNo
18600403SEMICONDUCTOR DEVICEMarch 2024October 2024Allow810NoNo
18597952SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAMEMarch 2024February 2026Allow2321YesNo
18595069LIGHTING EMITTING STACKED STRUCTURE AND DISPLAY DEVICE HAVING THE SAMEMarch 2024July 2025Allow1620NoNo
18594073LOW RESISTANCE FILL METAL LAYER MATERIAL AS STRESSOR IN METAL GATESMarch 2024April 2025Allow1320NoNo
18439859METHOD FOR FORMING LONG CHANNEL BACK-SIDE POWER RAIL DEVICEFebruary 2024March 2025Allow1411NoNo
18434028SEMICONDUCTOR DEVICE STRUCTURE WITH METAL GATE STACKFebruary 2024February 2025Allow1210NoNo
18433217INTEGRATED CIRCUIT DEVICE WITH SOURCE/DRAIN BARRIERFebruary 2024January 2025Allow1210NoNo
18429734SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAMEFebruary 2024January 2025Allow1210NoNo
18415863SEMICONDUCTOR DEVICEJanuary 2024September 2024Allow800NoNo
18416737SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOFJanuary 2024February 2025Allow1310NoNo
18409398FIN FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING THE SAMEJanuary 2024January 2025Allow1210NoNo
18408438METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICESJanuary 2024April 2025Allow1620NoNo
18402245Dummy Fin with Reduced Height and Method Forming SameJanuary 2024January 2025Allow1210NoNo
18401866Transistor Gates and Methods of Forming ThereofJanuary 2024April 2025Allow1520YesNo
18400951HIGH-K GATE DIELECTRICDecember 2023July 2025Allow1930NoNo
18395762MAGNETORESISTIVE RANDOM ACCESS MEMORYDecember 2023September 2024Allow910NoNo
18394881SIGNAL TRANSMISSION DEVICEDecember 2023March 2026Allow2700NoNo
18521107Fin Field-Effect Transistor Device and Method of Forming the SameNovember 2023January 2025Allow1420YesNo
18519714SEMICONDUCTOR DEVICE CONTACT STRUCTURES AND METHODS OF FABRICATING THEREOFNovember 2023August 2025Allow2130YesNo
18518670SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFNovember 2023March 2025Allow1610NoNo
18518162SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFNovember 2023March 2025Allow1620NoNo
18515912BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGYNovember 2023November 2024Allow1210NoNo
18512125MULTI-LAYER LINE STRUCTURENovember 2023November 2024Allow1210NoNo
18499650IN-SITU FORMATION OF METAL GATE MODULATORSNovember 2023August 2024Allow1010NoNo
18499091METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYSOctober 2023July 2024Allow910NoNo
18494759MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEOctober 2023January 2025Allow1420YesNo
18382339CONTACT OVER ACTIVE GATE STRUCTURES WITH METAL OXIDE-CAPED CONTACTS TO INHIBIT SHORTINGOctober 2023May 2024Allow700NoNo
18448188SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAMEAugust 2023November 2025Allow2710NoNo
18447932SEMICONDUCTOR STRUCTUREAugust 2023September 2024Allow1410NoNo
18447407STRUCTURE AND METHOD FOR GATE-ALL-AROUND METAL-OXIDE-SEMICONDUCTOR DEVICES WITH IMPROVED CHANNEL CONFIGURATIONSAugust 2023October 2024Allow1420NoNo
18447489SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTUREAugust 2023August 2024Allow1210YesNo
18232272Core-Shell Nanostructures For Semiconductor DevicesAugust 2023February 2025Allow1821YesNo
18447006NANOSHEET DEVICE WITH DIPOLE DIELECTRIC LAYER AND METHODS OF FORMING THE SAMEAugust 2023July 2024Allow1110NoNo
18446185METHOD OF FORMING EPITAXIAL FEATURESAugust 2023April 2024Allow800NoNo
18366871GATE STRUCTURE AND METHOD OF FORMING SAMEAugust 2023May 2025Allow2130YesNo
18230419SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAMEAugust 2023August 2024Allow1210YesNo
18227979SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAMEJuly 2023March 2026Allow3120NoNo
18362749SEMICONDUCTOR DEVICE AND METHODJuly 2023July 2024Allow1210YesNo
18226780LIGHT EMITTING STACKED STRUCTURE AND DISPLAY DEVICE HAVING THE SAMEJuly 2023November 2024Allow2220NoNo
18359225ETCH SELECTIVITY CONTROL FOR EPITAXY PROCESS WINDOW ENLARGEMENT IN SEMICONDUCTOR DEVICESJuly 2023September 2024Allow1410YesNo
18358476Multi-Layer Photo Etching Mask Including Organic and Inorganic MaterialsJuly 2023December 2024Allow1620NoNo
18358066Negative-Capacitance Field Effect TransistorJuly 2023March 2024Allow800NoNo
18358552METHOD OF FORMING 3D STACKED COMPUTE AND MEMORY WITH COPPER PILLARSJuly 2023December 2024Allow1620NoNo
18358010METHOD FOR FORMING SEMICONDUCTOR STRUCTUREJuly 2023March 2024Allow700NoNo
18357832DIELECTRIC FIN STRUCTUREJuly 2023October 2024Allow1520NoNo
18357796METAL GATE STACKS AND METHODS OF FABRICATING THE SAME IN MULTI-GATE FIELD-EFFECT TRANSISTORSJuly 2023May 2025Allow2221NoNo
18357345VERTICALLY-ORIENTED COMPLEMENTARY TRANSISTORJuly 2023March 2024Allow700NoNo
18356541SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTUREJuly 2023August 2024Allow1310YesNo
18225028METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONSJuly 2023November 2025Allow2741YesNo
18354995Dummy Gate Cutting Process and Resulting Gate StructuresJuly 2023September 2024Allow1420NoNo
18352230SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAMEJuly 2023October 2024Allow1510NoNo
18350742SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAMEJuly 2023March 2026Allow3210YesNo
18349486INPUT/OUTPUT DEVICESJuly 2023August 2024Allow1310NoNo
18347813SELF-ALIGNED PATTERNING LAYER FOR METAL GATE FORMATIONJuly 2023September 2025Allow2600NoNo
18344571SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFJune 2023February 2024Allow810NoNo
18344554FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEJune 2023April 2024Allow1010NoNo
18343399SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAMEJune 2023May 2024Allow1110NoNo
18340463SEMICONDUCTOR DEVICE INCLUDING DIFFUSION BREAK STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR DEVICEJune 2023February 2026Allow3210NoNo
18337855FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEJune 2023August 2024Allow1410NoNo
18335637Semiconductor Device and Method of ManufactureJune 2023July 2024Allow1320NoNo
18204550SEMICONDUCTOR DEVICEJune 2023May 2024Allow1120YesNo
18325412SEMICONDUCTOR DEVICESMay 2023December 2025Allow3010YesNo
18322294SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFMay 2023March 2024Allow1010YesNo
18319999METHOD AND STRUCTURE FOR METAL GATE BOUNDARY ISOLATIONMay 2023October 2024Allow1721NoNo
18198944SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOFMay 2023May 2024Allow1220NoNo
18315204SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOFMay 2023August 2024Allow1520YesNo
181951503D-STACKED TRANSISTOR STRUCTURE WITH BARRIER LAYER BETWEEN UPPER GATE STRUCTURE AND LOWER GATE STRUCTUREMay 2023November 2025Allow3010YesNo
18314200Gate Structure of a Semiconductor Device and Method of Forming SameMay 2023July 2024Allow1411NoNo
18144309DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEMay 2023February 2026Allow3311YesNo
18311071SOURCE/DRAIN EPITAXIAL LAYERS FOR TRANSISTORSMay 2023July 2024Allow1520YesNo
18299831SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFApril 2023May 2024Allow1320NoNo
18180139METHOD AND STRUCTURE FOR METAL GATESMarch 2023May 2024Allow1420NoNo
18170440SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFFebruary 2023December 2025Allow3410NoNo
18167402FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAMEFebruary 2023October 2023Allow800NoNo
181064843D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC CIRCUITS AND MEMORY CELLSFebruary 2023July 2024Allow1710NoNo
18165502ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICEFebruary 2023March 2024Allow1320NoNo
18040505LIGHT-EMITTING SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICEFebruary 2023September 2025Allow3110NoNo
18104480SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOFFebruary 2023November 2025Allow3410NoNo
18099503INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOFJanuary 2023December 2025Allow3510NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner ENAD, CHRISTINE A.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
6
Examiner Affirmed
2
(33.3%)
Examiner Reversed
4
(66.7%)
Reversal Percentile
86.7%
Higher than average

What This Means

With a 66.7% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
9
Allowed After Appeal Filing
3
(33.3%)
Not Allowed After Appeal Filing
6
(66.7%)
Filing Benefit Percentile
53.1%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 33.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner ENAD, CHRISTINE A - Prosecution Strategy Guide

Executive Summary

Examiner ENAD, CHRISTINE A works in Art Unit 2811 and has examined 517 patent applications in our dataset. With an allowance rate of 91.9%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 21 months.

Allowance Patterns

Examiner ENAD, CHRISTINE A's allowance rate of 91.9% places them in the 77% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by ENAD, CHRISTINE A receive 1.86 office actions before reaching final disposition. This places the examiner in the 44% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by ENAD, CHRISTINE A is 21 months. This places the examiner in the 91% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a -0.1% benefit to allowance rate for applications examined by ENAD, CHRISTINE A. This interview benefit is in the 12% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 32.1% of applications are subsequently allowed. This success rate is in the 67% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 48.7% of cases where such amendments are filed. This entry rate is in the 73% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 40.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 37% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 53.8% of appeals filed. This is in the 25% percentile among all examiners. Of these withdrawals, 14.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 45.0% are granted (fully or in part). This grant rate is in the 38% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.2% of allowed cases (in the 52% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 2.1% of allowed cases (in the 69% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

    Relevant MPEP Sections for Prosecution Strategy

    • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
    • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
    • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
    • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
    • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
    • MPEP § 1214.07: Reopening prosecution after appeal

    Important Disclaimer

    Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

    No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

    Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

    Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.