Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18786372 | 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC CIRCUITS, MEMORY CELLS, AND PROCESSOR ARRAY | July 2024 | November 2025 | Allow | 15 | 1 | 0 | Yes | No |
| 18752381 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | June 2024 | March 2025 | Allow | 9 | 1 | 0 | No | No |
| 18749014 | FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME | June 2024 | March 2025 | Allow | 9 | 1 | 0 | No | No |
| 18742480 | SEMICONDUCTOR DEVICE AND METHOD | June 2024 | January 2026 | Allow | 20 | 2 | 0 | No | No |
| 18739519 | Gate Structures For Semiconductor Devices | June 2024 | May 2025 | Allow | 11 | 1 | 0 | Yes | No |
| 18737616 | INTEGRATED CIRCUIT STRUCTURES INCLUDING A TITANIUM SILICIDE MATERIAL | June 2024 | May 2025 | Allow | 11 | 1 | 0 | No | No |
| 18736589 | SEMICONDUCTOR STRUCTURE | June 2024 | April 2025 | Allow | 11 | 1 | 0 | No | No |
| 18679004 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | May 2024 | January 2025 | Allow | 8 | 0 | 0 | No | No |
| 18678227 | GATE STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAME | May 2024 | January 2026 | Allow | 20 | 3 | 0 | No | No |
| 18677372 | ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES | May 2024 | August 2025 | Allow | 14 | 1 | 0 | Yes | No |
| 18670123 | SEMICONDUCTOR DEVICE HAVING FINS AND METHOD OF FABRICATING THE SAME | May 2024 | April 2025 | Allow | 11 | 1 | 0 | Yes | No |
| 18666322 | SELECTIVE DUAL SILICIDE FORMATION | May 2024 | December 2024 | Allow | 7 | 0 | 0 | No | No |
| 18655832 | FinFET Device and Method | May 2024 | May 2025 | Allow | 13 | 1 | 0 | Yes | No |
| 18654766 | SEMICONDUCTOR DEVICE AND METHOD | May 2024 | August 2025 | Allow | 15 | 1 | 0 | No | No |
| 18648876 | METHODS FOR FORMING MULTI-GATE TRANSISTORS | April 2024 | March 2025 | Allow | 11 | 1 | 0 | No | No |
| 18650026 | SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF | April 2024 | December 2025 | Allow | 19 | 2 | 0 | No | No |
| 18636217 | SEMICONDUCTOR DEVICE, FINFET DEVICE AND METHODS OF FORMING THE SAME | April 2024 | February 2025 | Allow | 10 | 1 | 0 | No | No |
| 18633722 | SEMICONDUCTOR DEVICE | April 2024 | December 2025 | Allow | 20 | 4 | 0 | Yes | No |
| 18634782 | INTEGRATED CIRCUIT WITH BACKSIDE POWER RAIL AND BACKSIDE INTERCONNECT | April 2024 | May 2025 | Allow | 13 | 1 | 0 | No | No |
| 18628933 | ARRAY SUBSTRATE AND DISPLAY APPARATUS | April 2024 | January 2025 | Allow | 10 | 1 | 0 | No | No |
| 18623143 | MULTI-GATE DEVICES AND FABRICATING THE SAME WITH ETCH RATE MODULATION | April 2024 | January 2025 | Allow | 10 | 1 | 0 | No | No |
| 18600403 | SEMICONDUCTOR DEVICE | March 2024 | October 2024 | Allow | 8 | 1 | 0 | No | No |
| 18597952 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | March 2024 | February 2026 | Allow | 23 | 2 | 1 | Yes | No |
| 18595069 | LIGHTING EMITTING STACKED STRUCTURE AND DISPLAY DEVICE HAVING THE SAME | March 2024 | July 2025 | Allow | 16 | 2 | 0 | No | No |
| 18594073 | LOW RESISTANCE FILL METAL LAYER MATERIAL AS STRESSOR IN METAL GATES | March 2024 | April 2025 | Allow | 13 | 2 | 0 | No | No |
| 18439859 | METHOD FOR FORMING LONG CHANNEL BACK-SIDE POWER RAIL DEVICE | February 2024 | March 2025 | Allow | 14 | 1 | 1 | No | No |
| 18434028 | SEMICONDUCTOR DEVICE STRUCTURE WITH METAL GATE STACK | February 2024 | February 2025 | Allow | 12 | 1 | 0 | No | No |
| 18433217 | INTEGRATED CIRCUIT DEVICE WITH SOURCE/DRAIN BARRIER | February 2024 | January 2025 | Allow | 12 | 1 | 0 | No | No |
| 18429734 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME | February 2024 | January 2025 | Allow | 12 | 1 | 0 | No | No |
| 18415863 | SEMICONDUCTOR DEVICE | January 2024 | September 2024 | Allow | 8 | 0 | 0 | No | No |
| 18416737 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | January 2024 | February 2025 | Allow | 13 | 1 | 0 | No | No |
| 18409398 | FIN FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING THE SAME | January 2024 | January 2025 | Allow | 12 | 1 | 0 | No | No |
| 18408438 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES | January 2024 | April 2025 | Allow | 16 | 2 | 0 | No | No |
| 18402245 | Dummy Fin with Reduced Height and Method Forming Same | January 2024 | January 2025 | Allow | 12 | 1 | 0 | No | No |
| 18401866 | Transistor Gates and Methods of Forming Thereof | January 2024 | April 2025 | Allow | 15 | 2 | 0 | Yes | No |
| 18400951 | HIGH-K GATE DIELECTRIC | December 2023 | July 2025 | Allow | 19 | 3 | 0 | No | No |
| 18395762 | MAGNETORESISTIVE RANDOM ACCESS MEMORY | December 2023 | September 2024 | Allow | 9 | 1 | 0 | No | No |
| 18394881 | SIGNAL TRANSMISSION DEVICE | December 2023 | March 2026 | Allow | 27 | 0 | 0 | No | No |
| 18521107 | Fin Field-Effect Transistor Device and Method of Forming the Same | November 2023 | January 2025 | Allow | 14 | 2 | 0 | Yes | No |
| 18519714 | SEMICONDUCTOR DEVICE CONTACT STRUCTURES AND METHODS OF FABRICATING THEREOF | November 2023 | August 2025 | Allow | 21 | 3 | 0 | Yes | No |
| 18518670 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | November 2023 | March 2025 | Allow | 16 | 1 | 0 | No | No |
| 18518162 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | November 2023 | March 2025 | Allow | 16 | 2 | 0 | No | No |
| 18515912 | BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY | November 2023 | November 2024 | Allow | 12 | 1 | 0 | No | No |
| 18512125 | MULTI-LAYER LINE STRUCTURE | November 2023 | November 2024 | Allow | 12 | 1 | 0 | No | No |
| 18499650 | IN-SITU FORMATION OF METAL GATE MODULATORS | November 2023 | August 2024 | Allow | 10 | 1 | 0 | No | No |
| 18499091 | METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYS | October 2023 | July 2024 | Allow | 9 | 1 | 0 | No | No |
| 18494759 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | October 2023 | January 2025 | Allow | 14 | 2 | 0 | Yes | No |
| 18382339 | CONTACT OVER ACTIVE GATE STRUCTURES WITH METAL OXIDE-CAPED CONTACTS TO INHIBIT SHORTING | October 2023 | May 2024 | Allow | 7 | 0 | 0 | No | No |
| 18448188 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME | August 2023 | November 2025 | Allow | 27 | 1 | 0 | No | No |
| 18447932 | SEMICONDUCTOR STRUCTURE | August 2023 | September 2024 | Allow | 14 | 1 | 0 | No | No |
| 18447407 | STRUCTURE AND METHOD FOR GATE-ALL-AROUND METAL-OXIDE-SEMICONDUCTOR DEVICES WITH IMPROVED CHANNEL CONFIGURATIONS | August 2023 | October 2024 | Allow | 14 | 2 | 0 | No | No |
| 18447489 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE | August 2023 | August 2024 | Allow | 12 | 1 | 0 | Yes | No |
| 18232272 | Core-Shell Nanostructures For Semiconductor Devices | August 2023 | February 2025 | Allow | 18 | 2 | 1 | Yes | No |
| 18447006 | NANOSHEET DEVICE WITH DIPOLE DIELECTRIC LAYER AND METHODS OF FORMING THE SAME | August 2023 | July 2024 | Allow | 11 | 1 | 0 | No | No |
| 18446185 | METHOD OF FORMING EPITAXIAL FEATURES | August 2023 | April 2024 | Allow | 8 | 0 | 0 | No | No |
| 18366871 | GATE STRUCTURE AND METHOD OF FORMING SAME | August 2023 | May 2025 | Allow | 21 | 3 | 0 | Yes | No |
| 18230419 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAME | August 2023 | August 2024 | Allow | 12 | 1 | 0 | Yes | No |
| 18227979 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | July 2023 | March 2026 | Allow | 31 | 2 | 0 | No | No |
| 18362749 | SEMICONDUCTOR DEVICE AND METHOD | July 2023 | July 2024 | Allow | 12 | 1 | 0 | Yes | No |
| 18226780 | LIGHT EMITTING STACKED STRUCTURE AND DISPLAY DEVICE HAVING THE SAME | July 2023 | November 2024 | Allow | 22 | 2 | 0 | No | No |
| 18359225 | ETCH SELECTIVITY CONTROL FOR EPITAXY PROCESS WINDOW ENLARGEMENT IN SEMICONDUCTOR DEVICES | July 2023 | September 2024 | Allow | 14 | 1 | 0 | Yes | No |
| 18358476 | Multi-Layer Photo Etching Mask Including Organic and Inorganic Materials | July 2023 | December 2024 | Allow | 16 | 2 | 0 | No | No |
| 18358066 | Negative-Capacitance Field Effect Transistor | July 2023 | March 2024 | Allow | 8 | 0 | 0 | No | No |
| 18358552 | METHOD OF FORMING 3D STACKED COMPUTE AND MEMORY WITH COPPER PILLARS | July 2023 | December 2024 | Allow | 16 | 2 | 0 | No | No |
| 18358010 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE | July 2023 | March 2024 | Allow | 7 | 0 | 0 | No | No |
| 18357832 | DIELECTRIC FIN STRUCTURE | July 2023 | October 2024 | Allow | 15 | 2 | 0 | No | No |
| 18357796 | METAL GATE STACKS AND METHODS OF FABRICATING THE SAME IN MULTI-GATE FIELD-EFFECT TRANSISTORS | July 2023 | May 2025 | Allow | 22 | 2 | 1 | No | No |
| 18357345 | VERTICALLY-ORIENTED COMPLEMENTARY TRANSISTOR | July 2023 | March 2024 | Allow | 7 | 0 | 0 | No | No |
| 18356541 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE | July 2023 | August 2024 | Allow | 13 | 1 | 0 | Yes | No |
| 18225028 | METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS | July 2023 | November 2025 | Allow | 27 | 4 | 1 | Yes | No |
| 18354995 | Dummy Gate Cutting Process and Resulting Gate Structures | July 2023 | September 2024 | Allow | 14 | 2 | 0 | No | No |
| 18352230 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | July 2023 | October 2024 | Allow | 15 | 1 | 0 | No | No |
| 18350742 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | July 2023 | March 2026 | Allow | 32 | 1 | 0 | Yes | No |
| 18349486 | INPUT/OUTPUT DEVICES | July 2023 | August 2024 | Allow | 13 | 1 | 0 | No | No |
| 18347813 | SELF-ALIGNED PATTERNING LAYER FOR METAL GATE FORMATION | July 2023 | September 2025 | Allow | 26 | 0 | 0 | No | No |
| 18344571 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | June 2023 | February 2024 | Allow | 8 | 1 | 0 | No | No |
| 18344554 | FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME | June 2023 | April 2024 | Allow | 10 | 1 | 0 | No | No |
| 18343399 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME | June 2023 | May 2024 | Allow | 11 | 1 | 0 | No | No |
| 18340463 | SEMICONDUCTOR DEVICE INCLUDING DIFFUSION BREAK STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR DEVICE | June 2023 | February 2026 | Allow | 32 | 1 | 0 | No | No |
| 18337855 | FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME | June 2023 | August 2024 | Allow | 14 | 1 | 0 | No | No |
| 18335637 | Semiconductor Device and Method of Manufacture | June 2023 | July 2024 | Allow | 13 | 2 | 0 | No | No |
| 18204550 | SEMICONDUCTOR DEVICE | June 2023 | May 2024 | Allow | 11 | 2 | 0 | Yes | No |
| 18325412 | SEMICONDUCTOR DEVICES | May 2023 | December 2025 | Allow | 30 | 1 | 0 | Yes | No |
| 18322294 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | May 2023 | March 2024 | Allow | 10 | 1 | 0 | Yes | No |
| 18319999 | METHOD AND STRUCTURE FOR METAL GATE BOUNDARY ISOLATION | May 2023 | October 2024 | Allow | 17 | 2 | 1 | No | No |
| 18198944 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF | May 2023 | May 2024 | Allow | 12 | 2 | 0 | No | No |
| 18315204 | SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF | May 2023 | August 2024 | Allow | 15 | 2 | 0 | Yes | No |
| 18195150 | 3D-STACKED TRANSISTOR STRUCTURE WITH BARRIER LAYER BETWEEN UPPER GATE STRUCTURE AND LOWER GATE STRUCTURE | May 2023 | November 2025 | Allow | 30 | 1 | 0 | Yes | No |
| 18314200 | Gate Structure of a Semiconductor Device and Method of Forming Same | May 2023 | July 2024 | Allow | 14 | 1 | 1 | No | No |
| 18144309 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | May 2023 | February 2026 | Allow | 33 | 1 | 1 | Yes | No |
| 18311071 | SOURCE/DRAIN EPITAXIAL LAYERS FOR TRANSISTORS | May 2023 | July 2024 | Allow | 15 | 2 | 0 | Yes | No |
| 18299831 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | April 2023 | May 2024 | Allow | 13 | 2 | 0 | No | No |
| 18180139 | METHOD AND STRUCTURE FOR METAL GATES | March 2023 | May 2024 | Allow | 14 | 2 | 0 | No | No |
| 18170440 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF | February 2023 | December 2025 | Allow | 34 | 1 | 0 | No | No |
| 18167402 | FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME | February 2023 | October 2023 | Allow | 8 | 0 | 0 | No | No |
| 18106484 | 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH LOGIC CIRCUITS AND MEMORY CELLS | February 2023 | July 2024 | Allow | 17 | 1 | 0 | No | No |
| 18165502 | ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE | February 2023 | March 2024 | Allow | 13 | 2 | 0 | No | No |
| 18040505 | LIGHT-EMITTING SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE | February 2023 | September 2025 | Allow | 31 | 1 | 0 | No | No |
| 18104480 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF | February 2023 | November 2025 | Allow | 34 | 1 | 0 | No | No |
| 18099503 | INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF | January 2023 | December 2025 | Allow | 35 | 1 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner ENAD, CHRISTINE A.
With a 66.7% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 33.3% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.
✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.
✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
Examiner ENAD, CHRISTINE A works in Art Unit 2811 and has examined 517 patent applications in our dataset. With an allowance rate of 91.9%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 21 months.
Examiner ENAD, CHRISTINE A's allowance rate of 91.9% places them in the 77% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.
On average, applications examined by ENAD, CHRISTINE A receive 1.86 office actions before reaching final disposition. This places the examiner in the 44% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.
The median time to disposition (half-life) for applications examined by ENAD, CHRISTINE A is 21 months. This places the examiner in the 91% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.
Conducting an examiner interview provides a -0.1% benefit to allowance rate for applications examined by ENAD, CHRISTINE A. This interview benefit is in the 12% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 32.1% of applications are subsequently allowed. This success rate is in the 67% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 48.7% of cases where such amendments are filed. This entry rate is in the 73% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.
When applicants request a pre-appeal conference (PAC) with this examiner, 40.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 37% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.
This examiner withdraws rejections or reopens prosecution in 53.8% of appeals filed. This is in the 25% percentile among all examiners. Of these withdrawals, 14.3% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.
When applicants file petitions regarding this examiner's actions, 45.0% are granted (fully or in part). This grant rate is in the 38% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.
Examiner's Amendments: This examiner makes examiner's amendments in 0.2% of allowed cases (in the 52% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).
Quayle Actions: This examiner issues Ex Parte Quayle actions in 2.1% of allowed cases (in the 69% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.