USPTO Art Unit 2184 Prosecution Statistics

Art Unit Information

Art Unit: 2184
Group: 2180
Tech Center: 2100
Total Cases: 10,268
Last Active: October 2025

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19371994Multi-Protocol Retimer Enabling Transparent and Non-Transparent Bridging for Memory Fabrics including PCIe, CXL, or UALinkOctober 2025March 2026Allow410NoNo
19371722Memory Pooling and Sharing Enabling Scalable LLM Inference over Scaleup AI FabricsOctober 2025January 2026Allow200NoNo
19146501POWER SUPPLY SYSTEM FOR ADD-IN CARDJuly 2025March 2026Allow800NoNo
19139813METHOD AND APPARATUS FOR DMA BETWEEN ACCELERATOR CARDS, AND ACCELERATOR CARD, ACCELERATION PLATFORM AND MEDIUMJune 2025February 2026Allow800NoNo
19122952BOARD FOR CXL DATA TRANSMISSION, METHOD FOR DATA TRANSMISSION CONTROL AND DEVICEApril 2025December 2025Allow700NoNo
19096084METHODS AND SYSTEMS FOR DYNAMICALLY OPTIMIZING AND MODIFYING ALLOCATION OF VIRTUAL GRAPHICAL PROCESSING UNITSMarch 2025December 2025Allow910NoNo
19117007METHOD AND DEVICE FOR CONFIGURING HOST SYSTEM,APPARATUS, COMPUTING SYSTEM, AND NONTRANSITORY READABLE STORAGE MEDIUMMarch 2025November 2025Allow700NoNo
19116303BUS MODULE AND SERVERMarch 2025February 2026Allow1020YesNo
19088830DATA PROCESSING METHOD AND ELECTRONIC DEVICE USING DMAMarch 2025February 2026Allow1120YesNo
19083809METHODS AND SYSTEMS FOR ENHANCING A CONTEXT FOR USE IN PROCESSING, BY A PLURALITY OF ARTIFICIAL INTELLIGENCE AGENTS, A REQUESTMarch 2025July 2025Allow410NoNo
19083971METHODS AND SYSTEMS FOR RANKING A PLURALITY OF WORKER AGENTS BASED ON A USER REQUESTMarch 2025June 2025Allow310YesNo
19059085DYNAMIC TRAFFIC PATTERN ANALYSIS AND RATE-LIMIT ADJUSTMENTFebruary 2025July 2025Allow510YesNo
19058053USB HUB INTERNAL DATA TRANSMISSION METHOD AND USB HUB CHIPFebruary 2025June 2025Allow400NoNo
19046232SYSTEM AND METHOD FOR GHOST BRIDGINGFebruary 2025July 2025Allow610NoNo
19032967LOW LATENCY IN-LINE NETWORK COMPUTE PLATFORMJanuary 2025November 2025Allow900YesNo
19017419Protocol-Aware Provisioning of Resource over CXL FabricsJanuary 2025June 2025Allow500YesNo
19017423Host-to-Device CXL Communication including Multi-Fabric Bridging, also over NVLink, UALink, and EthernetJanuary 2025May 2025Allow410NoNo
19017408Scalable Virtualization of GPUs and Compute Accelerators in a Switch Providing CXL Resource-as-a-Service of Memory, NVMe or RDMA Networking via SLD Agnostic ProvisioningJanuary 2025August 2025Allow710NoNo
19006026AUTOMATIC REPAIR METHOD AND APPARATUS FOR DEVICE, AND ELECTRONIC DEVICE AND STORAGE MEDIUMDecember 2024December 2025Allow1220NoNo
18999493SMALL FORM FACTOR PC WITH BMC AND EXTENDED FUNCTIONALITYDecember 2024February 2026Allow1330YesNo
18989492AI ACCELERATOR INTEGRATED CIRCUIT CHIP WITH INTEGRATED CELL-BASED FABRIC ADAPTERDecember 2024August 2025Allow810NoNo
18987107FAST MASS STORAGE ACCESS FOR DIGITAL COMPUTERSDecember 2024February 2026Allow1410NoNo
18974946ELECTRONIC SYSTEM HAVING AN INTEGRATED MASTER CIRCUIT AND AN INTEGRATED SLAVE CIRCUITDecember 2024March 2026Allow1500NoNo
18963967CONTROL CHIP, OPERATING CIRCUIT, AND INTERFACE SIMULATION METHODNovember 2024February 2026Allow1400NoNo
18961414Multi-Bus Replicator Using RF Serializer/Deserializer for Chip-to-Chip InterconnectNovember 2024January 2026Allow1430YesNo
18961439Multi-Port SRAM System for a Distributed Memory PoolNovember 2024June 2025Allow710NoNo
18955302HUB DEVICE AND CONTROL SYSTEMNovember 2024January 2026Allow1400NoNo
18946951Cross-die Interconnection Monitor Method and Cross-die Interconnection Monitor System Capable of Extracting Cross-die Interconnection Data for Multi-die PackagesNovember 2024February 2026Allow1500NoNo
18945022APPARATUS FOR PROCESSING INCOMING AND/OR OUTGOING DATA-ELEMENTSNovember 2024January 2026Allow1400NoNo
18938353MULTI-CAST SNOOP VECTORS WITHIN A MESH TOPOLOGYNovember 2024February 2026Allow1500NoNo
18936875METHOD AND SYSTEM FOR SHIFTING DATA WITHIN MEMORYNovember 2024January 2026Allow1530NoNo
18935126CHIPLET WITH ADDRESS REMAPPER BLOCKNovember 2024January 2026Allow1400NoNo
18935068ELECTRONIC DEVICE HAVING A PLURALITY OF CHIPLETSNovember 2024September 2025Allow1110NoNo
18915833SYSTEM-ON-CHIP AND AN INTERCONNECT BUS INCLUDED IN THE SYSTEM ON CHIPOctober 2024December 2025Allow1400NoNo
18913715TWO-LEVEL CONTEXT CACHING AND EVICTION FOR SCATTER-GATHER DMAOctober 2024October 2025Allow1200NoNo
18905225OUT-OF-BAND BACKPLANE INFORMATION VERIFICATION SYSTEMOctober 2024December 2025Allow1400NoNo
18901294Subgraph segmented optimization method based on inter-core storage access, and applicationSeptember 2024January 2026Allow1620NoNo
18902735INTER-APPLICATION COMMUNICATION METHOD AND APPARATUS, STORAGE MEDIUM, AND PROGRAM PRODUCTSeptember 2024November 2025Allow1400YesNo
18892110STACKED DEVICE SYSTEMSeptember 2024March 2026Allow1810NoNo
18891308LIN BUS TRANCEIVER AND METHOD THEREFORESeptember 2024October 2025Allow1300NoNo
18888311VEHICLESeptember 2024January 2026Allow1600NoNo
18883546PERIPHERAL COMPONENT INTERCONNECT EXPRESS SLOT V-GUIDE MODIFICATIONSeptember 2024January 2026Allow1610YesNo
18882284METHODS AND SYSTEMS FOR IDENTIFICATION AND SEMANTIC CLUSTERING OF WORKER AGENTS FOR PROCESSING REQUESTSSeptember 2024December 2024Allow300NoNo
18829297SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEMSeptember 2024March 2026Allow1810NoNo
18826037SENSOR DATA OFFLOADSeptember 2024March 2026Allow1810NoNo
18823168PROMOTING A PREVIOUS VERSION TO ROLL BACK A DATA OBJECTSeptember 2024January 2026Allow1710NoNo
18820657MULTI-INTERFACE APPARATUSAugust 2024September 2025Allow1300NoNo
18820564BRIDGING AGENT FOR AN EMBEDDED CONTROLLER IN AN ADVANCED REDUCED INSTRUCTION SET COMPUTER MACHINES (ARM) BASED ARCHITECTURE SYSTEMAugust 2024February 2026Allow1710NoNo
18817511Event Driven High Speed Interface Counter PollingAugust 2024November 2025Allow1500NoNo
18816341BOARD MANAGEMENT SYSTEM, METHOD, AND APPARATUS, AND DEVICEAugust 2024February 2026Allow1710NoNo
18815839MEMORY SYSTEM AND METHOD FOR OPERATING THE SAMEAugust 2024February 2026Allow1810NoNo
18814648IMAGING DEVICEAugust 2024February 2026Allow1710NoNo
18841164EVENT PROCESSING METHOD AND APPARATUS OF INPUT DEVICEAugust 2024October 2025Allow1300NoNo
18810480REMOTELY CONTROLLING AND WIRELESSLY RECEIVING DEVICEAugust 2024January 2026Allow1710NoNo
18807843CHIPLET SYSTEM AND METHOD FOR COMMUNICATING BETWEEN CHIPLETS IN CHIPLET SYSTEMAugust 2024October 2025Allow1420YesNo
18802114Computer Architecture Having Selectable Parallel and Serial Communication Channels Between Processors and MemoryAugust 2024January 2026Allow1710YesNo
18800161SYNCHRONIZATION OPTIMIZATION METHOD FOR ETHERCAT MASTER SLAVESAugust 2024February 2025Allow610NoNo
18800873DYNAMIC I/O VIRTUALIZATION SYSTEM HAVING GUEST MEMORY MANAGEMENT FOR MAPPING VIRTUAL ADDRESSES MANAGED BY PROCESS AND MEMORY MANAGER (PMM) AND DYNAMIC EXECUTION CONTEXT (DEC)August 2024March 2026Allow1910NoNo
18799884PIN DETERMINATION FOR SINGLE-CONDUCTOR INTERFACE SYSTEMS AND METHODSAugust 2024August 2025Allow1300NoNo
18795962MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORYAugust 2024September 2025Allow1300NoNo
18835526NETWORK PORT CIRCUITAugust 2024December 2025Allow1700NoNo
18788862PVT COMPENSATED SLOW TRANSITION SERIAL INTERFACE IO TRANSMITTER WITH REDUCED DELAYJuly 2024November 2025Allow1500NoNo
18789121MEMORY INTERFACEJuly 2024December 2025Allow1610NoNo
18789512Wireless Control Device for Computer AccessoriesJuly 2024March 2026Allow2010NoNo
18786104THIRD PARTY APPLICATIONS FOR A NETWORK-CAPABLE DOCKING STATIONJuly 2024August 2025Allow1300NoNo
18785358PERIPHERAL DEVICE SHARING BETWEEN DATA PROCESSING SYSTEMSJuly 2024January 2026Allow1810NoNo
18833232POLLING CONTROL DEVICE, POLLING CONTROL SYSTEM, POLLING CONTROL METHOD, AND POLLING CONTROL PROGRAMJuly 2024March 2026Abandon2010NoNo
18783335DUAL INTERFACE HIGH-SPEED MEMORY SUBSYSTEMJuly 2024December 2025Allow1710NoNo
18783056RETIMER PATH CONTROL METHOD, APPARATUS, AND SYSTEMJuly 2024January 2026Allow1710NoNo
18778886INFORMATION PROCESSING APPARATUSJuly 2024March 2026Abandon2010YesNo
18778409APPARATUS, NPU AND CHIPSET IMPLEMENTED FOR FUSION NEURAL NETWORKJuly 2024December 2025Allow1710NoNo
18729643FIFO DATA BUFFER WITH MULTI-LOADJuly 2024August 2025Allow1300NoNo
18773734Automatic Reconfiguration of Network Interface Driver on Network Sensor HostJuly 2024August 2025Allow1310NoNo
18770307BUS SLAVE DEVICE AND INTERRUPT REQUEST DETERMINATION METHOD THEREOFJuly 2024January 2026Allow1800NoNo
18770598IO PROCESSING METHOD AND APPARATUSJuly 2024January 2026Allow1810NoNo
18769663MULTI-MODE USB-C CONNECTION CABLEJuly 2024February 2026Abandon1910NoNo
18763195END-TO-END ISOLATION OVER PCIEJuly 2024April 2025Allow910NoNo
18763713DISPLAY DEVICEJuly 2024July 2025Allow1300NoNo
18762396Parser Instructions for CPUsJuly 2024July 2025Allow1300NoNo
18760627ADAPTER FOR AN AUTOMATION FIELD DEVICE DESIGNED FOR LINKING TO HIGHWAY ADDRESSABLE REMOTE TRANSDUCER (HART) OR 4-20 mA COMMUNICATIONS LOOP CONNECTED TO FIELD DEVICEJuly 2024January 2026Allow1810NoNo
18758943DMA CONVERTER (UDMAC) THAT SUPPORTS CONVERSION BETWEEN ALIGNED AND UNALIGNED DATAJune 2024February 2025Allow710NoNo
18724628COMMUNICATION LINK SWITCHING CONTROL CIRCUIT, COMMUNICATION LINK AND SERVERJune 2024April 2025Allow920NoNo
18724870PCIE INTERRUPT PROCESSING METHOD AND APPARATUS, DEVICE AND NON-TRANSITORY READABLE STORAGE MEDIUMJune 2024December 2025Allow1810NoNo
18756501DOUBLE DATA RATE HIGH VOLUME MANUFACTURING VARIATION TRENDSJune 2024November 2025Allow1710YesNo
18756055PCIE PERIPHERAL SHARINGJune 2024March 2026Allow2110NoNo
18755954USB DEVICE-INITIATED DATA TRANSFERS AND PLATFORM OFFLOAD CAPABILITIESJune 2024March 2026Allow2010NoNo
18755063SYSTEM AND METHOD FOR SECURELY CONNECTING TO A PERIPHERAL DEVICEJune 2024August 2025Allow1410NoNo
18755264INTEGRATED CIRCUITS INCLUDING NETWORK INTERFACE CONTROLLERS FOR DATA TRANSFERS ASSISTED BY SOFTWARE AND RELATED METHODSJune 2024October 2025Allow1600NoNo
18724375BUS-BASED TRANSACTION PROCESSING METHOD AND SYSTEM, STORAGE MEDIUM, AND DEVICEJune 2024December 2025Allow1800NoNo
18724096DIRECT MEMORY ACCESS ARCHITECTURE, SYSTEM AND METHOD, ELECTRONIC DEVICE, AND MEDIUMJune 2024February 2025Allow810NoNo
18724093METHOD, SYSTEM AND APPARATUS FOR DATA TRANSMISSION, AND STORAGE MEDIUMJune 2024November 2024Allow500NoNo
18753679SEMICONDUCTOR DEVICE AND COMMUNICATION SYSTEM FOR UPDATING SETTING DATA OF MULTIPLE CHANNELSJune 2024October 2025Allow1610NoNo
18751677INPUT/OUTPUT PROCESSOR POWER MANAGEMENTJune 2024September 2025Allow1400NoNo
18749744SYSTEMS AND METHODS FOR MONITORING AND ANALYZING THE STRUCTURE OF A VEHICLE CONTROLLER AREA NETWORKJune 2024July 2025Allow1300NoNo
18744427TOPOLOGY-BASED DYNAMIC ADDRESS ASSIGNMENT OF SEMICONDUCTOR MEMORY DEVICESJune 2024March 2026Allow2110NoNo
18744582SCALABLE DATA STRUCTURE FOR AGGREGATING BMC INPUT AND OUTPUT OVER SERDES FOR DATA CENTER AND SERVER NODES SYSTEM AND METHODJune 2024November 2025Allow1710YesNo
18742716CUSTOMIZABLE INITIALIZATION ORCHESTRATION MODULE PROVIDING A GRAPHICAL PREVIEW OF A GRAPHICAL STATUS SCREEN USER INTERFACEJune 2024June 2025Allow1210NoNo
18741723USB HUB WITH MULTIPLE UPSTREAM-FACING-PORTS AND DATA TRANSMISSION METHOD THEREOFJune 2024March 2026Allow2110NoNo
18740224MULTI-DIE SYSTEMS WITH MODULAR DIE-TO-DIE LINK MACROS FOR ENABLING DIE-TO-DIE COMMUNICATIONJune 2024October 2025Allow1600NoNo
18718708REQUEST PROCESSING METHOD AND APPARATUS, DEVICE, AND MEDIUMJune 2024December 2024Allow600NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2184.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
380
Examiner Affirmed
240
(63.2%)
Examiner Reversed
140
(36.8%)
Reversal Percentile
70.2%
Higher than average

What This Means

With a 36.8% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
1021
Allowed After Appeal Filing
356
(34.9%)
Not Allowed After Appeal Filing
665
(65.1%)
Filing Benefit Percentile
63.4%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 34.9% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2184 - Prosecution Statistics Summary

Executive Summary

Art Unit 2184 is part of Group 2180 in Technology Center 2100. This art unit has examined 10,268 patent applications in our dataset, with an overall allowance rate of 80.1%. Applications typically reach final disposition in approximately 28 months.

Comparative Analysis

Art Unit 2184's allowance rate of 80.1% places it in the 64% percentile among all USPTO art units. This art unit has an above-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2184 receive an average of 2.02 office actions before reaching final disposition (in the 60% percentile). The median prosecution time is 28 months (in the 65% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With more office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.