USPTO Art Unit 2184 Prosecution Statistics

Art Unit Information

Art Unit: 2184
Group: 2180
Tech Center: 2100
Total Cases: 10,795
Last Active: March 2025

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19083971METHODS AND SYSTEMS FOR RANKING A PLURALITY OF WORKER AGENTS BASED ON A USER REQUESTMarch 2025June 2025Allow310YesNo
19017419Protocol-Aware Provisioning of Resource over CXL FabricsJanuary 2025June 2025Allow500YesNo
19017423Host-to-Device CXL Communication including Multi-Fabric Bridging, also over NVLink, UALink, and EthernetJanuary 2025May 2025Allow410NoNo
18882284METHODS AND SYSTEMS FOR IDENTIFICATION AND SEMANTIC CLUSTERING OF WORKER AGENTS FOR PROCESSING REQUESTSSeptember 2024December 2024Allow300NoNo
18800161SYNCHRONIZATION OPTIMIZATION METHOD FOR ETHERCAT MASTER SLAVESAugust 2024February 2025Allow610NoNo
18763195END-TO-END ISOLATION OVER PCIEJuly 2024April 2025Allow910NoNo
18758943DMA CONVERTER (UDMAC) THAT SUPPORTS CONVERSION BETWEEN ALIGNED AND UNALIGNED DATAJune 2024February 2025Allow710NoNo
18724628COMMUNICATION LINK SWITCHING CONTROL CIRCUIT, COMMUNICATION LINK AND SERVERJune 2024April 2025Allow920NoNo
18724096DIRECT MEMORY ACCESS ARCHITECTURE, SYSTEM AND METHOD, ELECTRONIC DEVICE, AND MEDIUMJune 2024February 2025Allow810NoNo
18724093METHOD, SYSTEM AND APPARATUS FOR DATA TRANSMISSION, AND STORAGE MEDIUMJune 2024November 2024Allow500NoNo
18742716CUSTOMIZABLE INITIALIZATION ORCHESTRATION MODULE PROVIDING A GRAPHICAL PREVIEW OF A GRAPHICAL STATUS SCREEN USER INTERFACEJune 2024June 2025Allow1210NoNo
18718708REQUEST PROCESSING METHOD AND APPARATUS, DEVICE, AND MEDIUMJune 2024December 2024Allow600NoNo
18738605SEMICONDUCTOR MEMORY DEVICEJune 2024April 2025Allow1010NoNo
18677623ADVANCED INITIALIZATION BUS (AIB)May 2024May 2025Allow1120NoNo
18674203Scalable InterruptsMay 2024January 2025Allow700NoNo
18672641CREATION AND USE OF AN EFFICIENCY SET TO ESTIMATE AN AMOUNT OF DATA STORED IN A DATA SET OF A STORAGE SYSTEM HAVING ONE OR MORE CHARACTERISTICSMay 2024April 2025Allow1110NoNo
18672736Data Migration Synchronization Process Using A Manifest From A Source Device To A New Destination DeviceMay 2024June 2025Allow1310YesNo
18670968TRANSMISSION MODULE FOR A TRANSMITTING/RECEIVING DEVICE OF A SUBSCRIBER STATION OF A SERIAL BUS SYSTEM, AND METHOD FOR TRANSMITTING A MESSAGE WITH DIFFERENTIAL SIGNALS IN A SERIAL BUS SYSTEMMay 2024June 2025Allow1300NoNo
18671342CENTRALIZED CONTROL OF LIGHTING-ENABLED PERIPHERAL DEVICESMay 2024June 2025Allow1310YesNo
18671095EFFICIENT DATA SHARING FOR GRAPHICS DATA PROCESSING OPERATIONSMay 2024January 2025Allow700NoNo
18664968TRANSPORT COMPONENT AUTHENTICATIONMay 2024March 2025Allow1010NoNo
18710595DATA TRANSMISSION METHOD, SYSTEM AND APPARATUS, AND DEVICE AND COMPUTER-READABLE STORAGE MEDIUMMay 2024April 2025Allow1110NoNo
18664035NEURAL NETWORKS FOR EMBEDDED DEVICESMay 2024February 2025Allow910NoNo
18660846SYSTEM FOR DISPLAYING AND CONTROLLING MEDICAL MONITORING DATAMay 2024March 2025Allow1110NoNo
18657176INTERCONNECT FABRIC LINK WIDTH REDUCTION TO REDUCE INSTANTANEOUS POWER CONSUMPTIONMay 2024March 2025Allow1000NoNo
18652690MEMORY CHIPLET WITH EFFICIENT MAPPING OF MEMORY-CENTRIC INTERFACE TO DIE-TO-DIE (D2D) UNIT INTERFACE MODULESMay 2024November 2024Allow610NoNo
18652707UNIVERSAL MEMORY INTERFACE WITH DYNAMIC BIDIRECTIONAL DATA TRANSFERSMay 2024November 2024Allow610NoNo
18650612NEURAL NETWORK DATA COMPUTATION USING MIXED-PRECISIONApril 2024February 2025Allow910NoNo
18644410CONTINUOUS ANALYTE SENSOR QUALITY MEASURES AND RELATED THERAPY ACTIONS FOR AN AUTOMATED THERAPY DELIVERY SYSTEMApril 2024March 2025Allow1110YesNo
18643656METHOD FOR AN INTERNAL COMMAND FROM A PLURALITY OF PROCESSING CORES WITH MEMORY SUB-SYSTEM THAT CACHE IDENTIFIERS FOR ACCESS COMANDSApril 2024March 2025Allow1110NoNo
18643178MULTI-THREADING PROCESSOR AND OPERATING METHOD THEREOFApril 2024July 2024Allow200NoNo
18637786CONTROLLER AREA NETWORK MODULE AND A METHOD FOR THE CAN MODULEApril 2024June 2025Allow1400NoNo
18638352REGULATING DELIVERY OF INSULIN TO A BODY OF A USER BY A FLUID DELIVERY DEVICEApril 2024December 2024Allow800YesNo
18638086DELAY MODULE FOR A CONTROLLER AREA NETWORK (CAN), A CAN DEVICE, AND A METHOD FOR THE DELAY MODULEApril 2024June 2025Allow1400NoNo
18633586SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM AND METHOD FOR COMMUNICATION IN A SERIAL BUS SYSTEMApril 2024June 2025Allow1400NoNo
18700757COMMUNICATION LINK UPDATE METHOD AND APPARATUS, AND RELATED DEVICEApril 2024January 2025Allow910NoNo
18633984INTERCONNECT FOR DIRECT MEMORY ACCESS CONTROLLERSApril 2024April 2025Allow1210NoNo
18630597NETWORK INTERFACE CONTROLLER CONFIGURATION METHOD, APPARATUS, DEVICE, AND STORAGE MEDIUMApril 2024November 2024Allow710NoNo
18628403Processor Operand Management Using Fusion BufferApril 2024February 2025Allow1100NoNo
18627907INSTRUCTIONS TO CONVERT FROM FP16 TO BF8April 2024March 2025Allow1210NoNo
18626753MANYCORE SYSTEM FOR PERFORMING EXECUTION OF MULTI-THREADS IN ASYNCHRONOUS MANNERApril 2024September 2024Allow510NoNo
18620228APPLICATION PROGRAMMING INTERFACE TO ACCELERATE MATRIX OPERATIONSMarch 2024December 2024Allow800NoNo
18616617Universal Ethernet SolutionMarch 2024June 2025Allow1510NoNo
18610905NETWORK CREDIT RETURN MECHANISMSMarch 2024December 2024Allow910NoNo
18609622CONDITIONAL EXECUTION SPECIFICATION OF INSTRUCTIONS USING CONDITIONAL EXTENSION SLOTS IN THE SAME EXECUTE PACKET IN A VLIW PROCESSORMarch 2024April 2025Allow1310YesNo
18606719Automated infrastructure management for computer systems based on system rules, templates, and system state with coupling of a storage resource to a physical compute resourceMarch 2024November 2024Allow820YesNo
18602229SEMICONDUCTOR DEVICE AND METHOD OF BUILDING A POOLED MEMORY WITHOUT USING SWITCHESMarch 2024May 2025Allow1400NoNo
18601409OPERATION ACCELERATOR AND COMPRESSION METHODMarch 2024January 2025Allow1110NoNo
18599649MULTICHANNEL MEMORY ARBITRATION AND INTERLEAVING SCHEMEMarch 2024March 2025Allow1210NoNo
18599147Innovative Interconnect Design for Package Architecture to Improve LatencyMarch 2024November 2024Allow910NoNo
18593780DATA FLOW MANAGEMENTMarch 2024November 2024Allow910YesNo
18592094DYNAMIC TIMING CALIBRATION SYSTEMS AND METHODSFebruary 2024January 2025Allow1110YesNo
18585619HUB FOR MULTI-CHIP SENSOR INTERFACE SYSTEM AND REAL TIME ENVIROMENTAL CONTEXT MAPPER FOR SELF-DRIVING CARSFebruary 2024September 2024Allow700YesNo
18582042INTELLIGENT STORAGE PROTOCOL MODIFICATION OF A DISTRIBUTED STORAGE SYSTEMFebruary 2024January 2025Allow1110NoNo
18582488MEMORY DEVICE INTERFACE COMMUNICATING WITH SET OF DATA BURSTS CORRESPONDING TO MEMORY DIES VIA DEDICATED PORTIONS FOR COMMAND PROCESSINGFebruary 2024October 2024Allow810NoNo
18444804Cross Address-Space BridgingFebruary 2024June 2025Allow1620YesNo
18440653HIGH SPEED PASSIVE SERIAL CONFIGURATION OF FPGA BY MCU USING QUAD OR OCTAL SPI FLASHFebruary 2024April 2025Allow1400NoNo
18438795STORAGE DEVICE FOR HIGH SPEED LINK STARTUP AND STORAGE SYSTEM INCLUDING THE SAMEFebruary 2024April 2025Allow1410YesNo
18436283USER ADJUSTABLE COMMUNICATION FABRIC COUPLED COMPUTE UNITSFebruary 2024July 2025Allow1720NoNo
18435752PORTABLE MEMORY DEVICE HAVING MUTUALLY EXCLUSIVE NON-VOLATILE ELECTRONIC DATA STORAGEFebruary 2024February 2025Abandon1310NoNo
18433191MEMORY INTERCONNECT SWITCHFebruary 2024June 2025Allow1610NoNo
18427723HUB TRANSMISSION DIRECTION CONTROL METHOD, HUB AND CONTROL CIRCUITJanuary 2024May 2025Allow1600NoNo
18426234SYSTEM AND METHOD FOR STREAM BASED DATA PLACEMENT ON HYBRID SSDJanuary 2024February 2025Allow1210YesNo
18292850DATA PROCESSING METHOD AND APPARATUSJanuary 2024April 2025Allow1500NoNo
18424460MULTI-PROTOCOL IO INFRASTRUCTURE FOR A FLEXIBLE STORAGE PLATFORMJanuary 2024February 2025Allow1310YesNo
18422907STORAGE DEVICE FOR OUTPUTTING INTERRUPT AND METHOD OF OPERATING THE SAMEJanuary 2024April 2025Allow1400NoNo
18421506MEMORY DISAGGREGATION AND REALLOCATIONJanuary 2024September 2024Allow710NoNo
18419059APPARATUSES, METHODS, AND SYSTEMS TO PRECISELY MONITOR MEMORY STORE ACCESSESJanuary 2024December 2024Allow1110NoNo
18415285REDUNDANT COMPUTING ACROSS PLANESJanuary 2024December 2024Allow1100NoNo
18413340System and Method for Checking Data to be Processed or StoredJanuary 2024November 2024Allow1010NoNo
18412731MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENTJanuary 2024December 2024Allow1110NoNo
18412632DEVICE ID SETTING METHOD AND ELECTRONIC DEVICE APPLYING THE DEVICE ID SETTING METHODJanuary 2024December 2024Allow1110NoNo
18408697THRESHOLD VOLTAGE BIN CALIBRATION AT MEMORY DEVICE POWER UPJanuary 2024September 2024Allow800NoNo
18408391RECONFIGURABLE PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIe) DATA PATH TRANSPORT TO REMOTE COMPUTING ASSETSJanuary 2024December 2024Allow1110NoNo
18406876PROGRAM REWRITING DEVICE AND PROGRAM REWRITING METHODJanuary 2024May 2025Allow1600YesNo
18401474ASYNCHRONOUS BRIDGE, AND ASYNCHRONOUS PROCESSING METHODDecember 2023July 2025Allow1800NoNo
18400952Queueing Storage OperationsDecember 2023November 2024Allow1010YesNo
18574316PROGRAMMABLE CONTROLLER, PROGRAMMABLE CONTROLLER SYSTEM, AND RECORDING MEDIUMDecember 2023April 2025Allow1600NoNo
18392072SHARING PACKAGE PINS IN A MULTI-CHIP MODULE (MCM)December 2023August 2024Allow800NoNo
18544791SYSTEM AND METHOD FOR FACILITATING OPERATION MANAGEMENT IN A NETWORK INTERFACE CONTROLLER (NIC) FOR ACCELERATORSDecember 2023January 2025Allow1310NoNo
18544914SYSTEM AND METHOD FOR FACILITATING EFFICIENT MESSAGE MATCHING IN A NETWORK INTERFACE CONTROLLER (NIC)December 2023February 2025Allow1410YesNo
18540664NON-VOLATILE MEMORY WITH AN ARBITRATION FUNCTION ON SHARED STATUS CHANNELDecember 2023May 2025Allow1700NoNo
18539907SYSTEM AND METHOD FOR FACILITATING ON-DEMAND PAGING IN A NETWORK INTERFACE CONTROLLER (NIC)December 2023March 2025Allow1610NoNo
18538815ADAPTER AND DATA TRANSMISSION METHOD UNDER LIMITED MEMORYDecember 2023March 2025Allow1500NoNo
18569727SERIAL PORT CONTROL SYSTEM BASED ON COMPLEX PROGRAMMABLE LOGIC DEVICE (CPLD) AND COMMUNICATION METHOD THEREFORDecember 2023July 2024Allow700NoNo
18537300VIRTUAL QUEUE FOR MESSAGESDecember 2023March 2025Allow1600NoNo
18536264Seamlessly Integrated Microcontroller ChipDecember 2023February 2025Allow1410NoNo
18534126LOCAL PAGE WRITES VIA PRE-STAGING BUFFERS FOR RESILIENT BUFFER POOL EXTENSIONSDecember 2023June 2025Allow1820YesNo
18534037SSD HAVING DUAL PORT MODE WHEREIN PORTS OPERATE INDEPENDENTLY OF EACH OTHER VIA PORT MODE CONTROLLERDecember 2023January 2025Allow1320NoNo
18529237ASYNCHRONOUS DATA TRANSFERDecember 2023March 2025Allow1600NoNo
18528509HIGH BANDWIDTH CORE TO NETWORK-ON-CHIP INTERFACEDecember 2023November 2024Allow1210NoNo
18528058FORWARDING INCOMING IO TO SCM NAMESPACESDecember 2023November 2024Allow1210NoNo
18526870FAST MASS STORAGE ACCESS FOR DIGITAL COMPUTERSDecember 2023March 2025Abandon1510NoNo
18525828FAILURE RECOVERY RECOMMENDATIONS FOR CLI COMMANDSNovember 2023October 2024Allow1010NoNo
18565458SUPERCOMPUTING DEVICE, IN-PLACE DETECTION METHOD FOR COMPUTING POWER BOARD, AND STORAGE MEDIUMNovember 2023July 2025Allow1900NoNo
18523020SYSTEMS AND METHODS FOR CONFIGURING A NON-INTERFERING MODE IN A TELEMATICS DEVICENovember 2023June 2024Allow720NoNo
18522448METHOD AND SYSTEM FOR WIRELESS DATA TRANSMISSIONNovember 2023April 2025Allow1700NoNo
18521985INTERFACE ADAPTERNovember 2023May 2025Allow1700NoNo
18520149CIRCUIT, METHOD AND DEVICE FOR ADDRESSING CAN NODESNovember 2023February 2025Allow1500NoNo
18520375SYSTEMS AND METHODS FOR HANDLING MACRO COMPATIBILITY FOR DOCUMENTS AT A STORAGE SYSTEMNovember 2023January 2025Allow1410YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2184.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
338
Examiner Affirmed
211
(62.4%)
Examiner Reversed
127
(37.6%)
Reversal Percentile
72.2%
Higher than average

What This Means

With a 37.6% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
868
Allowed After Appeal Filing
317
(36.5%)
Not Allowed After Appeal Filing
551
(63.5%)
Filing Benefit Percentile
69.5%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 36.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2184 - Prosecution Statistics Summary

Executive Summary

Art Unit 2184 is part of Group 2180 in Technology Center 2100. This art unit has examined 10,795 patent applications in our dataset, with an overall allowance rate of 83.0%. Applications typically reach final disposition in approximately 26 months.

Comparative Analysis

Art Unit 2184's allowance rate of 83.0% places it in the 70% percentile among all USPTO art units. This art unit has an above-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2184 receive an average of 1.85 office actions before reaching final disposition (in the 52% percentile). The median prosecution time is 26 months (in the 68% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With more office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.