USPTO Examiner HUYNH KIM T - Art Unit 2184

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18724096DIRECT MEMORY ACCESS ARCHITECTURE, SYSTEM AND METHOD, ELECTRONIC DEVICE, AND MEDIUMJune 2024February 2025Allow810NoNo
18738605SEMICONDUCTOR MEMORY DEVICEJune 2024April 2025Allow1010NoNo
18710595DATA TRANSMISSION METHOD, SYSTEM AND APPARATUS, AND DEVICE AND COMPUTER-READABLE STORAGE MEDIUMMay 2024April 2025Allow1110NoNo
18660846SYSTEM FOR DISPLAYING AND CONTROLLING MEDICAL MONITORING DATAMay 2024March 2025Allow1110NoNo
18700757COMMUNICATION LINK UPDATE METHOD AND APPARATUS, AND RELATED DEVICEApril 2024January 2025Allow910NoNo
18630597NETWORK INTERFACE CONTROLLER CONFIGURATION METHOD, APPARATUS, DEVICE, AND STORAGE MEDIUMApril 2024November 2024Allow710NoNo
18610905NETWORK CREDIT RETURN MECHANISMSMarch 2024December 2024Allow910NoNo
18412632DEVICE ID SETTING METHOD AND ELECTRONIC DEVICE APPLYING THE DEVICE ID SETTING METHODJanuary 2024December 2024Allow1110NoNo
18544914SYSTEM AND METHOD FOR FACILITATING EFFICIENT MESSAGE MATCHING IN A NETWORK INTERFACE CONTROLLER (NIC)December 2023February 2025Allow1410YesNo
18528509HIGH BANDWIDTH CORE TO NETWORK-ON-CHIP INTERFACEDecember 2023November 2024Allow1210NoNo
18375054COMPONENT FIRMWARE INTERACTION USING HARDWARE REGISTERSSeptember 2023September 2024Allow1110NoNo
18369795HIGHLY SCALABLE ARCHITECTURE FOR PCIE GEN6 PROTOCOL ANALYSIS USING HIGH SPEED FPGASeptember 2023June 2025Allow2110NoNo
18454202SYSTEM AND METHOD FOR FACILITATING EFFICIENT HOST MEMORY ACCESS FROM A NETWORK INTERFACE CONTROLLER (NIC)August 2023September 2024Allow1310YesNo
18216908ALTERNATIVE PROTOCOL OVER PHYSICAL LAYERJune 2023January 2025Allow1810NoNo
18212170Systems and Methods Involving Hybrid Quantum Machines, Aspects of Quantum Information Technology and/or Other FeaturesJune 2023September 2024Allow1410NoNo
18314693COMPUTE SLED PROVIDING HIGH SPEED STORAGE ACCESS THROUGH A PCI EXPRESS FABRIC BETWEEN COMPUTE NODES AND A STORAGE SERVERMay 2023June 2024Allow1410NoNo
18297430USB POWER SUPPLY CIRCUIT WITH IDLE POWER DISTRIBUTION AND THE METHOD THEREOFApril 2023December 2024Allow2010NoNo
18125483Apparatus for Synchronous EthernetMarch 2023September 2024Allow1810NoNo
18124332SYSTEM FOR LINK MANAGEMENT BETWEEN MULTIPLE COMMUNICATION CHIPSMarch 2023October 2023Allow700NoNo
18246050SELECTION DEVICE AND SELECTION METHODMarch 2023September 2024Allow1810YesNo
18121104CREATE AND OPTIMIZE DYNAMIC DATA ADAPTATION LAYER IN EDGE COMPUTINGMarch 2023April 2025Allow2510YesNo
18043479DATA TRANSMISSION DEVICE AND METHODFebruary 2023January 2025Abandon2310NoNo
18112906ELECTRONIC DEVICEFebruary 2023September 2024Allow1910NoNo
18107994Direct Access to External Storage from a Reconfigurable ProcessorFebruary 2023May 2025Allow2810YesNo
18157000INDEPENDENT ADDRESSING OF ONE-WIRE AND TWO-WIRE DEVICES ON A SHARED RFFE BUS INTERFACEJanuary 2023August 2024Allow1910NoNo
18098481LOW LATENCY COMMAND PROPAGATION PROTOCOLJanuary 2023May 2025Allow2810NoNo
18151705Multiprocessor System and Method for Configuring Multiprocessor SystemJanuary 2023January 2025Allow2410NoNo
18150991METHOD FOR EXPANDING PCIE SYSTEM, PCIE SWITCHING DEVICE, AND PCIE SYSTEMJanuary 2023June 2025Allow2930NoNo
18085274NETWORK CREDIT RETURN MECHANISMSDecember 2022December 2023Allow1210NoNo
18085196SYSTEMS, DEVICES AND METHODS WITH OFFLOAD PROCESSING DEVICESDecember 2022July 2024Abandon1910NoNo
18081716METHOD AND SYSTEM FOR PROVIDING PROGRAMMABLE MICROCONTROLLER UNIT (MCU) USING TWO-PHASE CONFIGURATION PROCESSDecember 2022November 2023Allow1110NoNo
18078938I2C WAKEUP CIRCUIT, WAKEUP METHOD AND ELECTRONIC DEVICEDecember 2022August 2024Allow2010NoNo
18057774LOADING FIRMWARE ONTO AN EMBEDDED CONTROLLER (EC) INTEGRATED INTO A HETEROGENEOUS COMPUTING PLATFORMNovember 2022February 2025Allow2620NoNo
18056012Asynchronous Controller for Processing UnitNovember 2022August 2024Allow2010NoNo
18054381ENHANCED SAFETY MECHANISM FOR SINGLE WIRE INTERFACENovember 2022October 2024Allow2420NoNo
17975975INFORMATION HANDLING SYSTEM HIGH BANDWIDTH GPU HUBOctober 2022March 2025Allow2810NoNo
17918975COMPUTING DEVICE AND COMPUTING SYSTEMOctober 2022December 2024Allow2610NoNo
17963755PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICE AND OPERATING METHOD THEREOFOctober 2022August 2024Allow2220YesNo
17961977INTEGRATED CIRCUIT (IC) DEVICES WITH EFFICIENT PIN-SHARING FOR MULTIPROTOCOL COMMUNICATION INTERFACEOctober 2022February 2025Allow2830NoNo
17958111VIRTUAL WIRE PROTOCOL FOR TRANSMITTING SIDE BAND CHANNELSSeptember 2022September 2024Allow2420YesNo
17956239BUS PIPELINE STRUCTURE FOR DIE-TO-DIE INTERCONNECT AND CHIPSeptember 2022March 2023Allow610NoNo
17915658Distributed Processing Node and Distributed Processing SystemSeptember 2022April 2024Allow1810NoNo
17953649Bi-Directional Bus RepeaterSeptember 2022January 2025Allow2710NoNo
17951473SPREAD SPECTRUM CLOCK NEGOTIATION METHOD, AND PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICE AND SYSTEMSeptember 2022June 2024Allow2120NoNo
17932846PACKET CONTROL APPARATUS AND PACKET CONTROL METHODSeptember 2022March 2024Allow1810NoNo
17821399Mechanism To Reduce Exit Latency For Deeper Power Saving Modes L2 In PCIeAugust 2022September 2024Allow2520YesNo
17818237Billboard for Context Information SharingAugust 2022December 2023Allow1610NoNo
17872030PACKET FORWARDING APPARATUS WITH BUFFER RECYCLING AND ASSOCIATED PACKET FORWARDING METHODJuly 2022April 2025Allow3210NoNo
17871639TWO-DIMENSIONAL OPTICAL SENSOR AND SERIAL PERIPHERAL INTERFACE ADAPTATIONJuly 2022January 2023Allow610YesNo
17868425METHOD, EQUIPMENT, COMMUNICATION PROGRAM, ON-BOARD DEVICE HAVING THESE EQUIPMENTSJuly 2022August 2024Allow2410NoNo
17863408COMMUNICATION INTERFACE STRUCTURE AND DIE-TO-DIE PACKAGEJuly 2022June 2024Allow2310NoNo
17861325HYBRID PCB TOPOLOGY AND LAYOUT WITH CLAMSHELL PLACEMENT FOR STORAGE APPLICATIONSJuly 2022May 2024Allow2210NoNo
17861645NETWORK SWITCH WITH DMA CONTROLLER FOR INDEPENDENT DIRECT MEMORY ACCESS OF HOST SYSTEMJuly 2022July 2023Allow1220YesNo
17755513IN-VEHICLE COMMUNICATION DEVICE AND VEHICLE COMMUNICATION METHODApril 2022September 2023Allow1710NoNo
17771549MULTI-CHIP INTERCONNECTION SYSTEM BASED ON PCIE BUSESApril 2022November 2024Allow3130NoNo
17769887SYSTEM FOR THE EXCHANGE OF MESSAGES THROUGH AN APPLICATION SOFTWAREApril 2022July 2024Abandon2710NoNo
17707112CONTROL OF DEVICE FEATURES BASED ON SLOT CONFIGURATIONSMarch 2022December 2023Allow2010YesNo
17701593HIGH BANDWIDTH CORE TO NETWORK-ON-CHIP INTERFACEMarch 2022September 2023Allow1720YesNo
17694106AUTONOMOUS ENTRY AND EXIT OF LOW LATENCY DATAPATH IN PCIE APPLICATIONSMarch 2022January 2024Allow2310YesNo
17686412COMMUNICATION SYSTEM, MANAGEMENT DEVICE, AND TERMINAL DEVICEMarch 2022December 2024Abandon3310NoNo
17669649DISTRIBUTED PROCESSOR MEMORY CHIP WITH MULTI-PORT PROCESSOR SUBUNITSFebruary 2022March 2024Allow2510NoNo
17627899SIGNAL PROCESSING CHIP AND SIGNAL PROCESSING SYSTEMJanuary 2022January 2024Allow2410NoNo
17626826DATA TRANSMISSION EVENT USED FOR INTERCONNECTED DIESJanuary 2022September 2024Abandon3220NoNo
17567724DUAL-ACCESS HIGH-PERFORMANCE STORAGE FOR BMC TO HOST DATA SHARINGJanuary 2022April 2024Allow2810YesNo
17646449METHODS AND SYSTEMS FOR COLLECTION OF SYSTEM MANAGEMENT INTERRUPT DATADecember 2021September 2023Allow2130YesNo
17563546DUAL-MODE SIDEBAND INTERFACE FOR SMART NETWORK INTERFACE CONTROLLERDecember 2021May 2023Allow1710NoNo
17555516TRIGGER/ARRAY FOR USING MULTIPLE CAMERAS FOR A CINEMATIC EFFECTDecember 2021January 2023Allow1310NoNo
17543170PCIE COMMUNICATIONSDecember 2021November 2023Allow2320YesNo
17542531TRANSACTION LAYER CIRCUIT OF PCIE AND OPERATION METHOD THEREOFDecember 2021March 2023Allow1610NoNo
17457576MULTI-HOST DIRECT MEMORY ACCESS SYSTEM FOR INTEGRATED CIRCUITSDecember 2021March 2023Allow1620YesNo
17537889METHODS, FLASH MEMORY CONTROLLER, AND ELECTRONIC DEVICE FOR SD MEMORY CARD DEVICENovember 2021January 2023Allow1410NoNo
17527062PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND OPERATING METHOD THEREOFNovember 2021November 2023Allow2410YesNo
17594647SYSTEM AND METHOD FOR FACILITATING EFFICIENT HOST MEMORY ACCESS FROM A NETWORK INTERFACE CONTROLLER (NIC)October 2021May 2023Allow1810YesNo
17594531SYSTEM AND METHOD FOR FACILITATING EFFICIENT MESSAGE MATCHING IN A NETWORK INTERFACE CONTROLLER (NIC)October 2021September 2023Allow2310YesNo
17500325SYSTEM FOR LINK MANAGEMENT BETWEEN MULTIPLE COMMUNICATION CHIPSOctober 2021March 2023Allow1720YesNo
17494839USB DEVICE, USB CABLE AND USB REPEATER THEREOFOctober 2021September 2023Allow2310NoNo
17491689FPGA IMPLEMENTATION OF LOW LATENCY ARCHITECTURE OF XGBOOST FOR INFERENCE AND METHOD THEREFOROctober 2021July 2023Allow2110NoNo
17467070PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND METHOD OF OPERATING THE SAMESeptember 2021February 2024Allow2940YesNo
17467078PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICE AND METHOD OF OPERATING THE SAMESeptember 2021May 2023Allow2110YesNo
17462975DELIVERING INTERRUPTS TO USER-LEVEL APPLICATIONSAugust 2021June 2023Allow2220NoNo
17458574DEVICE ID SETTING METHOD AND ELECTRONIC DEVICE APPLYING THE DEVICE ID SETTING METHODAugust 2021October 2023Allow2620NoNo
17405132APPARATUS AND METHOD FOR INTERRUPT CONTROLAugust 2021March 2023Allow1910NoNo
17395808SYSTEM FOR COMMUNICATING WITH REMOVABLE COMPONENTSAugust 2021March 2023Allow2010NoNo
17444352DYNAMIC RESOURCE MANAGEMENT OF NETWORK DEVICEAugust 2021February 2024Allow3030YesNo
17389994CENTRALIZED INTERRUPT HANDLING FOR CHIPLET PROCESSING UNITSJuly 2021September 2023Allow2620YesNo
17375278SYSTEMS AND METHODS FOR PACKING OF TRANSACTION LAYER (TL) PACKETSJuly 2021September 2023Allow2620YesNo
17422666OPTICAL OUTPUT DEVICE, BUS UNIT, BUS CONTROL UNIT AND METHODSJuly 2021November 2023Allow2830NoNo
17358963Method for data transmission and circuit arrangement thereofJune 2021October 2023Allow2830NoNo
17347882ADJUSTABLE EMBEDDED UNIVERSAL SERIAL BUS 2 LOW-IMPEDANCE DRIVING DURATIONJune 2021March 2025Abandon4540NoYes
17345865EFFICIENT SELECTION OF A PARTICULAR PROCESSOR THREAD FOR HANDLING AN INTERRUPTJune 2021February 2023Allow2010YesNo
17338131CROSS BUS MEMORY MAPPINGJune 2021February 2023Allow2010YesNo
17303561FLEXIBLE DATA HANDLINGJune 2021May 2023Allow2420YesNo
17298556COMMUNICATIONS BUS WITH ISOLATION CIRCUIT TO OPERATE ONE CIRCUIT DOMAIN WHILE ANOTHER IS DEACTIVEMay 2021June 2022Allow1310YesNo
17331101METHOD AND APPARATUS TO PERFORM DYNAMICALLY CONTROLLED INTERRUPT COALESCING FOR A SOLID STATE DRIVEMay 2021September 2024Allow4000NoNo
17295025SYSTEMS AND METHODS INVOLVING HYBRID QUANTUM MACHINES, ASPECTS OF QUANTUM INFORMATION TECHNOLOGY AND/OR OTHER FEATURESMay 2021February 2023Allow2110NoNo
17244182CCIX Port Management for PCI Express TrafficApril 2021November 2023Allow3140YesNo
17237390METHODS AND DEVICES FOR EXTENDING USB 3.0-COMPLIANT COMMUNICATION OVER AN EXTENSION MEDIUMApril 2021March 2022Allow1110NoNo
17221068CONNECTOR CONNECTION VERIFICATION SYSTEMApril 2021December 2023Allow3210NoNo
17216468INTERRUPT COALESCING PROTECTION LOGICMarch 2021June 2022Allow1410YesNo
17201232INPUT/OUTPUT COMMAND REBALANCING IN A VIRTUALIZED COMPUTER SYSTEMMarch 2021January 2024Allow3440YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner HUYNH, KIM T.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
4
Examiner Affirmed
3
(75.0%)
Examiner Reversed
1
(25.0%)
Reversal Percentile
37.6%
Lower than average

What This Means

With a 25.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
13
Allowed After Appeal Filing
6
(46.2%)
Not Allowed After Appeal Filing
7
(53.8%)
Filing Benefit Percentile
73.0%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 46.2% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner HUYNH, KIM T - Prosecution Strategy Guide

Executive Summary

Examiner HUYNH, KIM T works in Art Unit 2184 and has examined 173 patent applications in our dataset. With an allowance rate of 96.0%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 24 months.

Allowance Patterns

Examiner HUYNH, KIM T's allowance rate of 96.0% places them in the 88% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by HUYNH, KIM T receive 1.86 office actions before reaching final disposition. This places the examiner in the 58% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by HUYNH, KIM T is 24 months. This places the examiner in the 70% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +6.4% benefit to allowance rate for applications examined by HUYNH, KIM T. This interview benefit is in the 34% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 38.6% of applications are subsequently allowed. This success rate is in the 86% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 43.3% of cases where such amendments are filed. This entry rate is in the 60% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 40.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 35% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 69.2% of appeals filed. This is in the 50% percentile among all examiners. Of these withdrawals, 22.2% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.

Petition Practice

When applicants file petitions regarding this examiner's actions, 20.0% are granted (fully or in part). This grant rate is in the 11% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 11% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 13% percentile). This examiner rarely issues Quayle actions compared to other examiners. Allowances typically come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.