USPTO Art Unit 2851 Prosecution Statistics

Art Unit Information

Art Unit: 2851
Group: 2850
Tech Center: 2800
Total Cases: 22,247
Last Active: August 2025

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19311808SYSTEMS AND METHODS FOR OPTIMIZING MIXTURE-OF-EXPERTS MODEL PLACEMENT USING QUBO-BASED BIN PACKINGAugust 2025October 2025Allow200NoNo
19238876SYSTEM AND METHOD FOR INTEGRATED CIRCUIT DESIGNJune 2025August 2025Allow200NoNo
19223504METHOD AND SYSTEM FOR FORWARD SYNTHESIS OF DIGITAL PREDISTORTION NONLINEAR MODEL DERIVED FROM CIRCUIT DESCRIPTIONMay 2025October 2025Allow410NoNo
19213847METHOD AND SYSTEM FOR GENERATING OPTIMIZED POWER CONVERTER DESIGN BASED ON MULTIMODAL LARGE LANGUAGE MODELSMay 2025July 2025Allow200NoNo
19206061AI-BASED AUTOMATED CIRCUIT GENERATION METHODMay 2025September 2025Allow410NoNo
19187411DIGITAL CIRCUIT BOARD MAP FOR MONITORING INTEGRATED CIRCUIT CHIPSApril 2025October 2025Allow610YesNo
19054117INLINE MONITORING SYSTEM FOR PROCESS DEFECTS DURING MANUFACTURINGFebruary 2025July 2025Allow500NoNo
19019752DESIGN METHOD FOR THRESHOLD SWITCH DEVICE, THRESHOLD SWITCH DEVICE, AND DYNAMIC MEMORYJanuary 2025April 2025Allow300NoNo
18985139Method for automatic control of simulation error in analog circuit and use thereofDecember 2024June 2025Allow510YesNo
18979115RECONFIGURABLE, HIGH STABILITY GATE-TUNNELING PHYSICAL UNCLONABLE FUNCTIONDecember 2024September 2025Allow911NoNo
18958946THREE-DIMENSIONAL SIMULATION AND PREDICTION METHOD FOR ROCK COLLAPSE MOVEMENT PROCESS CONSIDERING DYNAMIC FRAGMENTATION EFFECTNovember 2024May 2025Allow510NoNo
18935622RECONFIGURABLE INTEGRATED CIRCUIT (IC) DEVICE AND A SYSTEM AND METHOD OF CONFIGURING THEREOFNovember 2024March 2025Allow410YesNo
18856912PATH-BASED LAYER STACK CONNECTIVITY CHECK FOR PLASMA INDUCED DAMAGE AVOIDANCEOctober 2024November 2025Allow1320NoNo
18908028METHOD FOR TRAINING AI MODELS TO GENERATE 3D CAD DESIGNSOctober 2024January 2025Allow310NoNo
18907937COMPUTERIZED SYSTEM AND METHOD FOR 3D CAD DESIGN GENERATIONOctober 2024January 2025Allow310YesNo
18897957ELECTRIC VEHICLE CHARGING CONNECTOR ADAPTER NESTED IN AN ELECTRIC VEHICLE SUPPLY EQUIPMENTSeptember 2024December 2024Allow300NoNo
18894471OPTIMIZING QUANTUM CIRCUITS WITH PERMUTABLE INPUT REGISTERSSeptember 2024January 2025Allow410NoNo
18823587QUICK SIMULATION AND OPTIMIZATION METHOD AND SYSTEM FOR ANALOG CIRCUITSSeptember 2024November 2024Allow310NoNo
18820276PREDICTION METHOD FOR WATER QUALITY BIOTOXICITY BASED ON ARTIFICIAL INTELLIGENCE NEURAL NETWORKAugust 2024November 2024Allow200NoNo
18814432MASK OPTIMIZATION ACCOUNTING FOR MORE CRITICAL AND LESS CRITICAL OVERLAP REGIONSAugust 2024February 2026Allow1800NoNo
18814426MASK OPTIMIZATION FOR FIRST LAYER THAT ACCOUNTS FOR OTHER LAYERSAugust 2024February 2026Allow1800YesNo
18808188VARIATION TRIMMING FOR RE-PROGRAMMABLE AND/OR RECONFIGURABLE ANALOG CIRCUITRYAugust 2024December 2024Allow310NoNo
18804644DETERMINISTIC PARALLEL ROUTING APPROACH FOR ACCELERATING PATHFINDER-BASED ALGORITHMSAugust 2024January 2025Allow610YesNo
18800058DESIGN AUTOMATION METHODS FOR 3D INTEGRATED CIRCUITS AND DEVICESAugust 2024September 2025Allow1310YesNo
18793209SYSTEM AND COMPUTER-READABLE MEDIUM FOR IMPROVING THE CRITICAL PATH DELAY OF A FPGA ROUTING TOOL AT SMALLER CHANNEL WIDTHSAugust 2024February 2025Allow610YesNo
18774674METHOD FOR DETERMINING RELATIVE ENERGY BETWEEN SYSTEMS, AND ELECTRONIC DEVICEJuly 2024January 2025Allow610NoNo
18772680OPTIMIZED LAYOUT CELLJuly 2024August 2025Allow1310YesNo
18768895INTEGRATED CIRCUIT, SYSTEM FOR AND METHOD OF FORMING AN INTEGRATED CIRCUITJuly 2024May 2025Allow1010NoNo
18727294A Soft Measurement Method For Dioxin Emission Of Grate Furnace MSWI Process Based On Simplified Deep Forest Regression Of Residual Fitting MechanismJuly 2024June 2025Abandon1100NoNo
18764122SILICON PHOTONIC CHIP, LIDAR, AND MOBILE DEVICEJuly 2024November 2024Allow400YesNo
18762149Battery PackJuly 2024March 2026Allow2020YesNo
18754815ELECTROMIGRATION EVALUATION METHODOLOGY WITH CONSIDERATION OF THERMAL AND SIGNAL EFFECTSJune 2024May 2025Allow1110NoNo
18750377INTEGRATED CIRCUIT STRUCTURES HAVING A WATERMARKJune 2024February 2025Allow710NoNo
18746888INTEGRATED CIRCUIT AND METHOD OF FORMING SAME AND A SYSTEMJune 2024April 2025Allow1010NoNo
18745089SYSTEM AND METHOD FOR ESL MODELING OF MACHINE LEARNINGJune 2024March 2025Allow900NoNo
18745854TEST PATTERN GENERATION SYSTEMS AND METHODSJune 2024December 2025Allow1820NoNo
18744347METHOD AND SYSTEM FOR VERIFYING OPERATION AND DATA PRECISION OF HARDWARE FOR ARTIFICIAL INTELLIGENCEJune 2024August 2024Allow200NoNo
18744236Systems And Methods For Wireless Power And Data Transfer Utilizing Multiple Antenna ReceiversJune 2024January 2025Allow700YesNo
18742135Method of Generating a 3d Computer-Aided Design (CAD) and System ThereforJune 2024October 2024Allow410YesNo
18741840STRUCTURE AND METHOD OF RECTANGULAR CELL IN SEMICONDUCTOR DEVICEJune 2024March 2025Allow900NoNo
18741003SEMICONDUCTOR DEVICE HAVING POWER RAIL WITH NON-LINEAR EDGEJune 2024January 2025Allow800NoNo
18739703INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAMEJune 2024October 2025Allow1611NoNo
18739249GROUND MOTION INTENSITY MEASURE OPTIMIZATION METHOD FOR SEISMIC RESPONSE PREDICTIONJune 2024November 2024Allow510NoNo
18739108REDUCED STANDBY CURRENT IN A MULTI-BATTERY WEARABLE DEVICEJune 2024February 2025Allow900NoNo
18737156SYSTEM AND METHOD FOR DIAGNOSING DESIGN RULE CHECK VIOLATIONSJune 2024March 2026Allow2120YesNo
18675048VERIFICATION OF HARDWARE DESIGN FOR DATA TRANSFORMATION COMPONENTMay 2024March 2025Allow1010NoNo
18672836GEOMETRIC MASK RULE CHECK WITH FAVORABLE AND UNFAVORABLE ZONESMay 2024April 2025Allow1110NoNo
18669864AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGNMay 2024March 2025Allow1010NoNo
18670009INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD OF MANUFACTURING THE INTEGRATED CIRCUITMay 2024December 2025Allow1930YesNo
18668565SYSTEM AND METHOD FOR MANAGING BATTERYMay 2024October 2025Allow1711NoNo
18668666COMBINED CLASSICAL/QUANTUM PREDICTOR EVALUATION WITH MODEL ACCURACY ADJUSTMENTMay 2024June 2025Allow1310YesNo
18664330METHOD FOR ANALYZING STATIC ANALOG INTEGRATED CIRCUIT LAYOUTMay 2024July 2024Allow200NoNo
18665300CIRCUIT DESIGN VISIBILITY IN INTEGRATED CIRCUIT DEVICESMay 2024October 2025Allow1711YesNo
18661432Wireless Charging System with a Switchable Magnetic CoreMay 2024January 2025Allow900NoNo
18657435METHODS AND SYSTEMS FOR RETICLE ENHANCEMENT TECHNOLOGY OF A DESIGN PATTERN TO BE MANUFACTURED ON A SUBSTRATEMay 2024March 2025Allow1010NoNo
18653705VARIATIONAL QUANTUM STATE PREPARATIONMay 2024March 2025Allow1010NoNo
18652787SYSTEM AND METHOD FOR CLOCK DISTRIBUTION IN A DIGITAL CIRCUITMay 2024February 2025Allow910NoNo
18649495ELECTRIC SHIELDING STRUCTURESApril 2024March 2025Allow1000NoNo
18649893VIRTUAL ISOLATED PATTERN LAYER: ISOLATED PATTERN RECOGNITION, EXTRACTION AND COMPRESSIONApril 2024June 2025Allow1310YesNo
18639905METROLOGY METHOD AND APPARATUS, COMPUTER PROGRAM AND LITHOGRAPHIC SYSTEMApril 2024December 2025Allow2021NoNo
18638199METHODS OF DESIGNING LAYOUT OF SEMICONDUCTOR DEVICE AND METHODS FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAMEApril 2024June 2025Allow1320YesNo
18637326DISTANCE-BASED ENERGY TRANSFER FROM A TRANSPORTApril 2024July 2025Allow1510NoNo
18636859ROBUST AND ACCURATE OVERLAY TARGET DESIGN FOR CMPApril 2024September 2025Allow1700NoNo
18637172ACTIVE STABILIZATION OF COHERENT CONTROLLERS USING NEARBY QUBITSApril 2024July 2025Allow1510NoNo
18631549Battery Charge/Discharge Control Device and Battery Management DeviceApril 2024January 2025Allow900NoNo
18626291ENFORCING MASK SYNTHESIS CONSISTENCY ACROSS RANDOM AREAS OF INTEGRATED CIRCUIT CHIPSApril 2024November 2024Allow700NoNo
18697746LAYOUT METHOD AND APPARATUS BASED ON GENETIC ALGORITHMApril 2024September 2024Allow510NoNo
18624471SYSTEMS AND METHODS FOR PREDICTING FILM THICKNESS USING VIRTUAL METROLOGYApril 2024July 2025Allow1510NoNo
18624269ELECTRICALLY POWERED VEHICLE AND METHOD FOR CONTROLLING ELECTRICALLY POWERED VEHICLEApril 2024August 2025Allow1710YesNo
18622334SYSTEM AND METHOD FOR DETERMINING PATHS BETWEEN LOCATIONS IN A PHYSICAL SYSTEMMarch 2024November 2024Allow700NoNo
18617419MODELING METHOD OF FLICKER NOISE OF SMALL-SIZED SEMICONDUCTOR DEVICEMarch 2024June 2024Allow200NoNo
18615880APPARATUS AND METHOD FOR INSTANTANEOUS GENERATION OF A PIN PLACEMENT QUOTE IN AN INJECTION MOLDING PROCESSMarch 2024September 2024Allow510YesNo
18610245NOISE SIMULATION SYSTEMMarch 2024March 2025Allow1210NoNo
18608178SEMICONDUCTOR DEVICE FOR REGULATING INTEGRATED CIRCUIT TIMING AND POWER CONSUMPTIONMarch 2024March 2025Allow1201NoNo
18606783METHODS FOR MODELING OF A DESIGN IN RETICLE ENHANCEMENT TECHNOLOGYMarch 2024May 2025Allow1411NoNo
18605355RAIL POWER DENSITY AWARE STANDARD CELL PLACEMENT FOR INTEGRATED CIRCUITSMarch 2024February 2025Allow1110NoNo
18690750INTELLIGENT DRAWING-MODEL CHECKING METHOD AND APPARATUSMarch 2024September 2024Allow700NoNo
18601629LOGIC REPOSITORY SERVICE USING ENCRYPTED CONFIGURATION DATAMarch 2024June 2025Allow1511NoNo
18591680PARAMETER SEARCH METHODFebruary 2024October 2024Allow800NoNo
18591804Wireless Charging Coil In Wearable DevicesFebruary 2024August 2025Allow1710NoNo
18588866INFORMATION PROCESSING METHOD AND INFORMATION PROCESSING SYSTEMFebruary 2024April 2025Allow1310NoNo
18585089METHOD AND SYSTEM FOR SHIP STABILITY PREDICTION BY WEIGHTED FUSION OF RADIAL BASIS FUNCTION NEURAL NETWORK AND RANDOM FOREST BASED ON GRADIENT DESCENTFebruary 2024June 2024Allow400NoNo
18444142APPARATUS AND METHOD FOR GENERATING A PARAMETERIZED WAVEGUIDE OPTICAL ELEMENTSFebruary 2024December 2024Allow1010NoNo
18439287OVERLAYING ON LOCALLY DISPOSITIONED PATTERNS BY ML BASED DYNAMIC DIGITAL CORRECTIONS (ML-DDC)February 2024January 2025Allow1110NoNo
18439639VOLTAGE IMPACTS ON DELAYS FOR TIMING SIMULATIONFebruary 2024January 2025Allow1110NoNo
18439664METHOD AND APPARATUS IMPROVING GATE OXIDE RELIABILITY BY CONTROLLING ACCUMULATED CHARGEFebruary 2024September 2025Allow1920YesNo
18437740HARD-TO-FIX (HTF) DESIGN RULE CHECK (DRC) VIOLATIONS PREDICTIONFebruary 2024January 2025Allow1110NoNo
18436736Power Distribution for Modular StorageFebruary 2024September 2025Allow1910NoNo
18435993FPGA Specialist Processing Block for Machine LearningFebruary 2024February 2025Allow1210YesNo
18434090METHOD, APPARATUS, TERMINAL AND STORAGE MEDIUM FOR QUANTUM TOPOLOGY GRAPH OPTIMIZATIONFebruary 2024January 2025Allow1210NoNo
18434345SEMICONDUCTOR PROCESS TECHNOLOGY ASSESSMENTFebruary 2024January 2025Allow1110NoNo
18433337METHOD, MEDIUM AND SYSTEM FOR DETERMINING DEMOLITION POINTS OF LARGE BUILDINGFebruary 2024June 2024Allow400YesNo
18430477DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEFebruary 2024December 2024Allow1110NoNo
18427791METHOD TO INTEGRATE DIVERSE COMPONENTS FOR SIMULATION OF COMPLEX SYSTEMJanuary 2024February 2025Allow1310NoNo
18427577METHOD AND SYSTEM FOR RETICLE ENHANCEMENT TECHNOLOGYJanuary 2024December 2024Allow1110NoNo
18424979DETUNING MODULATED COMPOSITE PULSES FOR HIGH-FIDELITY ROBUST QUANTUM CONTROLJanuary 2024December 2025Allow2311NoNo
18421757METHOD FOR PLACING SEMICONDUCTOR DEVICES IN CONSIDERATION OF DISTANCE INFORMATION FROM MACRO DEVICEJanuary 2024November 2024Abandon1010NoNo
18421644INTEGRATED CIRCUIT LAYOUT GENERATION METHODJanuary 2024March 2025Allow1310NoNo
18421870METHOD FOR DESIGNING SEMICONDUCTOR BASED ON GROUPING MACRO CELLSJanuary 2024November 2024Abandon1010NoNo
18421808METHOD FOR INTEGRATED CIRCUIT DESIGN USING PIN DIRECTION OPTIMIZATIONJanuary 2024November 2024Abandon1010NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2851.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
90
Examiner Affirmed
63
(70.0%)
Examiner Reversed
27
(30.0%)
Reversal Percentile
37.6%
Lower than average

What This Means

With a 30.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
590
Allowed After Appeal Filing
236
(40.0%)
Not Allowed After Appeal Filing
354
(60.0%)
Filing Benefit Percentile
87.0%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 40.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2851 - Prosecution Statistics Summary

Executive Summary

Art Unit 2851 is part of Group 2850 in Technology Center 2800. This art unit has examined 22,247 patent applications in our dataset, with an overall allowance rate of 89.0%. Applications typically reach final disposition in approximately 22 months.

Comparative Analysis

Art Unit 2851's allowance rate of 89.0% places it in the 88% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2851 receive an average of 1.29 office actions before reaching final disposition (in the 11% percentile). The median prosecution time is 22 months (in the 91% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.