USPTO Art Unit 2819 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17138227METHOD OF MAKING MOISTURE BARRIER FOR BOND PADS AND INTEGRATED CIRCUIT HAVING THE SAMEDecember 2020March 2022Allow1410NoNo
17137643SEMICONDUCTOR DEVICE WITH A LIFETIME KILLER REGION IN THE SUBSTRATEDecember 2020July 2022Allow1810YesNo
17138825DISPLAY PANEL AND DISPLAY DEVICEDecember 2020November 2023Allow3401NoNo
17138394LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC APPLIANCE, AND LIGHTING DEVICEDecember 2020September 2022Allow2000NoNo
17137363POWER MODULE PACKAGE STRUCTUREDecember 2020September 2022Allow2010NoNo
17137300Image sensor and manufacturing method thereofDecember 2020January 2023Allow2410NoNo
17136169NANO MULTILAYER CARBON-RICH LOW-K SPACERDecember 2020August 2023Allow3220YesNo
17136286SPACER WITH PATTERN LAYOUT FOR DUAL SIDE COOLING POWER MODULEDecember 2020September 2022Allow2111YesNo
17135590METHOD FOR FORMING IMAGE SENSORDecember 2020June 2022Allow1810YesNo
17135778INTER-LEVEL CONNECTION FOR MULTI-LAYER STRUCTURESDecember 2020August 2022Allow2010NoNo
17135486LIGHT EMITTING DEVICE INCLUDING LIGHT EMITTING UNIT ARRANGED IN A TUBEDecember 2020July 2022Allow1900NoNo
17256185METHOD FOR TRANSFERING CHIP, DISPLAY DEVICE, CHIP AND TARGET SUBSTRATEDecember 2020October 2023Allow3400NoNo
17133178SEMICONDUCTOR DEVICE WITH IMPROVED CONTACT RESISTANCE AND VIA CONNECTIVITYDecember 2020January 2023Allow2520YesNo
17131568JFET WITH IMPLANT ISOLATIONDecember 2020December 2022Allow2401YesNo
17129971HIGH ASPECT RATIO VIAS FOR INTEGRATED CIRCUITSDecember 2020February 2023Allow2621NoNo
17128383REMOTELY CONTROLLING ASPECTS OF POOLS AND SPASDecember 2020April 2022Allow1610NoNo
17129422AVALANCHE DIODE ALONG WITH VERTICAL PN JUNCTION AND METHOD FOR MANUFACTURING THE SAME FIELDDecember 2020January 2022Allow1300NoNo
17127083PAD-OUT STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAMEDecember 2020March 2022Allow1510YesNo
17127019PAD STRUCTURES FOR SEMICONDUCTOR DEVICESDecember 2020April 2022Allow1610NoNo
17127671SEMICONDUCTOR PACKAGE INCLUDING ALIGNMENT MATERIAL AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGEDecember 2020August 2022Allow2010NoNo
17127750FAN-OUT WAFER-LEVEL PACKAGING (FOWLP) INTEGRATED CIRCUITS (ICs) EMPLOYING AN ELECTRO-MAGNETIC INTERFERENCE (EMI) SHIELD STRUCTURE IN UNUSED FAN-OUT AREA FOR EMI SHIELDING, AND RELATED FABRICATION METHODSDecember 2020April 2023Abandon2811NoNo
17127230SEMICONDUCTOR DEVICE INCLUDING FIN-FET AND MISALIGNED SOURCE AND DRAIN CONTACTSDecember 2020February 2023Allow2620NoNo
17127323MICROSCALE METALLIC CNT TEMPLATED DEVICES AND RELATED METHODSDecember 2020August 2022Allow2010YesNo
17124762SEMICONDUCTOR DIE FOR DETERMINING LOAD OF THROUGH SILICON VIA AND SEMICONDUCTOR DEVICE INCLUDING THE SAMEDecember 2020September 2021Allow900NoNo
17124801FUSES TO MEASURE ELECTROSTATIC DISCHARGE DURING DIE TO SUBSTRATE OR PACKAGE ASSEMBLYDecember 2020July 2022Allow1910NoNo
17125215Polarization Axis Attenuation and Cross Polarization Resistant Antenna Orientation Assembly for Tracked ObjectDecember 2020February 2022Allow1410NoNo
17125995RELIABLE SEMICONDUCTOR PACKAGES FOR SENSOR CHIPSDecember 2020February 2023Allow2631NoNo
17125593INTEGRATED CIRCUIT PACKAGES WITH CONDUCTIVE ELEMENT HAVING CAVITIES HOUSING ELECTRICALLY CONNECTED EMBEDDED COMPONENTSDecember 2020September 2023Allow3320NoNo
17122934SACRIFICIAL REDISTRIBUTION LAYER IN MICROELECTRONIC ASSEMBLIES HAVING DIRECT BONDINGDecember 2020August 2022Allow2011YesNo
17252357METHOD FOR MANUFACTURING A MEMORY DEVICE AND MEMORY DEVICE MANUFACTURED THROUGH THE SAME METHODDecember 2020November 2023Allow3511YesNo
17120524OPTOELECTRONIC ASSEMBLY AND METHOD FOR PRODUCING AN OPTOELECTRONIC ASSEMBLYDecember 2020April 2022Allow1620YesNo
17120696Contact Plug With Impurity VariationDecember 2020March 2022Allow1510YesNo
17120932Short Circuit Protection Structure in MOS-Gated Power DevicesDecember 2020February 2023Allow2610YesNo
17120902INTEGRATED CIRCUITS USING GUARD RINGS FOR ESD SYSTEMSDecember 2020September 2022Allow2110YesNo
17120769CHIP PACKAGE WITH REDISTRIBUTION LAYERSDecember 2020February 2022Allow1410NoNo
17121222WIRING SUBSTRATE AND SEMICONDUCTOR DEVICEDecember 2020April 2022Allow1610NoNo
17119771SEMICONDUCTOR DEVICE WITH CAPACITORS HAVING SHARED ELECTRODE AND METHOD FOR FABRICATING THE SAMEDecember 2020January 2023Allow2511NoNo
17119095SEMICONDUCTOR MEMORY DEVICEDecember 2020March 2022Allow1600NoNo
17118502PROCESS OF FORMING HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND HEMT FORMED BY THE SAMEDecember 2020April 2022Abandon1610NoNo
17113170MOLDED SEMICONDUCTOR PACKAGE WITH HIGH VOLTAGE ISOLATIONDecember 2020February 2022Allow1400NoNo
17114391SILICON CONTROLLED RECTIFIER WITH A GATE ELECTRODE FOR ELECTROSTATIC DISCHARGE PROTECTIONDecember 2020March 2022Allow1511NoNo
17113653METAL OXIDE FILM, SEMICONDUCTOR DEVICE, AND DISPLAY DEVICEDecember 2020February 2022Allow1410YesNo
17113563SEMICONDUCTOR DEVICE ALONG WITH MULTI-FUNCTIONAL UNITS AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICEDecember 2020January 2023Allow2500NoNo
17113345SEMICONDUCTOR DEVICE PACKAGE HAVING THERMAL DISSIPATION FEATURE AND METHOD THEREFORDecember 2020May 2023Allow2920NoNo
17111335SEMICONDUCTOR DEVICE PACKAGE INCLUDING PROMOTERS AND METHOD OF MANUFACTURING THE SAMEDecember 2020July 2022Allow2010NoNo
17110762TAILORING SENSOR EMISSION POWER TO MAP, VEHICLE STATE, AND ENVIRONMENTDecember 2020January 2022Allow1410NoNo
15734772SEMICONDUCTOR CHIP STACK ARRANGEMENT AND SEMICONDUCTOR CHIP FOR PRODUCING SUCH A SEMICONDUCTOR CHIP STACK ARRANGEMENTDecember 2020March 2022Allow1510NoNo
17111347SEMICONDUCTOR PACKAGE STRUCTURE INCLUDING SHIELDING LAYER CONTACTING CONDUCTIVE CONTACTDecember 2020May 2023Allow2911YesNo
17247200CONNECTING CLIP DESIGN FOR PRESSURE SINTERINGDecember 2020June 2023Allow3101YesNo
17109675PACKAGING OF A SEMICONDUCTOR DEVICE WITH A PLURALITY OF LEADSDecember 2020June 2021Allow700NoNo
17109464BIPOLAR JUNCTION TRANSISTOR (BJT) STRUCTURE AND RELATED METHODDecember 2020October 2022Allow2311YesNo
17109720HIGHLY STABLE ELECTRONIC DEVICE EMPLOYING HYDROPHOBIC COATING LAYERDecember 2020June 2022Allow1810NoNo
17108304DISPLAY DEVICEDecember 2020June 2023Allow3010NoNo
15734180OPTOELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING SAMEDecember 2020March 2024Abandon4001NoNo
17108600SEMICONDUCTOR DEVICE HAVING STAGGERED GATE-STUB-SIZE PROFILE AND METHOD OF MANUFACTURING SAMEDecember 2020August 2023Allow3211YesNo
17106350IMAGE SENSOR WITH A HIGH ABSORPTION LAYERNovember 2020July 2023Allow3211NoNo
17105524INDUCTOR MODULE AND METHOD FOR FABRICATING THE SAMENovember 2020January 2023Allow2612NoNo
17104588THERMALLY CONDUCTIVE MOLDING COMPOUND STRUCTURE FOR HEAT DISSIPATION IN SEMICONDUCTOR PACKAGESNovember 2020September 2022Allow2210NoNo
17105289ORGANIC LIGHT EMITTING DISPLAY DEVICE HAVING A RESONANCE STRUCTURE OF PROPER INTERNAL REFLECTION BY INCLUDING A LIGHT EXTRACTION REDUCTION PREVENTING LAYERNovember 2020January 2022Allow1410NoNo
17104850INORGANIC LIGHT EMITTING DISPLAY DEVICE WITH INORGANIC FILMNovember 2020October 2023Allow3510NoNo
17103887SEMICONDUCTOR WAFER AND SEMICONDUCTOR DEVICE FOR SUPPRESSING THE PROPAGATION OF CRACKSNovember 2020December 2021Allow1210NoNo
17103107MODULE-ROTATION LED DOMENovember 2020March 2023Allow2720NoNo
17101443SEMICONDUCTOR PACKAGE INCLUDING DUMMY BUMPNovember 2020May 2022Allow1810NoNo
17102104MULTILAYERED MEMORY DEVICE WITH THROUGH-SILICON VIA(TSV), SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMENovember 2020November 2021Allow1110NoNo
17100923DISPLAY DEVICE INCLUDING FAN-OUT LINESNovember 2020March 2022Allow1510NoNo
17100933LIGHT EMITTING ARRAY STRUCTURE AND DISPLAYNovember 2020January 2023Allow2610NoNo
17100874THREE-DIMENSIONAL MEMORY DEVICE WITHOUT GATE LINE SLITS AND METHOD FOR FORMING THE SAMENovember 2020April 2023Allow2901NoNo
17100007Systems and Methods for Releveled Bump Planes for ChipletsNovember 2020January 2022Allow1400NoNo
17100544FDSOI DEVICE STRUCTURE AND PREPARATION METHOD THEREOFNovember 2020February 2022Allow1510YesNo
17100610SEMICONDUCTOR ASSEMBLIES WITH REDISTRIBUTION STRUCTURES FOR DIE STACK SIGNAL ROUTINGNovember 2020August 2022Allow2121YesNo
17057351CHIP TRANSFER METHOD, DISPLAY DEVICE, CHIP AND TARGET SUBSTRATENovember 2020November 2022Allow2410NoNo
16953949SEMICONDUCTOR STRUCTURE WITH OXIDIZED RUTHENIUMNovember 2020April 2023Allow2910NoNo
16952272DISPLAY DEVICE INCLUDING CONCAVE/CONVEX STRUCTURE IN THE INORGANIC INSULATION LAYERNovember 2020January 2022Allow1410YesNo
16952438FIELD PLATE STRUCTURE FOR HIGH VOLTAGE DEVICENovember 2020January 2022Allow1410NoNo
16952707VAPOR DEPOSITION MASK, VAPOR DEPOSITION METHOD, AND PRODUCTION METHOD FOR ORGANIC EL DISPLAY DEVICENovember 2020December 2023Abandon3601NoNo
16952062PACKAGE STRUCTURE WITH PROTECTIVE STRUCTURE AND METHOD OF FABRICATING THE SAMENovember 2020August 2022Allow2100NoNo
16951595THREE-DIMENSIONAL MEMORY DEVICE AND METHODNovember 2020October 2022Allow2301NoNo
16951511Multi-Chip Semiconductor PackageNovember 2020June 2022Allow1920YesNo
16950248Radar-Based Gesture Enhancement for Voice InterfacesNovember 2020March 2022Allow1610YesNo
16950138X-RAY SHIELDING DEPOSITION METHOD FOR ELECTRON-BEAM DEPOSITED COATINGSNovember 2020February 2022Allow1510NoNo
16950295Selective EMI Shielding Using Preformed MaskNovember 2020January 2023Allow2610NoNo
16950115METHODS OF FORMING ASSEMBLIES HAVING HEAVILY DOPED REGIONSNovember 2020January 2023Allow2600NoNo
16950518SEMICONDUCTOR DEVICE WITH FUSE AND ANTI-FUSE STRUCTURES AND METHOD FOR FORMING THE SAMENovember 2020September 2022Allow2210NoNo
17099129SEMICONDUCTOR BONDING PAD DEVICE AND METHOD FOR FORMING THE SAMENovember 2020December 2022Allow2410NoNo
17099142Integrated Circuits with Channel-Strain LinerNovember 2020April 2022Allow1710NoNo
17094543BONDED ASSEMBLY FORMED BY HYBRID WAFER BONDING USING SELECTIVELY DEPOSITED METAL LINERSNovember 2020April 2022Allow1710NoNo
17093974SEMICONDUCTOR DEVICE STRUCTURE WITH BOTTLE-SHAPED THROUGH SILICON VIA AND METHOD FOR FORMING THE SAMENovember 2020February 2022Allow1500NoNo
16965603Method for Contacting and Packetising a Semiconductor ChipNovember 2020June 2023Allow3520NoNo
17094798METHOD FOR THE PRODUCTION OF AN ELECTRONIC ARRANGEMENT AND THE ELECTRONIC ARRANGEMENTNovember 2020December 2022Allow2521NoNo
17092765METHOD OF FORMING NANOWIRE CONNECTS ON (PHOTOVOLTIAC) PV CELLSNovember 2020September 2022Allow2300NoNo
17092350LED Display Screen with Rotated LED ModulesNovember 2020November 2022Allow2410NoNo
17089958TESTING STRUCTURE AND DISPLAY DEVICE INCLUDING THE SAMENovember 2020February 2023Allow2810NoNo
17089900DISPLAY APPARATUSNovember 2020March 2022Allow1610NoNo
17053003COMPOSITE ASSEMBLY OF THREE STACKED JOINING PARTNERSNovember 2020September 2022Allow2310NoNo
17087667VERTICAL POWER PLANE MODULE FOR SEMICONDUCTOR PACKAGESNovember 2020January 2022Allow1500NoNo
17087326JUNCTION FIELD EFFECT TRANSISTOR ON SILICON-ON-INSULATOR SUBSTRATENovember 2020August 2022Allow2121YesNo
17086532ORGANIC LIGHT EMITTING DISPLAY DEVICENovember 2020August 2023Allow3320NoNo
17086000FIELD-PLATE TRENCH FET AND ASSOCIATED METHOD FOR MANUFACTURINGOctober 2020June 2022Allow1911NoNo
17085467SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAMEOctober 2020January 2022Allow1501NoNo
17086017SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOFOctober 2020May 2023Allow3010NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2819.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
53
Examiner Affirmed
35
(66.0%)
Examiner Reversed
18
(34.0%)
Reversal Percentile
58.7%
Higher than average

What This Means

With a 34.0% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
333
Allowed After Appeal Filing
125
(37.5%)
Not Allowed After Appeal Filing
208
(62.5%)
Filing Benefit Percentile
75.3%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 37.5% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2819 - Prosecution Statistics Summary

Executive Summary

Art Unit 2819 is part of Group 2810 in Technology Center 2800. This art unit has examined 20,830 patent applications in our dataset, with an overall allowance rate of 92.1%. Applications typically reach final disposition in approximately 19 months.

Comparative Analysis

Art Unit 2819's allowance rate of 92.1% places it in the 93% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2819 receive an average of 1.19 office actions before reaching final disposition (in the 7% percentile). The median prosecution time is 19 months (in the 95% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.