USPTO Examiner MAZUMDER DIDARUL A - Art Unit 2819

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17135590METHOD FOR FORMING IMAGE SENSORDecember 2020June 2022Allow1810YesNo
17135778INTER-LEVEL CONNECTION FOR MULTI-LAYER STRUCTURESDecember 2020August 2022Allow2010NoNo
17256185METHOD FOR TRANSFERING CHIP, DISPLAY DEVICE, CHIP AND TARGET SUBSTRATEDecember 2020October 2023Allow3400NoNo
17129422AVALANCHE DIODE ALONG WITH VERTICAL PN JUNCTION AND METHOD FOR MANUFACTURING THE SAME FIELDDecember 2020January 2022Allow1300NoNo
17127750FAN-OUT WAFER-LEVEL PACKAGING (FOWLP) INTEGRATED CIRCUITS (ICs) EMPLOYING AN ELECTRO-MAGNETIC INTERFERENCE (EMI) SHIELD STRUCTURE IN UNUSED FAN-OUT AREA FOR EMI SHIELDING, AND RELATED FABRICATION METHODSDecember 2020April 2023Abandon2811NoNo
17125995RELIABLE SEMICONDUCTOR PACKAGES FOR SENSOR CHIPSDecember 2020February 2023Allow2631NoNo
17122934SACRIFICIAL REDISTRIBUTION LAYER IN MICROELECTRONIC ASSEMBLIES HAVING DIRECT BONDINGDecember 2020August 2022Allow2011YesNo
17120769CHIP PACKAGE WITH REDISTRIBUTION LAYERSDecember 2020February 2022Allow1410NoNo
17113563SEMICONDUCTOR DEVICE ALONG WITH MULTI-FUNCTIONAL UNITS AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICEDecember 2020January 2023Allow2500NoNo
17111347SEMICONDUCTOR PACKAGE STRUCTURE INCLUDING SHIELDING LAYER CONTACTING CONDUCTIVE CONTACTDecember 2020May 2023Allow2911YesNo
17104588THERMALLY CONDUCTIVE MOLDING COMPOUND STRUCTURE FOR HEAT DISSIPATION IN SEMICONDUCTOR PACKAGESNovember 2020September 2022Allow2210NoNo
17105289ORGANIC LIGHT EMITTING DISPLAY DEVICE HAVING A RESONANCE STRUCTURE OF PROPER INTERNAL REFLECTION BY INCLUDING A LIGHT EXTRACTION REDUCTION PREVENTING LAYERNovember 2020January 2022Allow1410NoNo
17100923DISPLAY DEVICE INCLUDING FAN-OUT LINESNovember 2020March 2022Allow1510NoNo
17100610SEMICONDUCTOR ASSEMBLIES WITH REDISTRIBUTION STRUCTURES FOR DIE STACK SIGNAL ROUTINGNovember 2020August 2022Allow2121YesNo
17057351CHIP TRANSFER METHOD, DISPLAY DEVICE, CHIP AND TARGET SUBSTRATENovember 2020November 2022Allow2410NoNo
16952272DISPLAY DEVICE INCLUDING CONCAVE/CONVEX STRUCTURE IN THE INORGANIC INSULATION LAYERNovember 2020January 2022Allow1410YesNo
16952438FIELD PLATE STRUCTURE FOR HIGH VOLTAGE DEVICENovember 2020January 2022Allow1410NoNo
16950138X-RAY SHIELDING DEPOSITION METHOD FOR ELECTRON-BEAM DEPOSITED COATINGSNovember 2020February 2022Allow1510NoNo
16950295Selective EMI Shielding Using Preformed MaskNovember 2020January 2023Allow2610NoNo
16965603Method for Contacting and Packetising a Semiconductor ChipNovember 2020June 2023Allow3520NoNo
17092765METHOD OF FORMING NANOWIRE CONNECTS ON (PHOTOVOLTIAC) PV CELLSNovember 2020September 2022Allow2300NoNo
17085467SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAMEOctober 2020January 2022Allow1501NoNo
17083506MANUFACTURING METHOD OF HIGH FREQUENCY MODULE AND HIGH FREQUENCY MODULE HAVING GROOVE IN SEALING RESIN LAYEROctober 2020December 2021Allow1400NoNo
17084496BONDING STRUCTURE, PACKAGE STRUCTURE, AND METHOD FOR MANUFACTURING PACKAGE STRUCTUREOctober 2020March 2022Allow1711NoNo
17082766SEMICONDUCTOR DEVICEOctober 2020November 2021Allow1301NoNo
17081238PATTERNED SHIELDING STRUCTURE AND INTEGRATED INDUCTOROctober 2020May 2022Allow1811NoNo
17081945COUPLING OF INTEGRATED CIRCUITS (ICS) THROUGH A PASSIVATION-DEFINED CONTACT PADOctober 2020June 2022Allow1911NoNo
17078583SPACER-DEFINED BACK-END TRANSISTOR AS MEMORY SELECTOROctober 2020November 2021Allow1301NoNo
17076106ELECTRONIC DEVICE PACKAGE AND METHOD OF MANUFACTURING ELECTRONIC DEVICE PACKAGEOctober 2020September 2022Allow2301NoNo
17072047DISPLAY DEVICE WITH IMPROVED IMAGE QUALITY DEGRADATIONOctober 2020March 2022Allow1701NoNo
17066408ELECTRONIC PACKAGE WITH WETTABLE FLANK AND SHIELDING LAYER AND MANUFACTURING METHOD THEREOFOctober 2020May 2022Allow2011NoNo
17065635SEMICONDUCTOR DEVICE COMPRISING STACKED OXIDE SEMICONDUCTOR LAYERSOctober 2020August 2021Allow1110NoNo
17064700TECHNIQUES TO INCREASE CMOS IMAGE SENSOR WELL DEPTH BY CRYOGENIC ION CHANNELING OF ULTRA HIGH ENERGY IONSOctober 2020July 2023Allow3420YesNo
16948803MULTI-SEGMENT WIRE-BONDOctober 2020July 2022Allow2211YesNo
17038756Flip-Chip Die Package Structure and Electronic DeviceSeptember 2020October 2021Allow1200NoNo
17038177SEMICONDUCTOR APPARATUS AND EQUIPMENTSeptember 2020February 2022Allow1601NoNo
17032225SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR WAFERSeptember 2020February 2022Allow1600NoNo
17030528PACKAGED CIRCUIT STRUCTURE INCLUDING CIRCUIT STRCUTRE WITH ANTENNA AND METHOD FOR MANUFACTURING THE SAMESeptember 2020January 2022Allow1511NoNo
17040817MANUFACTURING METHOD OF ELECTRONIC-COMPONENT-MOUNTED MODULESeptember 2020June 2022Allow2120NoNo
17015140PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAMESeptember 2020March 2023Abandon3041YesNo
17012490SUBSTRATE LOSS REDUCTION FOR SEMICONDUCTOR DEVICESSeptember 2020September 2021Allow1201NoNo
17011099Enhanced Sensing Coil for Semiconductor DeviceSeptember 2020October 2023Allow3720NoNo
16948100SCATTERING STRUCTURES FOR SINGLE-PHOTON AVALANCHE DIODESSeptember 2020June 2023Allow3320YesNo
17010776STACKED BODY SEMICONDUCTOR STORAGE DEVICE HAVING AN ELECTRODE BETWEEN A PILLAR AND A WIRING AND INSULATING LAYERS HAVING DIFFERENT DIELECTRIC CONSTANTS BETWEEN THE ELECTRODE AND THE WIRINGSeptember 2020April 2022Allow1911NoNo
17009158Displays with Non-Periodic Opaque StructuresSeptember 2020December 2023Allow3931YesNo
17007357SEMICONDUCTOR DEVICE AND WIRE BONDING METHODAugust 2020March 2022Allow1811NoNo
17002790MICRO LIGHT-EMITTING DEVICE DISPLAY APPARATUS HAVING BUMPAugust 2020December 2022Allow2720YesNo
17002258DISPLAY DEVICE WITH DIFFERENT ELECTRODES AND LIGHT EMITTING ELEMENTSAugust 2020September 2022Allow2511NoNo
16971849METHOD FOR PRODUCING AN AT LEAST PARTLY PACKAGED SEMICONDUCTOR WAFERAugust 2020March 2021Allow710NoNo
16996714DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAMEAugust 2020April 2022Allow2001NoNo
16947696SEMICONDUCTOR DEVICE INCLUDING TOP GATE PLANAR TYPE THIN-FILM TRANSISTOR AND TOP GATE PLANAR SELF-ALIGNED TYPE THIN-FILM TRANSISTORAugust 2020September 2021Allow1310NoNo
16991230SEMICONDUCTOR DEVICE HAVING METAL WIRE BONDED TO PLURAL METAL BLOCKS CONNECTED TO RESPECTIVE CIRCUIT PATTERNSAugust 2020October 2021Allow1411YesNo
16943297DISPLAY PANEL HAVING AN ARRANGEMENT BY UNIT PIXEL PAIRSJuly 2020January 2023Allow3011NoNo
16936882Semiconductor Packages Including Stacked Substrates and Penetration ElectrodesJuly 2020August 2021Allow1301NoNo
16934338FABRICATION METHOD OF SEMICONDUCTOR DIE AND CHIP-ON-PLASTIC PACKAGING OF SEMICONDUCTOR DIEJuly 2020April 2022Allow2121NoNo
16933993SEMICONDUCTOR DEVICEJuly 2020July 2021Allow1200NoNo
16929378SOI SUBSTRATE AND RELATED METHODSJuly 2020July 2022Allow2420YesYes
16929109SEMICONDUCTOR DEVICE INCLUDING UNEVEN CONTACT IN PASSIVATION LAYER AND METHOD OF MANUFACTURING THE SAMEJuly 2020January 2022Allow1821NoNo
16929397SILICON-ON-INSULATOR (SOI) SUBSTRATE AND RELATED METHODSJuly 2020October 2021Allow1510NoNo
16962300ELECTRONIC COMPONENT PACKAGE INCLUDING STACKED SHIELD LAYERS AND METHOD FOR PRODUCING SAMEJuly 2020January 2022Allow1830YesNo
16928562ARRAY SUBSTRATE AND DISPLAY DEVICE INCLUDING LIGHT SHIELDING LAYERSJuly 2020October 2021Allow1511NoNo
16962058DISPLAY PANEL AND MANUFACTURING METHOD THEREOFJuly 2020May 2021Allow1000NoNo
16924144MOISTURE-RESISTANT ELECTRONIC COMPONENT AND PROCESS FOR PRODUCING SUCH A COMPONENTJuly 2020September 2022Allow2630YesNo
16917686INTEGRATED DEVICE PACKAGES WITH INTEGRATED DEVICE DIE AND DUMMY ELEMENTJune 2020January 2023Allow3111YesNo
16917155Semiconductor Package Including Workpiece and Method for Fabricating the Semiconductor PackageJune 2020March 2022Allow2011NoNo
16916138Display Panel and Display Apparatus for Emitting White Light in Screen-off StateJune 2020December 2021Allow1700YesNo
16911872--DISPLAY APPARATUS INCLUDING A BLOCKING PORTION FOR REDUCING REFLECTION OF LIGHT--June 2020January 2022Allow1811YesNo
16910707THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE USING THE SAMEJune 2020January 2021Allow710NoNo
16908277THREE-DIMENSIONAL ARRAY ARCHITECTURE FOR RESISTIVE CHANGE ELEMENT ARRAYS AND METHODS FOR MAKING SAMEJune 2020May 2022Allow2201NoNo
16906129ACTIVE ELECTRICAL ELEMENTS WITH LIGHT-EMITTING DIODESJune 2020February 2023Allow3221NoNo
16904775SEMICONDUCTOR ELEMENT AND POWER AMPLIFICATION DEVICEJune 2020November 2021Allow1701NoNo
16901310LEADFRAME CAPACITORSJune 2020August 2021Allow1401NoNo
16900380TRIODE PACKAGING METHOD AND TRIODEJune 2020February 2022Allow2001NoNo
16899980SEMICONDUCTOR DEVICE INCLUDING ELECTROMAGNETIC INTERFERENCE (EMI) SHIELDING AND METHOD OF MANUFACTUREJune 2020September 2023Allow3951YesNo
16898096ADVANCED INTEGRATED PASSIVE DEVICE (IPD) WITH THIN-FILM HEAT SPREADER (TF-HS) LAYER FOR HIGH POWER HANDLING FILTERS IN TRANSMIT (TX) PATHJune 2020May 2022Allow2410YesNo
16897867SEMICONDUCTOR DEVICE ASSEMBLIES WITH CONDUCTIVE UNDERFILL DAMS FOR GROUNDING EMI SHIELDS AND METHODS FOR MAKING THE SAMEJune 2020January 2022Allow2020NoNo
16893440SEMICONDUCTOR PACKAGE INCLUDING SHIELDING PLATE IN REDISTRIBUTION STRUCTURE, SEMICONDUCTOR PACKAGE INCLUDING CONDUCTIVE VIA IN REDISTRIBUTION STRUCTURE, AND MANUFACTURING METHOD THEREOFJune 2020August 2021Allow1400NoNo
16893009STACK PACKAGES INCLUDING VERTICALLY STACKED SUB-PACKAGES WITH INTERPOSER BRIDGESJune 2020June 2021Allow1200NoNo
16891916HIGH-FREQUENCY DEVICE AND MANUFACTURING METHOD THEREOFJune 2020March 2021Allow1020NoNo
16890823METHODS OF DETECTING BONDING BETWEEN A BONDING WIRE AND A BONDING LOCATION ON A WIRE BONDING MACHINEJune 2020January 2023Allow3111NoNo
15929925MECHANICAL PUNCHED VIA FORMATION IN ELECTRONICS PACKAGE AND ELECTRONICS PACKAGE FORMED THEREBYMay 2020May 2022Allow2321NoNo
16765530DISPLAY BACKPLATE AND METHOD FOR MANUFACTURING SAME, DISPLAY PANEL AND METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICEMay 2020February 2023Allow3221NoNo
16765173DISPLAY MODULE, PREPARATION METHOD THEREOF, AND ELECTRONIC DEVICEMay 2020April 2023Abandon3521NoNo
16878250ELECTRONIC PACKAGE HAVING ANTENNA FUNCTION AND FABRICATION METHOD THEREOFMay 2020October 2021Allow1711NoNo
16876347HIGH RESOLUTION ORGANIC LIGHT-EMITTING DIODE DEVICES, DISPLAYS, AND RELATED METHODSMay 2020December 2020Allow700NoNo
16764971SEMICONDUCTOR APPARATUS INCLUDING LEADS AND BONDING WIRESMay 2020June 2021Allow1310NoNo
15931896SEMICONDUCTOR DEVICE STRUCTURE WITH MULTIPLE RESISTANCE VARIABLE LAYERSMay 2020August 2020Allow400NoNo
16874524SEMICONDUCTOR DEVICE PACKAGE INCLUDING CONDUCTIVE LAYERS AS SHIELDING AND METHOD OF MANUFACTURING THE SAMEMay 2020December 2021Allow1910YesNo
15930618DISPLAY PANEL INCLUDING PLURALITY OF PIXEL APERTURES AND DISPLAY DEVICEMay 2020June 2021Allow1400NoNo
16865533THROUGH HOLE SIDE WETTABLE FLANKMay 2020October 2021Allow1711YesNo
15929371METAL MIRROR BASED MULTISPECTRAL FILTER ARRAYApril 2020May 2021Allow1211YesNo
16860877SEMICONDUCTOR DEVICE INCLUDING METAL HOLDER AND METHOD OF MANUFACTURING THE SAMEApril 2020December 2021Allow2010NoNo
16858749PACKAGE STRUCTURE, PACKAGE-ON-PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOFApril 2020January 2021Allow911YesNo
16854412IMAGE DISPLAY ELEMENT WITH IMPROVED LIGHT EMISSION EFFICIENCYApril 2020March 2023Allow3521NoNo
16854566SEMICONDUCTOR DEVICE WITH PROTECTION STRUCTURE AND AIR GAPS AND METHOD FOR FABRICATING THE SAMEApril 2020June 2021Allow1411NoNo
16853707DISPLAY PANEL SOLVING LIGHT DIFFRACTION PROBLEM AND MANUFACTURING METHOD THEREOFApril 2020August 2021Allow1600NoNo
16852453SHIELDING FOR FLIP CHIP DEVICESApril 2020October 2021Allow1810NoNo
16848770SEMICONDUCTOR DEVICE COMPRISING SEALING MEMBERS WITH DIFFERENT ELASTIC MODULUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICEApril 2020February 2022Allow2220YesNo
16847256USING ELECTRICAL CONNECTIONS THAT TRAVERSE SCRIBE LINES TO CONNECT DEVICES ON A CHIPApril 2020April 2022Allow2401NoNo
16843842ORGANIC LIGHT EMITTING DIODES DISPLAYS INCLUDING A POLARIZATION FILM AND MANUFACTURING METHOD THEREOFApril 2020November 2020Allow810NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner MAZUMDER, DIDARUL A.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
1
Examiner Affirmed
0
(0.0%)
Examiner Reversed
1
(100.0%)
Reversal Percentile
94.8%
Higher than average

What This Means

With a 100.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
20
Allowed After Appeal Filing
12
(60.0%)
Not Allowed After Appeal Filing
8
(40.0%)
Filing Benefit Percentile
88.5%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 60.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner MAZUMDER, DIDARUL A - Prosecution Strategy Guide

Executive Summary

Examiner MAZUMDER, DIDARUL A works in Art Unit 2819 and has examined 548 patent applications in our dataset. With an allowance rate of 84.1%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 21 months.

Allowance Patterns

Examiner MAZUMDER, DIDARUL A's allowance rate of 84.1% places them in the 60% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.

Office Action Patterns

On average, applications examined by MAZUMDER, DIDARUL A receive 1.78 office actions before reaching final disposition. This places the examiner in the 36% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by MAZUMDER, DIDARUL A is 21 months. This places the examiner in the 90% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +9.2% benefit to allowance rate for applications examined by MAZUMDER, DIDARUL A. This interview benefit is in the 41% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 29.4% of applications are subsequently allowed. This success rate is in the 59% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 24.1% of cases where such amendments are filed. This entry rate is in the 34% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 155.6% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 91% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 95.0% of appeals filed. This is in the 85% percentile among all examiners. Of these withdrawals, 78.9% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 43.9% are granted (fully or in part). This grant rate is in the 35% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.4% of allowed cases (in the 56% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 34.3% of allowed cases (in the 97% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.