USPTO Art Unit 2181 Prosecution Statistics

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
19371910CXL over ScaleUp Ethernet (SUE), UALink, NVLink, Ethernet, or PHY based on IEEE 802.3October 2025February 2026Allow300NoNo
19371779UALink Non-Transparent Memory Bridging for AI Infrastructures Comprising GPUs, Accelerators, and Memory SwitchesOctober 2025February 2026Allow400YesNo
19210515Programmable Stacked Processor with Simultaneous Execution of all Program Steps Over a Data StreamMay 2025September 2025Allow410YesNo
19124448System and Method of Transmitting A SignalApril 2025December 2025Allow800NoNo
19179588QUANTIZED NEURAL NETWORK CIRCUITApril 2025January 2026Allow910YesNo
19177608System and Method for Energy-Aware Distributed Edge-Cloud Homomorphic Compression Using Adaptive Neural NetworksApril 2025November 2025Allow710NoNo
19037189DYNAMIC ASSIGNMENT OF BUS BANDWIDTH FOR SENDING TENSORS TO NEURAL PROCESSING UNITSJanuary 2025May 2025Allow300NoNo
18989508AI ACCELERATOR INTEGRATED CIRCUIT CHIP WITH INTEGRATED CELL-BASED FABRIC ADAPTERDecember 2024July 2025Allow710NoNo
18983986METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELSDecember 2024March 2026Allow1500NoNo
18952994METHOD FOR WIRELESSLY CONNECTING TO A WIRELESS USB INTERFACE EXTENDER DURING USE IN A WIRELESS PROJECTION SYSTEM, AND WIRELESS PROJECTION SYSTEM AND WIRELESS USB INTERFACE EXTENDER THEREFORNovember 2024February 2026Allow1400NoNo
18948599SUBSCRIBER STATION AND METHOD FOR DETERMINISTIC COMMUNICATION IN A SERIAL BUS SYSTEMNovember 2024January 2026Allow1400NoNo
18936668METHOD AND SYSTEM FOR SHIFTING DATA WITHIN MEMORYNovember 2024September 2025Allow1020NoNo
18919499BUS SYSTEM AND METHOD FOR ALLOCATING ADDRESSES OF BUS NODES IN A BUS SYSTEMOctober 2024March 2026Allow1710NoNo
18902741KERNEL BYPASS FOR ISCSI AND NVME/TCP APPLICATIONSSeptember 2024November 2025Allow1400NoNo
18899561SYSTEM AND METHOD TO BOOT A PCIE ENDPOINT FROM BOOT SOFTWARE STORED IN MEMORY OF A PCIE ROOT COMPLEXSeptember 2024March 2026Allow1800NoNo
18850546METHOD AND RELATED APPARATUS FOR PCIE DATA TRANSMISSIONSeptember 2024March 2026Allow1710NoNo
18890110POWER SAFETY CONFIGURATIONS FOR LOGICAL ADDRESS SPACE PARTITIONSSeptember 2024January 2026Allow1600NoNo
18884036IDENTIFYING IMAGE FRAMES CONTAINING ERRORS IN AUTOMOTIVE SYSTEMSSeptember 2024October 2025Allow1300NoNo
18830183HOST INDEPENDENT CONTROL OF STORAGE DEVICES USING CONTROL DEVICESSeptember 2024March 2026Allow1800NoNo
18826683VOL COMPLIANT I2C ISOLATION SCHEMESeptember 2024October 2025Allow1300NoNo
18844766DATA INTERACTION METHOD, APPARATUS AND SYSTEM, AND ELECTRONIC DEVICE AND STORAGE MEDIUMSeptember 2024December 2025Allow1520NoNo
18824738BUS NODE AND PLUG-IN CONNECTOR FOR A COMMUNICATION BUS SYSTEM WITH BUS TERMINATION CONFIGURATION COMPONENTSeptember 2024March 2026Allow1810NoNo
18820867INTELLIGENT RELOCATION DESTAGEAugust 2024October 2025Allow1300NoNo
18819544MEMORY DEVICE WITH INTERNAL PROCESSING INTERFACEAugust 2024February 2026Allow1710NoNo
18819772TARGET DISCOVERY EXTENSION USING LOG PAGE STORAGE TAGSAugust 2024March 2026Allow1810NoNo
18842350METHOD AND APPARATUS FOR CREATING SHAREABLE REMOTE DIRECT MEMORY ACCESS LINKAugust 2024February 2026Allow1810NoNo
18815506LINK RETENTION DURING DEVICE WARM RESETAugust 2024September 2025Allow1300NoNo
18813163MICROPROCESSOR THAT PERFORMS PARTIAL FALLBACK ABORT PROCESSING OF MULTI-FETCH BLOCK MACRO-OP CACHE ENTRIESAugust 2024October 2025Allow1400NoNo
18813190MICROPROCESSOR THAT PERFORMS MID-MACRO-OP CACHE ENTRY RESTART ABORT PROCESSINGAugust 2024October 2025Allow1400NoNo
18839791LINK ESTABLISHMENT APPARATUS, METHOD, AND SYSTEMAugust 2024December 2025Allow1610NoNo
18797952HYBRID LOCKING/QUEUING OPERATIONS FOR MUTUAL EXCLUSION OF WORK UNITSAugust 2024February 2026Allow1810NoNo
18796987ELECTRONIC DEVICE AND CONTROL METHOD THEREOFAugust 2024November 2025Allow1510NoNo
18790677HARDWARE PARTITIONS FOR A CLOUD SERVERJuly 2024October 2025Allow1400NoNo
18789480TILED IN-MEMORY COMPUTING ARCHITECTUREJuly 2024September 2025Allow1420YesNo
18786577MEMORY MODULE FOR MANAGING EVICTION OF CACHE DATA, MEMORY SYSTEM INCLUDING MEMORY MODULE, AND METHOD OF OPERATING THE SAMEJuly 2024March 2026Allow1910NoNo
18786597MEMORY MODULE FOR PREFETCHING DATA, MEMORY SYSTEM INCLUDING MEMORY MODULE, AND METHOD OF OPERATING THE SAMEJuly 2024February 2026Allow1910NoNo
18787049Method for Improving Reliability of Storage System, and Related ApparatusJuly 2024September 2025Allow1300NoNo
18782960COMMUNICATION DEVICE AND COMMUNICATION SYSTEMJuly 2024March 2026Abandon1910NoNo
18780879DATAFLOW GASKETS FOR HANDLING DATA STREAMSJuly 2024November 2025Allow1610NoNo
18780555Programming apparatus comprising devices for wireless communicationJuly 2024November 2025Allow1600NoNo
18779904PRESENTATION OF DIRECT ACCESSED STORAGE UNDER A LOGICAL DRIVE MODELJuly 2024February 2026Allow1810NoNo
18776498MEMORY DEVICE AND COMPUTING SYSTEM INCLUDING MEMORY DEVICEJuly 2024September 2025Allow1400NoNo
18772708MEMORY CONTROLLER WITH A PLURALITY OF COMMAND SUB-QUEUES AND CORRESPONDING ARBITERSJuly 2024January 2026Allow1810NoNo
18773565SYSTEM AND METHOD FOR TRANSACTION BROADCAST IN A NETWORK ON CHIPJuly 2024May 2025Allow1010YesNo
18773320MEMORY SYSTEM WITH PROCESSOR IN MEMORY (PIM)July 2024November 2025Allow1600NoNo
18770977ARTIFICIAL INTELLIGENCE BASED ON CELLULAR AUTOMATAJuly 2024August 2025Allow1400NoNo
18769917INFORMATION PROCESSING APPARATUS, CONTROL METHOD OF THE SAME, AND STORAGE MEDIUMJuly 2024May 2025Allow1010NoNo
18768944Data Masking for Pulse Amplitude ModulationJuly 2024March 2025Allow800NoNo
18762872PMM/DC-MHS HPM INTERPOSER SYSTEMJuly 2024August 2025Allow1400NoNo
18763864HBM BASED MEMORY LOOKUP ENGINE FOR DEEP LEARNING ACCELERATORJuly 2024December 2025Allow1720NoNo
18726624PROCESSING SYSTEM, PROCESSING APPARATUS, PROCESSING METHOD AND PROGRAMJuly 2024March 2026Abandon2010NoNo
18762461PORT CONTROL IN A PARALLEL MULTI-PORT SYSTEMJuly 2024March 2026Allow2010NoNo
18762176SYSTEM AND METHOD FOR VERIFYING AN INPUT/OUTPUT OPERATION OF AN AUTOSAR PLATFORM IN A VIRTUAL ECU ENVIRONMENTJuly 2024March 2026Allow2010NoNo
18759661NEURAL CORE, NEURAL PROCESSOR, AND DATA PROCESSING METHOD THEREOFJune 2024August 2025Allow1300NoNo
18759247USB HUB WITH CIRCUITRY TO IDENTIFY AND STORE DEVICE RESPONSE DATAJune 2024March 2026Allow2120NoNo
18755834SYSTEM, METHOD, AND APPARATUS FOR REMOTE PATIENT CAREJune 2024March 2025Allow910NoNo
18757059DRIVER HOT SWAP FOR SERVICING KERNEL-MODE DRIVERSJune 2024October 2025Allow1510YesNo
18753079Accelerating Hybrid Quantum/Classical AlgorithmsJune 2024May 2025Allow1010NoNo
18748393MATRIX COMPUTING METHOD, CHIP, AND RELATED DEVICEJune 2024February 2026Allow2010NoNo
18748154MOBILE EDGE COMPUTING (MEC) TASK UNLOADING METHOD WITH CACHE MECHANISMJune 2024September 2024Allow300NoNo
18747836DOUBLE DATA RATE CHANNEL SENSITIVITY AND DUAL IN-LINE MEMORY MODULE POPULATION OPTIMIZATIONJune 2024January 2026Allow1910NoNo
18721620DATA SYNCHRONIZATION METHOD AND APPARATUS, AND DEVICE AND STORAGE MEDIUMJune 2024March 2025Allow910NoNo
18744982MULTI-INTERFACE/PROTOCOL COMPONENT MANAGEMENT SYSTEMJune 2024January 2026Allow1910YesNo
18745310PUSH METHOD FOR PERIPHERAL DEVICE REDIRECTIONJune 2024March 2026Allow2110YesNo
18743683INTELLIGENT REPLAY OF SIMULATION ON MODIFIED CONSTRAINT RANDOM TESTBENCHJune 2024October 2025Allow1610NoNo
18743821CONTROLLER, SETTING METHOD, AND SETTING PROGRAMJune 2024January 2026Allow1910NoNo
18741282PEER ARRANGEMENTS AMONG SWITCH-COUPLED ENDPOINT DEVICESJune 2024January 2025Allow700YesNo
18739825UNGROUPING AND GROUPING OF SYSTEM BUSSES USING LINK MACROS CAPABLE OF JOINING AND SPLITTINGJune 2024September 2025Allow1500NoNo
18740042Reducing Link Up Time In PCIe SystemsJune 2024April 2025Allow1001NoNo
18739055Scalable System on a ChipJune 2024April 2025Allow1010NoNo
18737414PREDICTION UNIT THAT PREDICTS SUCCESSOR FETCH BLOCK START ADDRESS OF MULTI-FETCH BLOCK MACRO-OP CACHE ENTRYJune 2024October 2025Allow1600NoNo
18737119MULTI-TASK RECURRENT NEURAL NETWORKSJune 2024April 2025Allow1010NoNo
18732865Vector Based Matrix MultiplicationJune 2024June 2025Allow1310NoNo
18732604SYSTEMS, METHODS, AND DEVICES FOR QUEUE AVAILABILITY MONITORINGJune 2024October 2025Allow1720NoNo
18680752NON-HOMOGENEOUS CHIPLETSMay 2024April 2025Allow1010NoNo
18676750INFORMATION HANDLING SYSTEM DONGLE WITH ORTHOGONAL RADIATING ANTENNA PLANESMay 2024November 2025Allow1800NoNo
18677636PLUG-AND-PLAY HUB FOR UNMANNED AERIAL VEHICLEMay 2024July 2025Allow1300NoNo
18674284MEMORY DEVICES AND SYSTEMS CONFIGURED TO COMMUNICATE A DELAY SIGNAL AND METHODS FOR OPERATING THE SAMEMay 2024October 2025Allow1720NoNo
18672723COMPENSATING DC LOSS IN USB 2.0 HIGH SPEED APPLICATIONSMay 2024August 2025Allow1520NoNo
18670855VECTOR MAXIMUM AND MINIMUM WITH INDEXINGMay 2024April 2025Allow1010NoNo
18670894INFORMATION FEEDBACK METHOD AND SERIAL COMMUNICATION SYSTEMMay 2024November 2025Allow1710NoNo
18668558MANAGEMENT SYSTEM AND DEVICE FOR ACCESS OF AN ELECTRONIC DEVICE TO A HOSTMay 2024March 2025Allow1010NoNo
18669104DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTIONMay 2024April 2025Allow1110NoNo
18664401SYSTEM STEERING FOR AN I/O SUSTAINABILITY TARGETMay 2024December 2025Allow1910NoNo
18663908BUS-INTERLEAVE PROTOCOL TO IMPROVE MULTIPLE LOGIC UNIT (LUN) OPERATION EFFICIENCYMay 2024March 2025Allow1010YesNo
18662627MULTI-CHIP MODULE INCLUDING INTEGRATED CIRCUIT WITH RECEIVER CIRCUITRY IMPLEMENTING TRANSMIT SIGNAL CANCELLATIONMay 2024December 2025Allow1920YesNo
18658579CONFIGURABLE LOGIC SYSTEM AND METHOD FOR PIPELINED DATA TRANSFERMay 2024October 2025Allow1710NoNo
18658047MANAGING A CONFIGURATION OF A DOCKING STATION AND COMPUTING PERIPHERALSMay 2024January 2026Allow2020YesNo
18655386Programmable User-Defined Peripheral-Bus Device Implementation Using Data-Plane Accelerator (DPA)May 2024January 2025Allow810NoNo
18655891MAGNETIC SUCTION STORAGE DEVICEMay 2024July 2025Allow1400NoNo
18654767MEMORY EXTENSION DEVICE, OPERATION METHOD OF MEMORY EXTENSION DEVICE, AND COMPUTER READABLE STORAGE MEDIUM FOR EXECUTING OPERATION METHODMay 2024February 2026Allow2110NoNo
18653814SEPARATE CORES FOR MEDIA MANAGEMENT OF A MEMORY SUB-SYSTEMMay 2024July 2025Allow1520NoNo
18653320DYNAMICALLY CONFIGURABLE MOTHERBOARDMay 2024February 2026Allow2110NoNo
18652253Out-Of-Order Unit Stride Data Prefetcher with ScoreboardingMay 2024November 2025Allow1900NoNo
18652675UNIVERSAL MEMORY INTERFACE UTILIZING DIE-TO-DIE (D2D) INTERFACES BETWEEN CHIPLETSMay 2024January 2025Allow910NoNo
18650085CONTROL UNIT, DATA STORAGE DEVICE, HOST DEVICE AND COMPUTING SYSTEMApril 2024November 2025Allow1910NoNo
18648648I3C PENDING READ WITH RETRANSMISSIONApril 2024April 2025Allow1110NoNo
18647549GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUCT ACCUMULATE INSTRUCTION FOR HYBRID FLOATING POINT FORMATApril 2024February 2026Allow2140NoNo
18647048METHODS, DEVICES AND SYSTEMS FOR HIGH SPEED TRANSACTIONS WITH NONVOLATILE MEMORY ON A DOUBLE DATA RATE MEMORY BUSApril 2024December 2025Allow1911NoNo
18647189NETWORK STORAGE METHOD, STORAGE SYSTEM, DATA PROCESSING UNIT, AND COMPUTER SYSTEMApril 2024January 2026Allow2110NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2181.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
177
Examiner Affirmed
121
(68.4%)
Examiner Reversed
56
(31.6%)
Reversal Percentile
46.4%
Lower than average

What This Means

With a 31.6% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
750
Allowed After Appeal Filing
277
(36.9%)
Not Allowed After Appeal Filing
473
(63.1%)
Filing Benefit Percentile
76.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 36.9% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2181 - Prosecution Statistics Summary

Executive Summary

Art Unit 2181 is part of Group 2180 in Technology Center 2100. This art unit has examined 9,539 patent applications in our dataset, with an overall allowance rate of 82.3%. Applications typically reach final disposition in approximately 28 months.

Comparative Analysis

Art Unit 2181's allowance rate of 82.3% places it in the 72% percentile among all USPTO art units. This art unit has an above-average allowance rate compared to other art units.

Prosecution Patterns

Applications in Art Unit 2181 receive an average of 1.87 office actions before reaching final disposition (in the 47% percentile). The median prosecution time is 28 months (in the 65% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.