USPTO Examiner WONG TITUS - Art Unit 2181

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18424673Interface with Variable Data RateJanuary 2024April 2025Allow1510NoNo
18514872INPUT/OUTPUT DEVICE OPERATIONAL MODES FOR A SYSTEM WITH MEMORY POOLSNovember 2023April 2025Allow1610YesNo
18243943MULTIPROCESSOR SYSTEM WITH IMPROVED SECONDARY INTERCONNECTION NETWORKSeptember 2023January 2025Allow1710NoNo
18364786Configurable Cryptographic Processor with Integrated DMA Interface for Secure Data HandlingAugust 2023June 2024Allow1110NoNo
18359986LOAD BALANCED NETWORK FILE ACCESSESJuly 2023November 2024Allow1620NoNo
18352785EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGEJuly 2023April 2025Allow2120NoNo
18337418MEMORY MANAGEMENT FOR MULTIPLE PROCESS INSTANCESJune 2023February 2025Allow2020YesNo
18199042DYNAMIC CONFIGURATION OF INPUT/OUTPUT CONTROLLER ACCESS LANESMay 2023May 2024Allow1210NoNo
18138217DEVICE WITH BIOMETRIC PROCESS SYNCHRONIZATIONApril 2023July 2024Allow1520NoNo
18247543Method of Prefetching Target Address, System, Device and Storage Media ThereofMarch 2023February 2025Allow2320NoNo
18121224Direct Access to Reconfigurable Processor MemoryMarch 2023October 2024Allow1910YesNo
18042881AXI BUS STRUCTURE AND CHIP SYSTEMFebruary 2023May 2025Allow2710NoNo
18149195MANAGING INPUT/OUTPUT (I/O) OPERATIONS AT A STORAGE DEVICE BASED ON RESOURCE CAPABILITY OF THE STORAGE DEVICEJanuary 2023September 2024Allow2010NoNo
18011528DATA FLOW-BASED NEURAL NETWORK MULTI-ENGINE SYNCHRONOUS CALCULATION SYSTEMDecember 2022February 2025Allow2630NoNo
18063959DATA FLOW CONTROL MODULE FOR AUTONOMOUS FLOW CONTROL OF MULTIPLE DMA ENGINESDecember 2022November 2024Allow2310NoNo
18072159COMPUTING SYSTEM FOR DETERMINING RESOURCE TO PERFORM OPERATION ON DATA AND OPERATING METHOD THEREOFNovember 2022August 2024Allow2120YesNo
17992738MULTI-CHIP MODULE INCLUDING INTEGRATED CIRCUIT WITH RECEIVER CIRCUITRY IMPLEMENTING TRANSMIT SIGNAL CANCELLATIONNovember 2022January 2024Allow1320YesNo
17960053HIERARCHICAL METHODS AND SYSTEMS FOR STORING DATAOctober 2022January 2025Allow2820NoNo
17995459METHOD AND APPARATUS FOR DATA ACCESS OF NAND FLASH FILE, AND STORAGE MEDIUMOctober 2022August 2024Allow2320NoNo
17954556METHOD AND DEVICE FOR TESTING MEMORY WITH INSTRUCTION SIGNALSeptember 2022May 2025Allow3210NoNo
17949482EMBEDDED GPT PARTITION WITH HYBRID BOOT LOAD PROTOCOLSeptember 2022February 2025Allow2920NoNo
17943423BUILDING MANAGEMENT SYSTEM WITH AUTOMATIC EQUIPMENT DISCOVERY AND EQUIPMENT MODEL DISTRIBUTIONSeptember 2022August 2023Allow1210NoNo
17942821VALID DATA AWARE MEDIA RELIABILITY SCANNINGSeptember 2022April 2024Allow1910NoNo
17909784CAPACITY AND PERFORMANCE OPTIMIZATION IN NON-HOMOGENEOUS STORAGESeptember 2022February 2024Allow1710NoNo
17903772SYSTEMS AND METHODS FOR GENERATING LOGICAL-TO-PHYSICAL TABLES FOR WEAR-LEVELINGSeptember 2022December 2024Allow2740YesNo
17902985SYSTEMS AND METHODS FOR ACCELERATING MEMORY TRANSFERS AND COMPUTATION EFFICIENCY USING A COMPUTATION-INFORMED PARTITIONING OF AN ON-CHIP DATA BUFFER AND IMPLEMENTING COMPUTATION-AWARE DATA TRANSFER OPERATIONS TO THE ON-CHIP DATA BUFFERSeptember 2022March 2023Allow600NoNo
17897656MANAGED NAND FLASH MEMORY REGION CONTROL AGAINST ENDURANCE HACKINGAugust 2022December 2023Allow1520NoNo
17821016STRIDE-BASED PREFETCHER CIRCUITS FOR PREFETCHING NEXT STRIDE(S) INTO CACHE MEMORY BASED ON IDENTIFIED CACHE ACCESS STRIDE PATTERNS, AND RELATED PROCESSOR-BASED SYSTEMS AND METHODSAugust 2022July 2024Allow2310NoNo
17860587EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGEJuly 2022October 2023Abandon1610NoNo
17843641Data Storage Device With Weak Bits HandlingJune 2022June 2024Allow2420YesNo
17751480Interface with Variable Data RateMay 2022September 2023Allow1610NoNo
17750139DATA BUS BRIDGEMay 2022August 2023Allow1410NoNo
17747800PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHODMay 2022June 2023Allow1300NoNo
17746423SEMICONDUCTOR DEVICEMay 2022December 2023Abandon1910NoNo
17661402Queue Circuit For Controlling Access To A Memory CircuitApril 2022August 2024Allow2720YesNo
17661244PERFORMANCE MONITORING FOR A MEMORY SYSTEMApril 2022October 2024Allow3020YesNo
17731301SYSTEMS AND METHODS FOR CONCURRENT LOGGING AND EVENT CAPTUREApril 2022April 2024Allow2430YesNo
17660195Self-Refresh ArbitrationApril 2022September 2024Allow2920YesNo
17726337SEGREGATED FILESYSTEM METADATA OPERATIONS USING BUFFERED ATOMIC WRITE INTERFACEApril 2022May 2024Allow2510NoNo
17718537DOCKING STATION STATUS NOTIFICATIONSApril 2022July 2024Allow2720YesNo
17717452BALL GRID ARRAY STORAGE FOR A MEMORY SUB-SYSTEMApril 2022September 2023Allow1830YesNo
17717533HARDWARE ACCELERATOR CIRCUITS FOR NEAR STORAGE COMPUTE SYSTEMSApril 2022October 2023Allow1920YesNo
17657081DATA PROCESSING UNIT FOR COMPUTE NODES AND STORAGE NODESMarch 2022July 2023Allow1510YesNo
17670962ELECTRIC DEVICE INCLUDING BRANCHED SIGNAL LINES, AND ELECTRIC DEVICE INCLUDING PRINTED CIRCUIT BOARDFebruary 2022October 2024Allow3220YesNo
17650643MEMORY CONTROLLER SYSTEMS WITH NONVOLATILE MEMORY FOR STORING OPERATING PARAMETERSFebruary 2022March 2024Allow2510NoNo
17587285SCALABLE STORAGE USING NVME COMMUNICATIONJanuary 2022September 2024Allow3230YesNo
17557363METHOD AND APPARATUS FOR DETECTING ATS-BASED DMA ATTACKDecember 2021October 2023Allow2120NoNo
17550977SCALABLE INTERRUPT VIRTUALIZATION FOR INPUT/OUTPUT DEVICESDecember 2021April 2023Allow1610YesNo
17550875APPARATUSES, METHODS, AND SYSTEMS FOR OPERATIONS IN A CONFIGURABLE SPATIAL ACCELERATORDecember 2021October 2022Allow1000YesNo
17617519HARDWARE-BASED MEMORY COMPRESSIONDecember 2021May 2025Allow4130YesNo
17522843PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) INTERFACE DEVICE AND METHOD OF OPERATING THE SAMENovember 2021December 2023Allow2530YesNo
17521612MULTI-CHIP MODULE IMPLEMENTING ECHO INTERFERENCE CANCELLATION FOR CONCURRENT BI-DIRECTIONAL COMMUNICATION BETWEEN INTEGRATED CIRCUITSNovember 2021September 2023Allow2220YesNo
17515109Controlling Cache Size and Priority Using Machine Learning TechniquesOctober 2021November 2023Allow2440YesNo
17594610SYSTEM AND METHOD FOR FACILITATING DYNAMIC COMMAND MANAGEMENT IN A NETWORK INTERFACE CONTROLLER (NIC)October 2021October 2023Allow2310YesNo
17449586STATE BUFFER MEMLOC RESHAPINGSeptember 2021June 2022Allow900NoNo
17487870DATA PROTECTION FOR THREE-DIMENSIONAL NAND MEMORYSeptember 2021April 2025Allow4340YesNo
17448971STORAGE DEVICE ADAPTIVELY SUPPORTING PLURALITY OF PROTOCOLSSeptember 2021October 2022Allow1330YesNo
17475074DMA Control Circuit with Quality of Service IndicationsSeptember 2021September 2023Allow2410YesNo
17431739DIRECT MEMORY ACCESS TRACKING FOR PASS-THROUGH DEVICES IN VIRTUALIZED ENVIRONMENTSAugust 2021December 2023Allow2820YesNo
17402834LOAD BALANCED NETWORK FILE ACCESSESAugust 2021March 2023Allow1920NoNo
17403862SMART STORAGE DEVICE USING A COMPUTER EXPRESS LINK (CXL) INTERFACEAugust 2021November 2024Allow3930YesNo
17397115MULTI-CHIP MODULE WITH CONFIGURABLE MULTI-MODE SERIAL LINK INTERFACESAugust 2021July 2022Allow1100NoNo
17391468PERFORMING LOAD AND STORE OPERATIONS OF 2D ARRAYS IN A SINGLE CYCLE IN A SYSTEM ON A CHIPAugust 2021August 2024Allow3630YesNo
17375478PERIODIC FLUSH IN MEMORY COMPONENT THAT IS USING GREEDY GARBAGE COLLECTIONJuly 2021June 2022Allow1120YesNo
17337364SYSTEM AND METHOD FOR ADVANCED DATA MANAGEMENT WITH VIDEO ENABLED SOFTWARE TOOLS FOR VIDEO BROADCASTING ENVIRONMENTSJune 2021October 2022Allow1610NoNo
17324172WAVE PIPELINE INCLUDING SYNCHRONOUS STAGEMay 2021August 2022Allow1510NoNo
17324776TREATING MAIN MEMORY AS A COLLECTION OF TAGGED CACHE LINES FOR TRACE LOGGINGMay 2021March 2024Allow3330NoNo
17307274MEMORY ACCESS HANDLING FOR PERIPHERAL COMPONENT INTERCONNECT DEVICESMay 2021August 2023Allow2730YesNo
17232944ADAPTOR STORAGE SYSTEM OF AND METHODApril 2021January 2024Allow3320NoNo
17221739METHOD FOR PARALLEL IMAGE PROCESSING AND ROUTINGApril 2021August 2022Allow1610NoNo
17207135DYNAMIC CONFIGURATION OF INPUT/OUTPUT CONTROLLER ACCESS LANESMarch 2021February 2023Allow2320YesNo
17274079ELECTRONIC DEVICE FOR USE IN AN AUTOMATION SYSTEM, AND AN AUTOMATION SYSTEMMarch 2021April 2025Abandon4940NoNo
17190750INFORMATION PROCESSING APPARATUS HAVING AN INTEGRATED CIRCUIT CHIP WITH FIRST AND SECOND COMMUNICATION UNITS HAVING ADDRESS TRANSLATION FUNCTIONMarch 2021May 2022Allow1510NoNo
17180531MEMORY CONTROLLER FOR ALLOCATING CACHE LINES AND METHOD OF OPERATING THE SAMEFebruary 2021November 2023Allow3320NoNo
17173557TEST, DEVELOPMENT AND DEPLOYMENT INFRASTRUCTURE FOR SPACECUBE HIGH-PERFORMANCE FLIGHT PROCESSORSFebruary 2021August 2024Allow4210NoNo
17155014MEMORY MANAGEMENT FOR MULTIPLE PROCESS INSTANCESJanuary 2021March 2023Allow2630YesNo
17147710COMMUNICATION GATEWAY FOR COMMUNICATING DATA FRAMES FOR A MOTOR VEHICLEJanuary 2021November 2022Allow2200NoNo
17138082PERFORMANCE OF STORAGE SYSTEM BACKGROUND OPERATIONSDecember 2020January 2023Allow2420NoNo
17129496TECHNOLOGIES FOR OFFLOAD DEVICE FETCHING OF ADDRESS TRANSLATIONSDecember 2020February 2025Allow5020YesNo
17127289BALL GRID ARRAY STORAGE FOR A MEMORY SUB-SYSTEMDecember 2020December 2021Allow1110YesNo
17121534EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGEDecember 2020March 2022Allow1510NoNo
17119387CACHE FOR ARTIFICIAL INTELLIGENCE PROCESSORDecember 2020January 2022Allow1410NoNo
17111195PERFORMANCE OF MEMORY SYSTEM BACKGROUND OPERATIONSDecember 2020September 2023Allow3440YesNo
17247016SYNCHRONIZATION OF DMA TRANSFERS FOR LARGE NUMBER OF QUEUESNovember 2020September 2021Allow900NoNo
17101689Controlling Cache Size and Priority Using Machine Learning TechniquesNovember 2020August 2021Allow900NoNo
17101953APPARATUS AND METHOD FOR THE BUFFERED TRANSMISSION OF DATA BY A CONTROLLER TO REDUCE A LOAD ON A CENTRAL PROCESSING UNITNovember 2020April 2022Allow1720NoNo
17087221INPUT/OUTPUT DEVICE OPERATIONAL MODES FOR A SYSTEM WITH MEMORY POOLSNovember 2020August 2023Allow3320YesNo
17077503MANAGED NAND FLASH MEMORY REGION CONTROL AGAINST ENDURANCE HACKINGOctober 2020April 2022Allow1810NoNo
17071996SYSTEM ON CHIP COMPRISING A PLURALITY OF CENTRAL PROCESSING UNITS WHOSE MAILBOXES ARE SET IN TIGHTLY-COUPLED MEMORIESOctober 2020March 2022Allow1710NoNo
17066566SYSTEM AND METHOD FOR USING TELEMETRY DATA TO CHANGE OPERATION OF STORAGE MIDDLEWARE CLIENT OF A DATA CENTEROctober 2020July 2022Allow2120YesNo
17060686METHOD AND SYSTEM FOR PERFORMING READ/WRITE OPERATION WITHIN A COMPUTING SYSTEM HOSTING NON-VOLATILE MEMORYOctober 2020June 2023Allow3220YesNo
17022389DATA FRAME INTERFACE NETWORK DEVICESeptember 2020May 2022Allow2020YesNo
16980160Device Process SchedulingSeptember 2020February 2023Allow2910NoNo
17006858FASTER ACCESS OF VIRTUAL MACHINE MEMORY BACKED BY A HOST COMPUTING DEVICE'S VIRTUAL MEMORYAugust 2020June 2021Allow1000NoNo
16947989METHODS AND SYSTEM FOR CARRYING OUT A HANDOVER OF A MOBILE COMMUNICATION DEVICE BETWEEN DIFFERENT ACCESS NETWORKSAugust 2020November 2024Allow5140NoNo
16996295COMMAND MEMORY BUFFER SYSTEMS AND METHODSAugust 2020March 2022Allow1920NoNo
16996522Computational Storage Systems and MethodsAugust 2020July 2022Allow2311NoNo
16994466METHOD AND SYSTEM FOR STORING DATA IN A MULTIPLE DATA CLUSTER SYSTEMAugust 2020December 2021Allow1610NoNo
16989801DATA PROCESSING SYSTEMSAugust 2020July 2021Allow1100NoNo
16985234SYSTEM AND METHODS FOR IMPLEMENTING A KEY-VALUE DATA STOREAugust 2020June 2023Allow3420YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner WONG, TITUS.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
3
Examiner Affirmed
2
(66.7%)
Examiner Reversed
1
(33.3%)
Reversal Percentile
50.1%
Higher than average

What This Means

With a 33.3% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
13
Allowed After Appeal Filing
7
(53.8%)
Not Allowed After Appeal Filing
6
(46.2%)
Filing Benefit Percentile
84.3%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 53.8% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner WONG, TITUS - Prosecution Strategy Guide

Executive Summary

Examiner WONG, TITUS works in Art Unit 2181 and has examined 170 patent applications in our dataset. With an allowance rate of 95.3%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 24 months.

Allowance Patterns

Examiner WONG, TITUS's allowance rate of 95.3% places them in the 86% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by WONG, TITUS receive 1.83 office actions before reaching final disposition. This places the examiner in the 56% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by WONG, TITUS is 24 months. This places the examiner in the 70% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +8.3% benefit to allowance rate for applications examined by WONG, TITUS. This interview benefit is in the 41% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 38.2% of applications are subsequently allowed. This success rate is in the 85% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 20.0% of cases where such amendments are filed. This entry rate is in the 17% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 80.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 60% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences show above-average effectiveness with this examiner. If you have strong arguments, a PAC request may result in favorable reconsideration.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 78.6% of appeals filed. This is in the 67% percentile among all examiners. Of these withdrawals, 18.2% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.

Petition Practice

When applicants file petitions regarding this examiner's actions, 20.0% are granted (fully or in part). This grant rate is in the 11% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 2.9% of allowed cases (in the 82% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 13% percentile). This examiner rarely issues Quayle actions compared to other examiners. Allowances typically come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Plan for RCE after final rejection: This examiner rarely enters after-final amendments. Budget for an RCE in your prosecution strategy if you receive a final rejection.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.