USPTO Art Unit 2133 Prosecution Statistics

Art Unit Information

Art Unit: 2133
Group: 2130
Tech Center: 2100
Total Cases: 7,442
Last Active: July 2024

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18782525METHODS FOR PERFORMING VOLTAGE SWEEP OPERATIONSJuly 2024June 2025Allow1100NoNo
18767519PORT ARBITRATIONJuly 2024May 2025Allow1010NoNo
18760849ON-DEMAND ACTIVATION OF MEMORY PATH DURING SLEEP OR ACTIVE MODESJuly 2024March 2025Allow800NoNo
18724307DISK ARRAY REDUNDANCY METHOD AND SYSTEM, COMPUTER EQUIPMENT AND STORAGE MEDIUMJune 2024March 2025Allow810NoNo
18750765SMART DATA STORAGE TIERS FOR DATA OBJECT TRANSITIONINGJune 2024February 2025Allow800YesNo
18750250IDLE MODE TEMPERATURE CONTROL FOR MEMORY SYSTEMSJune 2024March 2025Allow900NoNo
18749424METHOD, BRIDGING DEVICE, SYSTEM AND MEDIUM OF VIRTUALIZATION PROCESSING OF STORAGE DEVICEJune 2024September 2024Allow200NoNo
18746987AUTOMATIC WORDLINE STATUS BYPASS MANAGEMENTJune 2024January 2025Allow700NoNo
18745603UNIFIED ADDRESS TRANSLATION FOR VIRTUALIZATION OF INPUT/OUTPUT DEVICESJune 2024February 2025Allow800NoNo
18744351ADJUSTABLE FUNCTION-IN-MEMORY COMPUTATION SYSTEMJune 2024April 2025Allow1010NoNo
18716278SEQUENTIAL READ PREFETCHING METHOD AND APPARATUS, DEVICE, AND MEDIUMJune 2024March 2025Allow910NoNo
18731056Alleviating Interconnect Traffic in a Disaggregated Memory SystemMay 2024March 2025Abandon910NoNo
18670065MECHANISMS FOR GROUPING NODESMay 2024April 2025Allow1110YesNo
18666290RATING-BASED MAPPING OF DATA TO MEMORYMay 2024January 2025Allow800NoNo
18660232MEMORY CONTROLLER CONTROLLING SYNCHRONIZATION OPERATION BASED ON FUSED LINKED LIST AND OPERATING METHOD THEREOFMay 2024December 2024Allow700NoNo
18658740Memory Calibration and Margin CheckMay 2024May 2025Allow1200YesNo
18655510Multi-Modal Refresh of Dynamic, Random-Access MemoryMay 2024April 2025Allow1100NoNo
18653661MULTI-CHIP MODULE (MCM) WITH MULTI-PORT UNIFIED MEMORYMay 2024November 2024Allow710NoNo
18653644MULTI-CHIP MODULE (MCM) WITH MULTI-PORT UNIFIED MEMORYMay 2024March 2025Allow1011NoNo
18650792ALLOCATING PARTITIONS FOR STORING A DATA SET FOR SUBSEQUENT QUERY EXECUTIONApril 2024December 2024Allow700NoNo
18649803STORING PARITY DURING REFRESH OPERATIONSApril 2024March 2025Allow1110NoNo
18649129MEMORY SUB-SYSTEM DYNAMIC QOS POOLApril 2024March 2025Allow1110YesNo
18647845PHYSICAL MEMORY ISOLATIONApril 2024April 2025Allow1200NoNo
18646420STORAGE DEVICE AND OPERATING METHOD FOR SUPPORTING HIGH-SPEED INPUT/OUTPUT THEREOFApril 2024April 2025Allow1110NoNo
18645697MEMORY SYSTEM STORING MANAGEMENT INFORMATION AND METHOD OF CONTROLLING SAMEApril 2024June 2025Allow1410NoNo
18643169PHYSICAL MEMORY ADDRESS OMISSION OR OBFUSCATION WITHIN AN EXECUTION TRACEApril 2024April 2025Allow1110NoNo
18641996TECHNIQUES FOR DYNAMIC RESOURCE BALANCING WITH ASYNCHRONOUS REPLICATIONApril 2024April 2025Allow1200NoNo
18638814MEMORY CONTROLLER, CONTROL METHOD OF MEMORY CONTROLLER, AND STORAGE MEDIUMApril 2024April 2025Allow1200NoNo
18638541COMPUTATIONAL STORAGE DEVICE COMMUNICATING WITH HOST USING SHARED MEMORY AND OPERATING METHOD THEREOFApril 2024May 2025Allow1300NoNo
18633288SELECTION OF ERASE POLICY IN A MEMORY DEVICEApril 2024June 2025Allow1400NoNo
18626328DATA STORAGE DEVICE, OPERATION METHOD THEREOF, AND STORAGE SYSTEM INCLUDING THE SAMEApril 2024April 2025Allow1210NoNo
18626506COMPRESSING TRANSLATION LOOKASIDE BUFFER (TLB) TAGS USING A TLB METADATA BUFFER IN PROCESSOR-BASED DEVICESApril 2024April 2025Allow1310NoNo
18625096Techniques for managing writes in nonvolatile memoryApril 2024December 2024Allow800NoNo
18622132INTERNAL CLOCK SIGNALINGMarch 2024December 2024Allow800NoNo
18619190APPARATUS FOR TRANSMITTING MAP INFORMATION IN MEMORY SYSTEMMarch 2024June 2025Allow1510NoNo
18618593MEMORY SYSTEM AND OPERATION METHOD THEREOF AND MEMORY CONTROLLERMarch 2024April 2025Allow1200NoNo
18616970READING SEQUENTIAL DATA USING MAPPING INFORMATION STORED AT A HOST DEVICEMarch 2024April 2025Allow1210NoNo
18616006VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE VOLTAGEMarch 2024February 2025Allow1110NoNo
18615760MEMORY SUB-SYSTEM COMMAND FENCINGMarch 2024March 2025Allow1110YesNo
18613951SYSTEMS AND METHODS FOR FETCHING AND WRITING INSTRUCTIONS TO MEMORYMarch 2024April 2025Allow1310NoNo
18612459Method and Apparatus for Controlling Internal Memory Bandwidth, Processor, and Computing DeviceMarch 2024March 2025Allow1200NoNo
18612575ELECTRONIC DEVICE STORING MAPPING INFORMATION AND METHOD OF OPERATING THE SAMEMarch 2024June 2025Allow1400NoNo
18610888Maintenance Operations in a DRAMMarch 2024November 2024Allow700NoNo
18609786STORAGE SYSTEM AND A METHOD OF CONTROLLING ENERGY CONSUMPTION THEREINMarch 2024September 2024Allow610NoNo
18608251MEMORY SYSTEM CHARACTERISTIC CONTROLMarch 2024May 2025Allow1300NoNo
18608221MEMORY SYSTEM WITH MULTIPLE STRIPING OF RAID GROUPS AND METHOD FOR PERFORMING THE SAMEMarch 2024June 2025Allow1520NoNo
18608871RESOURCE ISOLATION IN COMPUTATIONAL STORAGE DEVICESMarch 2024October 2024Allow700NoNo
18606588DYNAMICALLY ASSIGNING COMPRESSION PRIORITY TO CACHED ENTRIES IN STORAGE DEVICESMarch 2024April 2025Allow1300NoNo
18606794MANAGING WRITE COMMAND EXECUTION DURING A POWER FAILURE IN A MEMORY SUB-SYSTEMMarch 2024April 2025Allow1300NoNo
18603208DATA READING AND WRITING METHOD, SYSTEM AND CONTROL METHODMarch 2024May 2025Allow1400NoNo
18602472STORAGE DEVICEMarch 2024April 2025Allow1300NoNo
18599668CONTROLLER, DATA STORAGE SYSTEM AND COMPUTING SYSTEMMarch 2024May 2025Allow1400NoNo
18600269SOURCE ADDRESS MEMORY MANAGMENTMarch 2024February 2025Allow1210NoNo
18598112COMPUTER SYSTEM AND MANAGEMENT METHOD FOR COMPUTER SYSTEMMarch 2024July 2025Allow1600NoNo
18597072DATA PREPROCESSING (DPP) PATTERN SUPPORTING BOTH NORMAL PROGRAM AND EARLY CACHE RELEASE PROGRAM (ECRP)March 2024February 2025Allow1210NoNo
18595567Identifying Duplicate Data Based On Recently Read DataMarch 2024April 2025Allow1310YesNo
18590088TIERED DATA STORAGE WITH EPHEMERAL AND PERSISTENT TIERSFebruary 2024April 2024Allow200YesNo
18589430INTEGRATED CIRCUIT DATA STREAM PROCESSING USING PAGED BUFFERINGFebruary 2024June 2025Allow1600NoNo
18587940PRE-FETCHING ADDRESS TRANSLATION FOR COMPUTATION OFFLOADINGFebruary 2024March 2025Allow1200NoNo
18584690ABORT HANDLING BY HOST CONTROLLER FOR STORAGE DEVICEFebruary 2024September 2024Allow700YesNo
18584993APPARATUS WITH MEMORY CELL CALIBRATION MECHANISM AND METHODS FOR OPERATING THE SAMEFebruary 2024March 2025Allow1300NoNo
18583457System and Method for Large Memory Transaction (LMT) StoresFebruary 2024February 2025Allow1200NoNo
18581404SUSPEND PARAMETER DETERMINATION DEVICE AND METHOD THEREOFFebruary 2024July 2025Allow1610YesNo
18444064TECHNIQUES FOR MEMORY SYSTEM STANDBY MODE CONTROLFebruary 2024March 2025Allow1300NoNo
18442248MANAGING POWER LOSS RECOVERY USING A DIRTY SECTION WRITE POLICY FOR AN ADDRESS MAPPING TABLE IN A MEMORY SUB-SYSTEMFebruary 2024January 2025Allow1110NoNo
18442851OPTIMIZED READ REQUEST PROCESSING FOR RELOCATED DATAFebruary 2024May 2025Allow1500NoNo
18440804MEMORY SYSTEMFebruary 2024March 2025Allow1300NoNo
18437289TRANSLATION LOOKASIDE BUFFER PREWARMINGFebruary 2024April 2025Allow1410NoNo
18433118Coherence Directory Way Tracking in Coherent AgentsFebruary 2024June 2025Allow1600NoNo
18432140INFORMATION PROCESSING APPARATUS, CONTROL SYSTEM, METHOD, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUMFebruary 2024March 2025Allow1400NoNo
18429911METHODS AND SYSTEMS TO INTERFACE BETWEEN A MULTI-SITE DISTRIBUTED STORAGE SYSTEM AND AN EXTERNAL MEDIATOR TO EFFICIENTLY PROCESS EVENTS RELATED TO CONTINUITYFebruary 2024January 2025Allow1210NoNo
18428758DYNAMIC UPDATES TO LOGICAL-TO-PHYSICAL ADDRESS TRANSLATION TABLE BITMAPSJanuary 2024March 2025Allow1310NoNo
18293063MEMORY SYSTEM AND METHODJanuary 2024June 2025Allow1710NoNo
18425102MEMORY CONTROLLER, PROCESSOR AND SYSTEM FOR ARTIFICIAL NEURAL NETWORKJanuary 2024September 2024Allow700NoNo
18423002TECHNIQUES FOR TEMPERATURE-BASED ACCESS OPERATIONSJanuary 2024November 2024Allow1000NoNo
18421068MEMORY MANAGEMENT IN AN INFORMATION HANDLING SYSTEMJanuary 2024January 2025Allow1200NoNo
18421542DATA STORAGE METHOD AND DEVICEJanuary 2024June 2025Allow1710YesNo
18421349IMPROVING DATA CENTER SUSTAINABILITY THROUGH DYNAMIC INCLUSION AND ELIMINATION OF PATHSJanuary 2024January 2025Allow1200NoNo
18421287THERMAL DUPLICATION OF DATAJanuary 2024March 2025Allow1400NoNo
18420536STORAGE DEVICE, METHOD OF OPERATING THE SAME, AND COMPUTING SYSTEM INCLUDING THE STORAGE DEVICEJanuary 2024January 2025Allow1200NoNo
18420006MULTI-CHIP MODULE (MCM) WITH MULTI-PORT UNIFIED MEMORYJanuary 2024June 2024Allow520YesNo
18418293MULTI-CHIP MODULE (MCM) WITH MULTI-PORT UNIFIED MEMORYJanuary 2024January 2025Allow1210NoNo
18417727TECHNIQUES USING A UNIFIED CACHE FOR STORING AND ACCESSING TRANSLATION TABLE ENTRIES AND UPDATESJanuary 2024April 2025Allow1500NoNo
18416262OPERATION METHOD OF HOST CONFIGURED TO CONTROL STORAGE DEVICE AND OPERATION METHOD OF STORAGE SYSTEMJanuary 2024April 2025Allow1510YesNo
18415352DATA WRITING METHOD, DATA READING METHOD, APPARATUS, DEVICE, SYSTEM, AND MEDIUMJanuary 2024January 2025Allow1200NoNo
18413017MEMORY MODULE PROVIDING DISTINCT SIGNALING INTERFACES VIA AN OPEN-DRAIN OUTPUT FOR DISTINCT OPERATIONSJanuary 2024April 2025Allow1510YesNo
18410095METHOD FOR DISCARDING PERSONAL INFORMATION IN NAND FLASH MEMORYJanuary 2024December 2024Allow1110NoNo
18407809DATA STORAGE DEVICE AND NON-VOLATILE MEMORY CONTROL METHODJanuary 2024June 2025Allow1710NoNo
18406687DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEMJanuary 2024March 2025Allow1500NoNo
18405944METHOD AND APPARATUS FOR USING A STORAGE SYSTEM AS MAIN MEMORYJanuary 2024March 2025Allow1510NoNo
18404348NMP EMULATOR BASED ON NUMA ARCHITECTURE AND OPERATING METHOD THEREOFJanuary 2024April 2025Allow1500NoNo
18403994SECURE, DISTRIBUTED RAID STORAGE SYSTEMS AND METHODSJanuary 2024September 2024Allow800YesNo
18401251USING DUPLICATE DATA FOR IMPROVING ERROR CORRECTION CAPABILITYDecember 2023February 2025Allow1310NoNo
18401201State Management and Persistent Data Storage in a Distributed Cloud Computing NetworkDecember 2023March 2024Allow300NoNo
18399332SYSTEMS AND METHODS FOR REDUCING CACHE FILLSDecember 2023May 2025Allow1710YesNo
18397186MEMORY OPERATION METHOD, MEMORY AND ELECTRONIC DEVICEDecember 2023July 2025Allow1810NoNo
18397085Free Space and Input/Output Stability Management for Non-Uniform WorkloadsDecember 2023March 2025Allow1500NoNo
18396041MEMORY CONTROLLER, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY SYSTEMDecember 2023April 2025Allow1500NoNo
18395541EFFICIENT BITLINE STABILIZATION FOR PROGRAM INHIBIT IN NAND ARRAYSDecember 2023April 2025Allow1610NoNo
18395363MEMORY DEVICE WITH DYNAMIC CACHE MANAGEMENTDecember 2023October 2024Allow910NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for art-unit 2133.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
91
Examiner Affirmed
63
(69.2%)
Examiner Reversed
28
(30.8%)
Reversal Percentile
42.5%
Lower than average

What This Means

With a 30.8% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
252
Allowed After Appeal Filing
95
(37.7%)
Not Allowed After Appeal Filing
157
(62.3%)
Filing Benefit Percentile
75.1%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 37.7% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Art Unit 2133 - Prosecution Statistics Summary

Executive Summary

Art Unit 2133 is part of Group 2130 in Technology Center 2100. This art unit has examined 7,442 patent applications in our dataset, with an overall allowance rate of 90.2%. Applications typically reach final disposition in approximately 26 months.

Comparative Analysis

Art Unit 2133's allowance rate of 90.2% places it in the 91% percentile among all USPTO art units. This art unit has a significantly higher allowance rate than most art units at the USPTO.

Prosecution Patterns

Applications in Art Unit 2133 receive an average of 1.42 office actions before reaching final disposition (in the 20% percentile). The median prosecution time is 26 months (in the 68% percentile).

Strategic Considerations

When prosecuting applications in this art unit, consider the following:

  • The art unit's allowance rate suggests a more favorable examination environment compared to the USPTO average.
  • With fewer office actions than average, plan for relatively streamlined prosecution.
  • The median prosecution time is shorter than average and should be factored into your continuation and client communication strategies.
  • Review individual examiner statistics within this art unit to identify examiners with particularly favorable or challenging prosecution patterns.

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.