USPTO Examiner TECHANE MUNA A - Art Unit 2827

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18888087NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH MULTI-WAY SHARING OF GAIN ELEMENT WITH SERIES TRANSISTORSeptember 2024March 2026Allow1800NoNo
18825487ADDRESS PATH ROUTING REDUCTION STRATEGY FOR NONVOLATILE MEMORY DECODERSSeptember 2024March 2026Allow1800NoNo
18821402SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND CONTROL METHODAugust 2024March 2026Allow1800NoNo
18821016SEMICONDUCTOR DEVICEAugust 2024February 2026Allow1800NoNo
18807590MEMORY DEVICE, MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOFAugust 2024February 2026Allow1800NoNo
18806359APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR CLOCK SWITCHING AND LOW POWER CONSUMPTIONAugust 2024February 2026Allow1800NoNo
18790480READ VOLTAGE LEVEL BIN SELECTIONJuly 2024February 2026Allow1800NoNo
18786291MEMORY DEVICE WITH A STORAGE COMPONENTJuly 2024January 2026Allow1800NoNo
18785902EFFICIENT EMPTY PAGE SCAN OPERATIONSJuly 2024January 2026Allow1800NoNo
18781878NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT WITH SERIES TRANSISTOR AND INDIVIDUAL ACCESS TRANSISTORJuly 2024October 2025Allow1500NoNo
18781916NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT WITH SERIES TRANSISTORJuly 2024January 2026Allow1800NoNo
18761264Magnetic Memory Device and Method for Using the SameJuly 2024January 2026Allow1900NoNo
18760971RESISTIVE MEMORY WITH LOW VOLTAGE OPERATIONJuly 2024February 2025Allow700NoNo
18756406INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEMORY DEVICE RANKSJune 2024March 2025Allow910NoNo
18751162DEVICES AND METHODS FOR PROGRAMMING A FUSEJune 2024April 2025Allow1010NoNo
18741021MEMORY DEVICE AND METHODSJune 2024April 2025Allow1010NoNo
18733321ENHANCED DE-NOISING FOR RANDOM TELEGRAPH NOISEJune 2024January 2026Allow1900NoNo
18680945RETENTION MODE LOW LEAKAGE HIGH PERFORMANCE BIT LINE CLAMPING SCHEME BASED ON AN OUTPUT LATCH STATEMay 2024March 2026Allow2210YesNo
18677095MEMORY DEVICE AND METHOD OF OPERATING THE SAMEMay 2024December 2024Allow600NoNo
18650058MEMORY DEVICE AND OPERATING METHOD OF THE SAMEApril 2024February 2025Allow1001NoNo
18649586MANAGEMENT OF REFRESH OPERATIONS IN AN EMBEDDED DYNAMIC RANDOM ACCESS MEMORIES (DRAMS) HAVING CANARY CELLSApril 2024October 2025Allow1700NoNo
18647853MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING SKEW OF DATA STROBE SIGNAL THEREOFApril 2024October 2025Allow1700NoNo
18626971SEMICONDUCTOR MEMORY DEVICES WITH DIODE-CONNECTED MOSApril 2024October 2024Allow700NoNo
18627427MERGED BIT LINES FOR HIGH DENSITY MEMORY ARRAYApril 2024October 2024Allow700NoNo
18623070MEMORY WITH ELECTRICALLY PROGRAMMABLE FUSES AND RELATED TESTERApril 2024January 2026Allow2110NoNo
18623189COLUMN REDUNDANCY DATA CIRCUITS AND METHODS FOR HIGHER TRANSMIT SPEEDApril 2024November 2025Allow2000NoNo
18622594SYSTEMS AND METHODS FOR SERIALIZED INITIALIZATION CIRCUITRYMarch 2024September 2025Allow1700NoNo
18615790MEMORY DEVICE GENERATING VOLTAGE RESPONSIVE TO TEMPERATURE AND METHOD OF OPERATING THE SAMEMarch 2024January 2026Allow2200NoNo
18615399FUSE DELAY OF A COMMAND IN A MEMORY PACKAGEMarch 2024June 2025Allow1511NoNo
18612859MEMORY DEVICE AND OPERATION METHOD THEREOF, MEMORY SYSTEM, AND COMPUTER SYSTEMMarch 2024December 2025Allow2000NoNo
18609522SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING THE SAMEMarch 2024January 2026Allow2201NoNo
18607725THRESHOLD VOLTAGE-PROGRAMMABLE FIELD EFFECT TRANSISTOR-BASED MEMORY CELLS AND LOOK-UP TABLE IMPLEMENTED USING THE MEMORY CELLSMarch 2024September 2024Allow600NoNo
18604339APPARATUSES AND METHODS INCLUDING MULTILEVEL COMMAND AND ADDRESS SIGNALSMarch 2024September 2025Allow1800NoNo
18601100MEMORY READOUT CIRCUIT AND METHODMarch 2024September 2024Allow600NoNo
18596246EMBEDDED ELECTRONIC FUSESMarch 2024January 2026Allow2310NoNo
18590760DIVIDED CLOCK CONTROLFebruary 2024August 2025Allow1800NoNo
18589184READ BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICEFebruary 2024May 2025Allow1511NoNo
18583574MEMORY DEVICEFebruary 2024December 2025Allow2210NoNo
18581187MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING AND DUTY CYCLE ADJUSTER TRAINING METHOD THEREOFFebruary 2024December 2025Allow2210YesNo
18444446APPARATUSES SYSTEMS AND METHODS FOR IDENTIFICATION ENCODING FOR MEMORY DEVICESFebruary 2024January 2026Allow2320NoNo
18438732MEMORY SYSTEM INCLUDING A SUB-CONTROLLER AND OPERATING METHOD OF THE SUB-CONTROLLERFebruary 2024January 2025Allow1110YesNo
18681760STACKED MEMORY AND MANUFACTURING METHOD THEREFORFebruary 2024October 2025Allow2100YesNo
18428920ANTI-FUSE CELLS WITH BACKSIDE POWER RAILSJanuary 2024March 2026Allow2511YesNo
18428992MEMORY DEVICE USING WORDLINE CALIBRATION FOR MATRIX VECTOR MULTIPLICATIONJanuary 2024February 2026Allow2510NoNo
18425850FEED-FORWARD DATA TOGGLING BASED DELAY CIRCUITJanuary 2024October 2025Allow2000NoNo
18424164MEMORY SENSE AMPLIFIER TRIMMINGJanuary 2024September 2024Allow700NoNo
18413739ONE-TIME PROGRAMMABLE BITCELL WITH A THERMALLY ENHANCED RUPTUREJanuary 2024July 2025Allow1800NoNo
18411064ONE TIME PROGRAMMING MEMORY CELL AND MEMORY ARRAY FOR PHYSICALLY UNCLONABLE FUNCTION TECHNOLOGY AND ASSOCIATED RANDOM CODE GENERATING METHODJanuary 2024July 2025Allow1800NoNo
18409760MEMORY DEVICE AND METHOD FOR OPERATING THE SAMEJanuary 2024October 2025Allow2110NoNo
18408228TECHNIQUES FOR INDICATING ROW ACTIVATIONJanuary 2024August 2024Allow800NoNo
18407062INTERNAL AND EXTERNAL DATA TRANSFER FOR STACKED MEMORY DIESJanuary 2024August 2024Allow800NoNo
18404849MEMORY DEVICES, SEMICONDUCTOR DEVICES, AND METHODS OF OPERATIONS A MEMORY DEVICEJanuary 2024December 2024Allow1110NoNo
18404827PARTIAL BLOCK HANDLING IN A NON-VOLATILE MEMORY DEVICEJanuary 2024November 2024Allow1110NoNo
18540879APPARATUS AND METHOD FOR PERFORMING SELF-CALIBRATION OF RECEIVER OFFSET WITHOUT SHORTING DIFFERENTIAL INPUT TERMINALS OF RECEIVERDecember 2023July 2025Allow1900NoNo
18534840PAGE BUFFER CIRCUIT AND OPERATING METHOD THEREOF ADAPTED FOR PAGE READ DEVICEDecember 2023September 2025Allow2210NoNo
18531003OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLDDecember 2023August 2024Allow810NoNo
18529673SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEMDecember 2023June 2025Allow1800NoNo
18527371MEMORY DEVICE FOR PERFORMING TARGET REFRESH OPERATION, MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEMDecember 2023September 2025Allow2210NoNo
18519320HIGH-SPEED MULTI-WRITE READ ONLY MEMORY ARRAYNovember 2023November 2025Allow2300NoNo
18501873SELECTABLE MEMORY SYSTEM ERASE FUNCTIONNovember 2023November 2025Allow2410NoNo
18501432PIPE LATCH CIRCUIT, OPERATING METHOD THEREOF, AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAMENovember 2023September 2024Allow1110NoNo
18386518DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITYNovember 2023July 2024Allow900NoNo
18384973MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY SYSTEMOctober 2023October 2024Allow1110YesNo
18496693APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR CLOCK SWITCHING AND LOW POWER CONSUMPTIONOctober 2023May 2024Allow700NoNo
18491849SEMICONDUCTOR STORAGE DEVICEOctober 2023May 2025Allow1900NoNo
18382565MEMORY CLOCK CONTROL CIRCUIT AND METHOD FOR CONTROLLING MEMORY CLOCKOctober 2023June 2025Allow1900NoNo
18380876SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAMEOctober 2023April 2025Allow1811NoNo
18480743SMALL-AREA COMMON-VOLTAGE ANTI-FUSE ARRAYOctober 2023April 2025Allow1900NoNo
18481134APPARATUSES AND METHODS FOR INCREASED RELIABILITY ROW HAMMER COUNTSOctober 2023February 2026Allow2801NoNo
18367117Content Addressable Memory Device Having Electrically Floating Body TransistorSeptember 2023April 2024Allow700NoNo
18462380IN SITU DELAY MEASUREMENTS ON INTEGRATED CIRCUITS USING LIVE DATA AND PULSE WIDTH MODULATIONSeptember 2023August 2025Allow2310YesNo
18461013LOW LATENCY SYNCHRONIZATIONSeptember 2023July 2025Allow2201NoNo
18240619MODULE BOARD AND MEMORY MODULE INCLUDING THE SAMEAugust 2023April 2024Allow700NoNo
18458670SEMICONDUCTOR SYSTEMAugust 2023November 2025Allow2610NoNo
18239548VOLTAGE TRIMMING CIRCUITAugust 2023March 2024Allow700NoNo
18455953APPARATUSES AND METHODS FOR PROVIDING COMMAND HAVING ON-THE-FLY (OTF) LATENCY TO MEMORYAugust 2023August 2025Allow2410NoNo
18236915MULTI-STATE ONE-TIME PROGRAMMABLE MEMORY CIRCUITAugust 2023April 2025Allow2000NoNo
18450682WRITE LEVELING CIRCUIT APPLIED TO MEMORY, AND METHOD AND APPARATUS FOR CONTROLLING THE SAMEAugust 2023April 2025Allow2000NoNo
18233885DEVICES AND METHODS FOR PROGRAMMING A FUSEAugust 2023February 2024Allow600NoNo
18449051CIRCUITRY AND METHOD FOR PROCESSING DATA, AND SEMICONDUCTOR MEMORYAugust 2023September 2025Allow2510NoNo
18447950OPERATING METHOD OF MEMORY DEVICE FOR EXTENDING SYNCHRONIZATION OF DATA CLOCK SIGNAL, AND OPERATING METHOD OF ELECTRONIC DEVICE INCLUDING THE SAMEAugust 2023March 2024Allow700NoNo
18230776TRANSMITTER, MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE TRANSMITTERAugust 2023July 2025Allow2410YesNo
18362201SYSTEM AND METHOD FOR RELIABLE SENSING OF MEMORY CELLSJuly 2023June 2024Allow1010NoNo
18225766Data Storage Device and Method for Optimized RefreshJuly 2023November 2025Allow2810YesNo
18225491ACTIVE CURRENT CONSUMPTION SAVE MODE FOR NON-VOLATILE MEMORY USING FAST PROGRAMMINGJuly 2023March 2025Allow2000YesNo
18357278VERTICAL FUSE MEMORY IN ONE-TIME PROGRAM MEMORY CELLSJuly 2023December 2024Allow1611NoNo
18353294FAST REFERENCE VOLTAGE TRAINING FOR I/O INTERFACEJuly 2023March 2025Allow2000NoNo
18349654MEMORY DEVICE INCLUDING A FILTERING CIRCUIT AND MEMORY SYSTEM INCLUDING THE MEMORY DEVICE AND FILTERING CIRCUITJuly 2023December 2025Allow2910NoNo
18347641OFFSET CALIBRATION TRAINING METHOD FOR ADJUSTING DATA RECEIVER OFFSET AND MEMORY DEVICE THEREFORJuly 2023January 2025Allow1800NoNo
18345530MEMORY DEVICE AND OPERATING METHOD OF THE SAMEJune 2023January 2024Allow700NoNo
18213231REFRESH COMMAND CONTROL FOR HOST ASSIST OF ROW HAMMER MITIGATIONJune 2023January 2024Allow700NoNo
18339101SEMICONDUCTOR SYSTEM FOR PERFORMING A DATA ALIGNMENT OPERATIONJune 2023March 2025Allow2100NoNo
18257946READING CIRCUIT FOR DIFFERENTIAL OTP MEMORYJune 2023January 2025Allow1900NoNo
18209160SYSTEM FOR SHARING STATUS AMONG MULTIPLE DEVICESJune 2023November 2025Allow2910YesNo
18206864APPARATUS AND METHOD TO IMPROVE READ WINDOW BUDGET IN A THREE DIMENSIONAL NAND MEMORYJune 2023September 2025Allow2810YesNo
18330117ELECTRONIC DEVICES RELATED TO COMPENSATION OF MONITORING SIGNALSJune 2023February 2025Allow2100NoNo
18328110SEMICONDUCTOR MEMORY DEVICES WITH DIODE-CONNECTED MOSJune 2023December 2023Allow600NoNo
18328091ONE-TIME-PROGRAMMABLE MEMORY DEVICESJune 2023March 2025Allow2110NoNo
18327876SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAMEJune 2023April 2024Allow1010NoNo
18203806TRIM/TEST INTERFACE FOR DEVICES WITH LOW PIN COUNT OR ANALOG OR NO-CONNECT PINSMay 2023April 2024Allow1110NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner TECHANE, MUNA A.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
2
Examiner Affirmed
1
(50.0%)
Examiner Reversed
1
(50.0%)
Reversal Percentile
74.6%
Higher than average

What This Means

With a 50.0% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
16
Allowed After Appeal Filing
9
(56.2%)
Not Allowed After Appeal Filing
7
(43.8%)
Filing Benefit Percentile
87.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 56.2% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner TECHANE, MUNA A - Prosecution Strategy Guide

Executive Summary

Examiner TECHANE, MUNA A works in Art Unit 2827 and has examined 503 patent applications in our dataset. With an allowance rate of 92.6%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 18 months.

Allowance Patterns

Examiner TECHANE, MUNA A's allowance rate of 92.6% places them in the 79% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by TECHANE, MUNA A receive 1.28 office actions before reaching final disposition. This places the examiner in the 17% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by TECHANE, MUNA A is 18 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +6.7% benefit to allowance rate for applications examined by TECHANE, MUNA A. This interview benefit is in the 34% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 36.9% of applications are subsequently allowed. This success rate is in the 84% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 25.0% of cases where such amendments are filed. This entry rate is in the 34% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 109.1% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 79% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 86.7% of appeals filed. This is in the 80% percentile among all examiners. Of these withdrawals, 84.6% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 20.0% are granted (fully or in part). This grant rate is in the 10% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.2% of allowed cases (in the 52% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 31% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.