USPTO Examiner LE THONG QUOC - Art Unit 2827

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18749271SEMICONDUCTOR STORAGE DEVICEJune 2024May 2025Allow1110NoNo
18715300SEMICONDUCTOR DEVICE, DISPLAY APPARATUS, DATA PROCESSING SYSTEM, AND CONTROL SYSTEM OF THE SEMICONDUCTOR DEVICEMay 2024November 2025Allow1700NoNo
18672933MEMORY SYSTEMS, OPERATING METHODS AND READABLE STORAGE MEDIUMSMay 2024November 2025Allow1800NoNo
18651032APPARATUS WITH POST-MANUFACTURING DATA UPDATE MECHANISM AND METHODS FOR OPERATING THE SAMEApril 2024January 2025Allow900NoNo
18649739BUFFERED DYNAMIC RANDOM ACCESS MEMORY DEVICEApril 2024April 2025Allow1110NoNo
18642253ALGORITHM QUALIFIER COMMANDSApril 2024April 2025Allow1110NoNo
18635739Proactive Usage-Based Disturbance Mitigation based on Resource AvailabilityApril 2024November 2025Allow1910NoNo
18631003ANALOG NEUROMORPHIC CIRCUITS FOR DOT-PRODUCT OPERATION IMPLEMENTING RESISTIVE MEMORIESApril 2024August 2025Allow1610NoNo
18622866PREDICTION OF DATA RETENTION DEGRADATION OF A NON-VOLATILE MEMORY DEVICE BASED ON A MACHINE LEARNING ALGORITHMMarch 2024October 2025Allow1800NoNo
18604858MULTI-PROGRAM OF MEMORY CELLS WITHOUT INTERVENING ERASE OPERATIONSMarch 2024December 2025Allow2110YesNo
18601367MEMORY CIRCUIT AND METHOD OF OPERATING SAMEMarch 2024June 2025Allow1510NoNo
18592833INTEGRATED CIRCUIT DEVICE INCLUDING AN SRAM PORTION HAVING END POWER SELECT CIRCUITSMarch 2024April 2025Allow1410NoNo
18593635ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICEMarch 2024March 2025Allow1310NoNo
18586350PROGRAM SPEED COMPENSATION FOR NON-VOLATILE MEMORY CELLSFebruary 2024December 2025Allow2210NoNo
18583527APPARATUS WITH REFRESH MANAGEMENT MECHANISMFebruary 2024July 2025Allow1720NoNo
18437516NON-VOLATILE PROCESSOR CIRCUITFebruary 2024December 2025Allow2210NoNo
18429139DETERMINING REFERENCE VOLTAGE OFFSETS FOR READ OPERATIONS IN A MEMORY SYSTEMJanuary 2024July 2025Allow1800NoNo
18426708MAGNETIC DOMAIN WALL MOTION ELEMENT AND MAGNETIC ARRAYJanuary 2024August 2025Allow1800NoNo
18422770MEMORY DEVICE AND OPERATION METHOD THEREOFJanuary 2024August 2025Allow1800NoNo
18414524NONVOLATILE SEMICONDUCTOR MEMORY DEVICEJanuary 2024January 2025Allow1210NoNo
18413085ANTIFUSE-TYPE ONE TIME PROGRAMMING MEMORY WITH FORKSHEET TRANSISTORSJanuary 2024July 2025Allow1800NoNo
18412505GENERATION OF PHYSICALLY UNCLONABLE FUNCTION USING ONE-TIME-PROGRAMMABLE MEMORY DEVICES WITH BACK-END-OF-LINE TRANSISTORSJanuary 2024October 2025Allow2210YesNo
18410190EFUSE CELLS WITH BACKSIDE POWER RAILSJanuary 2024October 2025Allow2210NoNo
18407533THREE-DIMENSIONAL FLASH MEMORY AND OPERATION METHOD THEREFORJanuary 2024March 2025Allow1410NoNo
18406097NON-VOLATILE PHASE-CHANGE MEMORY DEVICE INCLUDING A DISTRIBUTED ROW DECODER WITH N-CHANNEL MOSFET TRANSISTORS AND RELATED ROW DECODING METHODJanuary 2024August 2025Allow2010NoNo
18403730MEMORY DEVICE, INTEGRATED CIRCUIT AND MANUFACTURING METHOD OF THE SAMEJanuary 2024July 2025Allow1800NoNo
18396118FUSE MEMORY CIRCUITDecember 2023June 2025Allow1800NoNo
18541598FRACTAL ANALOG RANDOM ACCESS MEMORYDecember 2023May 2025Allow1720YesNo
18539622ONE-TIME PROGRAMMABLE MEMORY CIRCUIT, ONE-TIME PROGRAMMABLE MEMORY AND OPERATION METHOD THEREOFDecember 2023November 2025Allow2310NoNo
18539657PHASE CHANGE MEMORY, ELECTRONIC DEVICE, AND PREPARATION METHOD FOR PHASE CHANGE MEMORYDecember 2023December 2025Allow2410NoNo
18529831Data Writing Method and Storage DeviceDecember 2023July 2025Allow1930NoNo
18530200MEMORY AND MEMORY SYSTEMDecember 2023November 2025Allow2310NoNo
18530031DYNAMIC NAND SENSING FOR A MEMORY READ OPERATIONDecember 2023November 2025Allow2310NoNo
18523069MEMORY DEVICE HAVING TIERS OF 2-TRANSISTOR MEMORY CELLS AND CHARGE STORAGE STRUCTURE HAVING MULTIPLE PORTIONSNovember 2023July 2025Allow1900NoNo
18520175COMMAND CLOCK STRUCTURENovember 2023October 2025Allow2310NoNo
18506202Sense Amplifier Circuitry and Threshold Voltage CompensationNovember 2023September 2025Allow2210NoNo
18505855MEDIA MANAGEMENT SCANNING WITH UNIFIED CRITERIA TO ALLEVIATE FAST AND LATENT READ DISTURBNovember 2023October 2025Allow2310NoNo
18505143NON-VOLATILE MEMORY AND REFERENCE CURRENT GENERATOR THEREOFNovember 2023September 2025Allow2210NoNo
18505064SEMICONDUCTOR DEVICE AND PROGRAMMABLE MACRO CIRCUITNovember 2023September 2025Allow2310NoNo
18502661SENSE AMPLIFIER AND NONVOLATILE MEMORY DEVICENovember 2023February 2026Abandon2710NoNo
18499219MEMORY CONTROLLER, MEMORY SYSTEM INCLUDING THE SAME, AND OPERATING METHOD THEREOFNovember 2023October 2025Allow2410NoNo
18485324MEMORY CIRCUIT, DYNAMIC RANDOM ACCESS MEMORY AND OPERATION METHOD THEREOFOctober 2023September 2025Allow2310NoNo
18377279WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYSOctober 2023March 2025Allow1710NoNo
18480027SEMICONDUCTOR DEVICE PROVIDING A TEST MODE RELATED TO DETECTING A DEFECT IN A METAL LINEOctober 2023September 2025Allow2410NoNo
18284822MEMORY DEVICE AND METHOD FOR PROTECTING A MEMORY DEVICE FROM THE EFFECT OF ROW HAMMERINGSeptember 2023August 2025Allow2310NoNo
18373769METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS IN RESPONSE TO A SINGLE COMMAND AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAMESeptember 2023July 2025Allow2230NoNo
18475335SEMICONDUCTOR MEMORY DEVICESeptember 2023October 2024Allow1310NoNo
18474643DYNAMIC, RANDOM-ACCESS MEMORY WITH HIDDEN MEMORY SCRUBBINGSeptember 2023August 2025Allow2310NoNo
18470314HIERARCHICAL MEMORY ARCHITECTURE INCLUDING ON-CHIP MULTI-BANK NON-VOLATILE MEMORY WITH LOW LEAKAGE AND LOW LATENCYSeptember 2023March 2025Allow1810NoNo
18469971MEMORY DEVICE USING SEMICONDUCTOR ELEMENTSeptember 2023May 2025Allow2000NoNo
18469742SYSTEMS AND METHODS FOR FLEXIBLE BANK ADDRESSING IN DIGITAL COMPUTING-IN-MEMORY (DCIM)September 2023August 2025Allow2310NoNo
18368988AUTOMATIC VENT FOR SSD COOLING ENHANCEMENTSeptember 2023January 2025Allow1610NoNo
18466561METHOD OF MEASURING REFRACTIVE INDEX OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CLASSIFYING PRODUCT GROUP USING THE SAMESeptember 2023September 2025Allow2410NoNo
18242521NONVOLATILE SEMICONDUCTOR MEMORYSeptember 2023November 2024Allow1410NoNo
18459429FLASH MEMORY WITH HIGH INTEGRATIONSeptember 2023July 2025Allow2310NoNo
18460493MEMORY DEVICESeptember 2023April 2025Allow2000NoNo
18457351SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICEAugust 2023July 2025Allow2310NoNo
18456397MAGNETIC DEVICE AND MAGNETIC STORAGE DEVICEAugust 2023July 2025Allow2310NoNo
18451069CONTROL CIRCUIT AND MEMORYAugust 2023January 2025Allow1700NoNo
18233852ENHANCED IO INTERFACE FOR PLC PROGRAM AND PROGRAM-SUSPEND-RESUME OPERATIONSAugust 2023August 2025Allow2410NoNo
18448944CIRCUIT FOR RECEIVING DATA AND MEMORYAugust 2023August 2025Allow2410NoNo
18448067MEMORY SENSE AMPLIFIER WITH PRECHARGEAugust 2023December 2024Allow1610NoNo
18232609VPASS AUTO LAYER COMPENSATION IN A MEMORY DEVICEAugust 2023July 2025Allow2310NoNo
18366687DYNAMIC MEMORY AND CONTROL METHOD FOR POWER DOWN SCHEMEAugust 2023June 2025Allow2210NoNo
18230336PLANE AND BLOCK LOCATION DEPENDENT VOLTAGE BIASES IN NAND MEMORYAugust 2023August 2025Allow2510NoNo
18364524MEMORY SYSTEMAugust 2023January 2025Allow1710NoNo
18360119CURRENT SOURCE FOR READ OF PROGRAMMABLE RESISTANCE MEMORY CELLSJuly 2023August 2025Allow2510YesNo
18359169MEMORY CIRCUIT AND METHOD OF OPERATING SAMEJuly 2023March 2025Allow2000NoNo
18359822NON-VOLATILE MEMORY WITH EARLY RAMP FOR IMPROVED PERFORMANCEJuly 2023August 2025Allow2510YesNo
18225375SINGLE-LEVEL CELL PUMP SKIP PROGRAM OPERATION PRELIMINARY PERIOD TIMING OPTIMIZATION FOR NON-VOLATILE MEMORYJuly 2023July 2025Allow2310NoNo
18356585BIPOLAR SELECTOR WITH INDEPENDENTLY TUNABLE THRESHOLD VOLTAGESJuly 2023April 2025Allow2110NoNo
18355366DUAL REFERENCE ZQ CALIBRATION CIRCUITS AND METHODSJuly 2023July 2025Allow2310NoNo
18355357ONE-TIME PROGRAMMABLE MEMORY DEVICES AND METHODSJuly 2023June 2025Allow2310NoNo
18223970PHOTONIC SPIN REGISTER, INFORMATION WRITING METHOD, AND INFORMATION READ-OUT METHODJuly 2023March 2025Allow2000NoNo
18221598SEMICONDUCTOR CHIP CAPABLE OF CALIBRATING BIAS VOLTAGE SUPPLIED TO WRITE CLOCK BUFFER REGARDLESS OF PROCESS VARIATION AND TEMPERATURE VARIATION, AND DEVICES INCLUDING THE SAMEJuly 2023April 2025Allow2100NoNo
18350372MAGNETO RESISTIVE MEMORY FOR MONOLITHIC DATA PROCESSINGJuly 2023June 2025Allow2310YesNo
18219213MAGNETIC RANDOM ACCESS MEMORY CELL AND MEMORYJuly 2023July 2025Allow2410NoNo
18216435Storage Device and Preparation Method, Read-Write Method, Storage Chip and Electronic DeviceJune 2023May 2025Allow2310NoNo
18342186Read Gate Training and TrackingJune 2023June 2025Allow2410YesNo
18341836DEVICES AND SYSTEMS FOR FLYING BITLINE WITH JUMPER CELLJune 2023May 2025Allow2310NoNo
18341128MEMORY DEVICES AND METHODS THEREOF FOR MANAGING ROW HAMMER EVENTS THEREINJune 2023March 2025Allow2010YesNo
18339280DIGITAL VERIFY FAILBIT COUNT (VFC) CIRCUITJune 2023May 2025Allow2310NoNo
18213176METHOD FOR WRITING TO MAGNETIC RANDOM ACCESS MEMORYJune 2023January 2025Allow1920NoNo
18209069FLASH MEMORY FOR REDUCING RELIABILITY DEGRADATION OF OS DATA DUE TO SMT PROCESSJune 2023May 2025Allow2310YesNo
18208306METHODS AND SYSTEMS TO INCREASE EFFICIENCY OF SRAM WRITE ASSIST SCHEMEJune 2023August 2025Allow2610NoNo
18327062POWER SUPPLY SWITCHING CIRCUIT AND MEMORYJune 2023May 2025Allow2310NoNo
18204202SIGNALING MEMORY ZONE RANKING INFORMATIONMay 2023March 2025Allow2210NoNo
18326587SEMICONDUCTOR MEMORY DEVICEMay 2023November 2024Allow1710NoNo
18202149TECHNIQUES FOR FLEXIBLE SELF-REFRESH OF MEMORY ARRAYSMay 2023June 2025Allow2410NoNo
18198892Temperature Sensor for Dual Inline Memory Modules (DIMM)May 2023August 2025Allow2710NoNo
18195540COMPUTING SYSTEM AND METHOD OF OPERATION THEREOFMay 2023May 2025Allow2410YesNo
18311191EMBEDDED MRAM FABRICATION PROCESS FOR ION BEAM ETCHING WITH PROTECTION BY TOP ELECTRODE SPACERMay 2023November 2024Allow1810NoNo
18306040ELECTRONIC DEVICE AND METHOD OF OPERATING THE SAMEApril 2023March 2025Allow2210NoNo
18305466ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTUREApril 2023January 2025Allow2100NoNo
18295285SEMICONDUCTOR MEMORY DEVICE FOR PERFORMING REMAINING BANK REFRESH OPERATION AND REFRESH METHOD THEREOFApril 2023January 2025Allow2210YesNo
18129087Test circuit and method for reading data from a memory device during memory dumpMarch 2023September 2024Allow1800NoNo
18247114NON-VOLATILE MEMORYMarch 2023January 2025Allow2210NoNo
18191668METHOD OF OPERATING MEMORY CELLMarch 2023February 2025Allow2310NoNo
18186278SMALL-AREA HIGH-EFFICIENCY READ-ONLY MEMORY (ROM) ARRAY AND METHOD FOR OPERATING THE SAMEMarch 2023January 2025Allow2210NoNo
18184682MAGNETIC MEMORY DEVICEMarch 2023October 2024Allow1900NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner LE, THONG QUOC.

Strategic Value of Filing an Appeal

Total Appeal Filings
7
Allowed After Appeal Filing
2
(28.6%)
Not Allowed After Appeal Filing
5
(71.4%)
Filing Benefit Percentile
42.3%
Lower than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 28.6% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.

Strategic Recommendations

Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.

Examiner LE, THONG QUOC - Prosecution Strategy Guide

Executive Summary

Examiner LE, THONG QUOC works in Art Unit 2827 and has examined 1,836 patent applications in our dataset. With an allowance rate of 96.7%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 18 months.

Allowance Patterns

Examiner LE, THONG QUOC's allowance rate of 96.7% places them in the 87% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by LE, THONG QUOC receive 1.20 office actions before reaching final disposition. This places the examiner in the 14% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by LE, THONG QUOC is 18 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +3.4% benefit to allowance rate for applications examined by LE, THONG QUOC. This interview benefit is in the 26% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 41.8% of applications are subsequently allowed. This success rate is in the 93% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 79.4% of cases where such amendments are filed. This entry rate is in the 96% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 200.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 96% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 100.0% of appeals filed. This is in the 93% percentile among all examiners. Of these withdrawals, 57.1% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 29.0% are granted (fully or in part). This grant rate is in the 16% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 3.7% of allowed cases (in the 82% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.6% of allowed cases (in the 56% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.