USPTO Examiner HO HOAI V - Art Unit 2827

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
18819770MEMORY DEVICEAugust 2024February 2026Allow1800NoNo
18784505APPARATUS AND METHODS FOR DETECTING COUPLING FAULTS IN NON-VOLATILE MEMORY DEVICESJuly 2024February 2026Allow1900NoNo
18758738SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAMEJune 2024November 2025Allow1700NoNo
18739724METHOD OF STORING DATA IN MEMORIESJune 2024February 2026Allow2001NoNo
18732597MECHANISMS FOR PROGRAMMING MULTILEVEL MEMORY DEVICES WITH VARIABLE MEMORY WINDOWSJune 2024November 2025Allow1700NoNo
18674788SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFERMay 2024January 2026Allow2000NoNo
18662681STORAGE CONTROLLER WITH IMPROVED WRITE AMPLIFICATION CHARACTERISTICS AND STORAGE DEVICE INCLUDING THE SAMEMay 2024September 2025Allow1610YesNo
18653585THREE-DIMENSIONAL SEMICONDUCTOR DEVICEMay 2024October 2025Allow1810NoNo
18646569MEMORY DEVICE WITH WRITE CIRCUIT AND METHOD OF OPERATING THE SAMEApril 2024September 2025Allow1710NoNo
18638994SEMICONDUCTOR DEVICE INCLUDING LAYER COMPRISING MEMORY CELLApril 2024December 2025Allow2020NoNo
18633842MEMORY DEVICE WITH PHYSICAL UNCLONABLE FUNCTION AND OPERATING METHOD THEREOFApril 2024September 2025Allow1710NoNo
18633362PULSE BASED MULTI-LEVEL CELL PROGRAMMINGApril 2024August 2025Allow1710NoNo
18629086DRAM INTERFACE MODE WITH IMPROVED CHANNEL INTEGRITY AND EFFICIENCY AT HIGH SIGNALING RATESApril 2024August 2025Allow1610NoNo
18629167SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERINGApril 2024August 2025Allow1610NoNo
18629034MEMORY DEVICES AND STACK MEMORY DEVICES GENERATING DATA STROBING SIGNAL FOR DATA OUTPUTApril 2024February 2026Allow2210NoNo
18624515MEMORY DEVICE USING SEMICONDUCTOR ELEMENTApril 2024January 2026Allow2110NoNo
18697495UNDERLYING TRANSISTOR CIRCUIT OF SEMICONDUCTOR MEMORY AND PREPARATION METHOD FOR THE SAMEApril 2024October 2025Allow1900NoNo
18621855SYSTEMS AND METHODS TO STORE MULTI-LEVEL DATAMarch 2024April 2025Allow1310NoNo
18618567MEMORY DEVICE WITH VERTICAL WIRING BETWEEN SEMICONDUCTOR LAYERS AND MEMORY SYSTEM INCLUDING THE SAMEMarch 2024February 2026Allow2310YesNo
18618777SEMICONDUCTOR DEVICE HAVING PDA FUNCTIONMarch 2024April 2025Allow1210NoNo
18614221PAGE BUFFERS AND OPERATION METHODS THEREOF, MEMORY DEVICES, AND MEMORY SYSTEMSMarch 2024February 2026Allow2310YesNo
18610387STORAGE SYSTEM LATCH CONTROLMarch 2024January 2026Allow2210NoNo
18601456VARIABLE VOLTAGE BIT LINE PRECHARGEMarch 2024March 2025Allow1310NoNo
18600736MEMORY DEVICE PERFORMING TIMING SKEW AND OFFSET CALIBRATIONMarch 2024September 2025Allow1800NoNo
18597576TECHNIQUES TO CONFIGURE DRIVERSMarch 2024September 2025Allow1900NoNo
18595293SEMICONDUCTOR DEVICE VERIFYING SIGNAL SUPPLIED FROM OUTSIDEMarch 2024April 2025Allow1310NoNo
18588739SEMICONDUCTOR MEMORY DEVICE SELECTIVELY PERFORMING SELF-REFRESH OPERATION AND SELF-REFRESH METHOD THEREOFFebruary 2024January 2026Allow2210NoNo
18589303SEMICONDUCTOR MEMORY DEVICE WITH VOLTAGE-CONTROLLED DATA LATCH NODEFebruary 2024January 2026Allow2210NoNo
18588686TECHNIQUES AND DEVICES TO REDUCE BUS CROSS TALK FOR MEMORY SYSTEMSFebruary 2024December 2025Allow2210NoNo
18586149VARYING-POLARITY READ OPERATIONS FOR POLARITY-WRITTEN MEMORY CELLSFebruary 2024April 2025Allow1310NoNo
18585378SEMICONDUCTOR-ELEMENT-INCLUDING MEMORY DEVICEFebruary 2024August 2025Allow1800NoNo
18584669ADDRESS MAPPING FOR IMPROVED RELIABILITYFebruary 2024December 2025Allow2210NoNo
18422908SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICEJanuary 2024July 2025Allow1811NoNo
18418001MEMORY DEVICE INCLUDING VOLTAGE GENERATING CIRCUIT AND OPERATION METHOD OF MEMORY DEVICEJanuary 2024December 2025Allow2310YesNo
18415278Systems and Methods for Controlling Power Assertion In a Memory DeviceJanuary 2024March 2025Allow1410NoNo
18402875IMPLEMENTING GLOBAL WORDLINE BIAS VOLTAGES FOR READ STATE TRANSITIONSJanuary 2024November 2025Allow2310YesNo
18402130GENERATION OF PHYSICALLY UNCLONABLE FUNCTION USING ONE-TIME-PROGRAMMABLE MEMORY DEVICES WITH BACKSIDE INTERCONNECT STRUCTURESJanuary 2024December 2025Allow2310NoNo
18402115Refresh Window Aware Truncation Of Restore Voltages For Random Access MemoryJanuary 2024August 2025Allow2000NoNo
18398876MULTI-LEVEL DRIVE OF CONTENT ADDRESSABLE MEMORY (CAM) CELLSDecember 2023November 2025Allow2201NoNo
18538843NON-DESTRUCTIVE MODE CACHE PROGRAMMING IN NAND FLASH MEMORY DEVICESDecember 2023March 2025Allow1510NoNo
18527941SEMICONDUCTOR MEMORY WITH DIFFERENT THRESHOLD VOLTAGES OF MEMORY CELLSDecember 2023March 2025Allow1510NoNo
18528311DUAL-PRECISION ANALOG MEMORY CELL AND ARRAYDecember 2023October 2024Allow1100NoNo
18522252MEMORY DEVICE AND REFRESH CONTROLLING METHOD THEREOFNovember 2023November 2025Allow2310YesNo
18520610ANTIFUSE-TYPE NON-VOLATILE MEMORY CELLNovember 2023February 2026Allow2611NoNo
18515257MEMORY DEVICENovember 2023July 2025Allow2000NoNo
18516792SENSING AMPLIFIER OF MEMORY ARRAY, MEMORY DEVICE AND DATA READ METHOD WITH TWO STATE REFERENCE VOLTAGESNovember 2023October 2025Allow2310YesNo
18510829CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICENovember 2023November 2025Allow2410NoNo
18509145BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, MEMORY MODULE, AND OPERATION METHOD OF SEMICONDUCTOR PACKAGENovember 2023January 2026Allow2611NoNo
18497747CLOCK DISTRIBUTION NETWORK, AND A SEMICONDUCTOR APPARATUS AND A SEMICONDUCTOR SYSTEM INCLUDING THE SAMEOctober 2023November 2025Allow2410NoNo
18497772SEMICONDUCTOR DEVICE AND TRAINING METHOD OF THE SEMICONDUCTOR DEVICEOctober 2023December 2025Allow2511NoNo
18493566SEMICONDUCTOR DEVICES FOR CALIBRATING PHASE OF DIVISION CLOCKOctober 2023October 2025Allow2410NoNo
18382551SEMICONDUCTOR DEVICE COMPRISING WIRING LAYER OVER DRIVER CIRCUITOctober 2023October 2024Allow1110NoNo
18488184SYSTEM AND METHOD FOR STROBE-BASED READ PATH CLOCKINGOctober 2023October 2025Allow2410YesNo
18481337SYSTEM AND METHOD FOR IN-NAND PATTERN SEARCHOctober 2023October 2025Allow2410NoNo
18375810ROW HAMMER MITIGATIONOctober 2023February 2026Allow2920NoNo
18476030SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICESeptember 2023September 2024Allow1210NoNo
18373162DEFERRED FRACTIONAL MEMORY ROW ACTIVATIONSeptember 2023August 2024Allow1110NoNo
18370773MEMORY WITH EXTERNAL CLOCK SYNCHRONIZED OPERATIONSeptember 2023May 2025Allow2000NoNo
18470271SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONSSeptember 2023July 2025Allow2201NoNo
18461291MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICESeptember 2023November 2024Allow1520YesNo
18241320PROVIDING POWER AVAILABILITY INFORMATION TO MEMORYSeptember 2023August 2024Allow1110NoNo
18458152MEMORY DEVICE SUPPORTING PARALLEL COMPRESSION READ OPERATION AND MEMORY SYSTEM INCLUDING THE SAMEAugust 2023August 2025Allow2310NoNo
18458165SIGNAL TRANSMISSION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAMEAugust 2023April 2025Allow2000NoNo
18449540SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM RELATED TO ROW HAMMER REFRESHAugust 2023April 2025Allow2000NoNo
18232949MEMORY DEVICES FOR MULTIPLE READ OPERATIONSAugust 2023July 2024Allow1111NoNo
18447872SENSE AMPLIFIERAugust 2023July 2024Allow1110NoNo
18446818Systems and Methods for Controlling Power Management Operations in a Memory DeviceAugust 2023August 2024Allow1210NoNo
18362322LATCH CIRCUIT AND MEMORY DEVICEJuly 2023August 2024Allow1310NoNo
18362223MIM EFUSE MEMORY DEVICES AND FABRICATION METHOD THEREOFJuly 2023August 2024Allow1311NoNo
18354706CONTENT-ADDRESSABLE MEMORY AND ANALOG CONTENT-ADDRESSABLE MEMORY DEVICEJuly 2023September 2024Allow1410NoNo
18346565Acceleration of In-Memory-Compute ArraysJuly 2023October 2024Allow1510YesNo
18340214SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOFJune 2023November 2024Abandon1710NoNo
18335504SEMICONDUCTOR TEST APPARATUS CAPABLE OF INDUCING REDUCTION OF POWER CONSUMPTIONJune 2023July 2025Allow2511NoNo
18209057ADDRESS DECODING METHOD, AND MEMORY CONTROLLER AND SEMICONDUCTOR MEMORY SYSTEM USING THE SAMEJune 2023July 2025Allow2511YesNo
18334261DATA OUTPUT BUFFER AND SEMICONDUCTOR APPARATUS INCLUDING THE SAMEJune 2023September 2024Allow1510NoNo
18039429Method, Device, Storage Medium and Electronic Device for Data ReadingMay 2023May 2025Allow2410NoNo
18253870ANTI-FUSE MEMORY CELL AND DATA READ-WRITE CIRCUIT THEREOFMay 2023February 2024Allow900NoNo
18198623GENERATING SEMI-SOFT BIT DATA DURING CORRECTIVE READ OPERATIONS IN MEMORY DEVICESMay 2023June 2025Allow2510YesNo
18318264Multiple Stack High Voltage Circuit for MemoryMay 2023May 2024Allow1210NoNo
18317367SEMICONDUCTOR DEVICEMay 2023February 2025Allow2100NoNo
18314997DYNAMIC RANDOM ACCESS MEMORY-BASED CONTENT-ADDRESSABLE MEMORY (DRAM-CAM) ARCHITECTURE FOR EXACT PATTERN MATCHINGMay 2023December 2024Allow1900NoNo
18301441SEMICONDUCTOR SYSTEMApril 2023March 2025Allow2301NoNo
18301800NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH PERFORMS IMPROVED ERASE OPERATIONApril 2023May 2024Allow1210NoNo
18121344MEMORY SYSTEM INCLUDING SEMICONDUCTOR MEMORY AND CONTROLLERMarch 2023April 2024Allow1310NoNo
18119193Integrated Multilevel Memory Apparatus and Method of Operating Same For Enhanced MemoryMarch 2023September 2025Allow3130NoNo
18173567MEMORY DEVICE INCLUDING PAGE BUFFER, MEMORY SYSTEM INCLUDING PAGE BUFFER, AND OPERATING METHOD THEREOFFebruary 2023October 2024Allow2000NoNo
18170462INTEGRATED CIRCUIT STRUCTURE WITH COMPLEMENTARY FIELD EFFECT TRANSISTOR AND MEMORY CELL AND METHOD OF MAKING THEREOFFebruary 2023July 2025Allow2911NoNo
18158108MEMORY DEVICE SENSE AMPLIFIER CONTROLJanuary 2023March 2025Allow2510NoNo
18157186PAGE BUFFER CIRCUIT WITH BIT LINE SELECT TRANSISTORJanuary 2023March 2025Allow2640YesNo
18097668MEMORY DEVICE DESERIALIZER CIRCUIT WITH A REDUCED FORM FACTORJanuary 2023April 2024Allow1500NoNo
18154794DATA RECEIVING CIRCUIT, DATA RECEIVING SYSTEM AND MEMORY DEVICEJanuary 2023February 2025Allow2510NoNo
18154815CONTROL APPARATUS, MEMORY, SIGNAL PROCESSING METHOD, AND ELECTRONIC DEVICEJanuary 2023March 2025Allow2611NoNo
18096346PAGE BUFFER, MEMORY DEVICE, AND METHOD FOR PROGRAMMING THEREOFJanuary 2023February 2025Allow2510NoNo
18153431READOUT CIRCUIT, MEMORY, AND METHOD OF READING OUT DATA OF MEMORYJanuary 2023July 2023Allow610NoNo
18150584MANAGING PAGE BUFFER CIRCUITS IN MEMORY DEVICESJanuary 2023March 2025Allow2710YesNo
18149166CONTROL CIRCUIT ON MEMORY CHIP AND DYNAMIC RANDOM ACCESS MEMORYJanuary 2023September 2024Allow2100NoNo
18085963PAGE BUFFER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAMEDecember 2022April 2024Allow1610YesNo
18084892IMPRINT RECOVERY FOR MEMORY CELLSDecember 2022March 2024Allow1510NoNo
18082005DUAL-PRECISION ANALOG MEMORY CELL AND ARRAYDecember 2022August 2023Allow901NoNo
18082491CONTROL METHOD FOR MEMORY ERASE OPERATIONS, APPARATUS, AND STORAGE MEDIUM THEREOFDecember 2022November 2024Allow2310YesNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner HO, HOAI V.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
4
Examiner Affirmed
0
(0.0%)
Examiner Reversed
4
(100.0%)
Reversal Percentile
94.9%
Higher than average

What This Means

With a 100.0% reversal rate, the PTAB has reversed the examiner's rejections more often than affirming them. This reversal rate is in the top 25% across the USPTO, indicating that appeals are more successful here than in most other areas.

Strategic Value of Filing an Appeal

Total Appeal Filings
35
Allowed After Appeal Filing
23
(65.7%)
Not Allowed After Appeal Filing
12
(34.3%)
Filing Benefit Percentile
91.2%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 65.7% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner HO, HOAI V - Prosecution Strategy Guide

Executive Summary

Examiner HO, HOAI V works in Art Unit 2827 and has examined 1,546 patent applications in our dataset. With an allowance rate of 93.9%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 18 months.

Allowance Patterns

Examiner HO, HOAI V's allowance rate of 93.9% places them in the 82% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by HO, HOAI V receive 1.00 office actions before reaching final disposition. This places the examiner in the 10% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by HO, HOAI V is 18 months. This places the examiner in the 96% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +0.1% benefit to allowance rate for applications examined by HO, HOAI V. This interview benefit is in the 17% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 40.3% of applications are subsequently allowed. This success rate is in the 91% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 60.9% of cases where such amendments are filed. This entry rate is in the 86% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 125.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 84% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 88.9% of appeals filed. This is in the 82% percentile among all examiners. Of these withdrawals, 56.2% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 61.3% are granted (fully or in part). This grant rate is in the 66% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 8.9% of allowed cases (in the 92% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 1.7% of allowed cases (in the 66% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.
  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.