Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18788047 | SENSING CIRCUIT IN A VERTICAL MEMORY SYSTEM | July 2024 | February 2026 | Allow | 19 | 0 | 0 | No | No |
| 18746904 | MEMORY DEVICE WITH SEGMENTED SGD DRAIN | June 2024 | February 2026 | Allow | 20 | 0 | 0 | No | No |
| 18679914 | SEMICONDUCTOR MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME | May 2024 | July 2025 | Allow | 13 | 1 | 0 | No | No |
| 18677014 | ONE-SIDED TRANSMITTER EQUALIZATION | May 2024 | February 2026 | Allow | 20 | 0 | 0 | No | No |
| 18672775 | MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME USING BIT LINE BIAS VOLTAGE SCHEME | May 2024 | March 2026 | Allow | 21 | 1 | 0 | No | No |
| 18666886 | SEMICONDUCTOR MEMORY DEVICE TO HOLD 5-BITS OF DATA PER MEMORY CELL | May 2024 | February 2026 | Allow | 21 | 1 | 0 | No | No |
| 18656344 | APPARATUS FOR CONTROLLING NAND FLASH MEMORY DEVICE AND METHOD FOR CONTROLLING SAME | May 2024 | March 2026 | Allow | 22 | 1 | 0 | No | No |
| 18624312 | MEMORY CARD WITH MULTIPLE MODES, AND HOST DEVICE CORRESPONDING TO THE MEMORY CARD | April 2024 | July 2025 | Allow | 15 | 1 | 0 | No | No |
| 18615521 | RRAM CIRCUIT | March 2024 | January 2025 | Allow | 10 | 1 | 0 | No | No |
| 18593980 | SEMICONDUCTOR MEMORY DEVICE | March 2024 | October 2025 | Allow | 19 | 0 | 0 | No | No |
| 18582185 | PARALLEL ACCESS IN A MEMORY ARRAY | February 2024 | January 2025 | Allow | 11 | 1 | 0 | No | No |
| 18400297 | NON-VOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE | December 2023 | January 2025 | Allow | 12 | 1 | 0 | Yes | No |
| 18399613 | Voltage Control in Memory Devices | December 2023 | January 2026 | Allow | 25 | 0 | 0 | No | No |
| 18542128 | METHOD OF OPERATING MEMORY, MEMORY, AND MEMORY SYSTEM | December 2023 | October 2025 | Allow | 22 | 0 | 0 | No | No |
| 18541839 | CLOCK SIGNAL GENERATOR AND METHOD OF OPERATING THE SAME | December 2023 | February 2026 | Allow | 26 | 1 | 0 | Yes | No |
| 18540350 | MEMORY AND MULTI-INITIALIZATION OPERATION OPERATING METHOD THEREOF, MEMORY SYSTEM AND READABLE STORAGE MEDIUM | December 2023 | January 2026 | Allow | 25 | 1 | 0 | No | No |
| 18538659 | SEMICONDUCTOR STORAGE DEVICE WITH TRANSISTORS OF PERIPHERAL CIRCUITS ON TWO CHIPS | December 2023 | September 2025 | Allow | 21 | 1 | 0 | No | No |
| 18532526 | CONTROL METHOD FOR NAND FLASH MEMORY TO COMPLETE XNOR OPERATION | December 2023 | September 2025 | Allow | 22 | 0 | 0 | No | No |
| 18528126 | CONTINUOUS PROGRAMMING OF MEMORY CELL SLICES IN A PROGRAMMING METHOD OF A MEMORY, MEMORY AND MEMORY SYSTEM | December 2023 | January 2026 | Allow | 26 | 1 | 0 | No | No |
| 18528376 | MEMORY, OPERATION METHOD OF MEMORY AND MEMORY SYSTEM INCLUDING READ CALIBRATION CIRCUIT | December 2023 | December 2025 | Allow | 25 | 1 | 0 | No | No |
| 18524694 | PASS VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE WITH A DEFECTIVE DECK | November 2023 | October 2025 | Allow | 23 | 0 | 0 | No | No |
| 18524721 | MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE | November 2023 | January 2026 | Allow | 26 | 1 | 0 | Yes | No |
| 18522829 | NONVOLATILE MEMORY DEVICE INCLUDING A LOGIC CIRCUIT TO CONTROL WORD LINE VOLTAGES | November 2023 | July 2024 | Allow | 8 | 1 | 0 | No | No |
| 18521957 | PROGRAM VERIFY COMPENSATION IN A MEMORY DEVICE WITH A DEFECTIVE DECK | November 2023 | November 2025 | Allow | 24 | 1 | 0 | Yes | No |
| 18512746 | NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF INCLUDING A NEGATIVE DISCHARGE VOLTAGE | November 2023 | November 2025 | Allow | 24 | 1 | 0 | No | No |
| 18388032 | VOLATILE DATA STORAGE IN NAND MEMORY | November 2023 | June 2025 | Allow | 19 | 0 | 0 | No | No |
| 18386472 | MEMORY DEVICE HAVING ASYMMETRIC PAGE BUFFER ARRAY ARCHITECTURE | November 2023 | June 2025 | Allow | 19 | 0 | 0 | No | No |
| 18385642 | METHOD AND MEMORY USED FOR REDUCING PROGRAM DISTURBANCE BY ADJUSTING VOLTAGE OF DUMMY WORD LINE | October 2023 | January 2026 | Allow | 27 | 2 | 0 | No | No |
| 18383603 | MEMORY DEVICE AND METHOD OF FABRICATING MEMORY DEVICE INCLUDING A TEST CIRCUIT | October 2023 | November 2025 | Allow | 25 | 1 | 0 | Yes | No |
| 18483638 | ELECTRONIC CIRCUIT WITH RRAM CELLS | October 2023 | September 2025 | Allow | 23 | 1 | 0 | No | No |
| 18482996 | ARTIFICIAL SELECT GATE CUT FOR NAND | October 2023 | September 2025 | Allow | 23 | 1 | 0 | Yes | No |
| 18482538 | READ FOR MEMORY CELL WITH THRESHOLD SWITCHING SELECTOR | October 2023 | September 2025 | Allow | 24 | 1 | 0 | Yes | No |
| 18377623 | Resistive Change Element Arrays | October 2023 | August 2024 | Allow | 10 | 1 | 0 | No | No |
| 18370866 | MEMORY CONTROL CIRCUIT CAPABLE OF GENERATING AN UPDATED REFERENCE CURRENT | September 2023 | June 2025 | Allow | 20 | 0 | 0 | No | No |
| 18464058 | MEMORY DEVICE AND COMPUTER SYSTEM COMPRISING THE MEMORY DEVICE | September 2023 | October 2025 | Allow | 25 | 1 | 0 | No | No |
| 18242397 | POWER LEAKAGE BLOCKING IN LOW-DROPOUT REGULATOR | September 2023 | June 2024 | Allow | 9 | 1 | 0 | No | No |
| 18460911 | CODE COMPARATORS WITH NONPOLAR DYNAMICAL SWITCHES | September 2023 | May 2025 | Allow | 21 | 0 | 0 | No | No |
| 18460486 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR STORAGE DEVICE CONFIGURED FOR OPERATION IN A NORMAL MODE AND TWO TEST MODES | September 2023 | September 2025 | Allow | 24 | 1 | 0 | No | No |
| 18459357 | MEMORY DEVICE INCLUDING ROW DECODER | August 2023 | May 2025 | Allow | 21 | 0 | 0 | No | No |
| 18239576 | NON-VOLATILE MEMORY DEVICE INCLUDING SUB-BLOCKS HAVING DIFFERENT SIZES AND STORAGE DEVICE | August 2023 | September 2025 | Allow | 24 | 1 | 0 | Yes | No |
| 18457202 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR PROGRAMMING SELECT TRANSISTORS | August 2023 | October 2025 | Allow | 25 | 1 | 0 | No | No |
| 18456554 | SEMICONDUCTOR MEMORY DEVICE | August 2023 | April 2025 | Allow | 20 | 0 | 0 | No | No |
| 18237039 | MEMORY ARRAYS HAVING MULTIPLE STRINGS OF SERIES-CONNECTED MEMORY CELLS SELECTIVELY CONNECTED IN PARALLEL, THEIR FABRICATION, AND THEIR OPERATION | August 2023 | August 2025 | Allow | 24 | 1 | 0 | No | No |
| 18452573 | MEMORY DEVICE AND STORAGE DEVICE STORING DATA BASED ON INFORMATION OF MEMORY CELLS | August 2023 | September 2025 | Allow | 25 | 1 | 0 | Yes | No |
| 18453113 | MEMORY DEVICE FOR PERFORMING READ OPERATION | August 2023 | September 2025 | Allow | 25 | 1 | 0 | Yes | No |
| 18234429 | MEMORY DEVICES WITH A LOWER EFFECTIVE PROGRAM VERIFY LEVEL | August 2023 | July 2025 | Allow | 23 | 1 | 0 | No | No |
| 18450053 | OPERATION METHOD OF MEMORY DEVICE USING PASS VOLTAGES | August 2023 | January 2026 | Allow | 29 | 3 | 0 | Yes | No |
| 18232539 | THREE-DIMENSIONAL ONE TIME PROGRAMMABLE MEMORY | August 2023 | March 2026 | Allow | 31 | 2 | 0 | No | No |
| 18228088 | UNSELECT WORD LINE SWITCH BIAS SCHEME FOR NON-VOLATILE MEMORY APPARATUS | July 2023 | July 2025 | Allow | 23 | 1 | 0 | No | No |
| 18362198 | Novel Bank Design with Differential Bulk Bias in eFuse array | July 2023 | September 2024 | Allow | 14 | 1 | 0 | No | No |
| 18220681 | MEMORY DEVICE HAVING CACHE STORAGE UNIT FOR STORAGE OF CURRENT AND NEXT DATA PAGES AND PROGRAM OPERATION THEREOF | July 2023 | October 2025 | Allow | 27 | 3 | 0 | Yes | Yes |
| 18341088 | MEMORY CIRCUIT AND CACHE CIRCUIT CONFIGURATION | June 2023 | May 2024 | Allow | 11 | 1 | 0 | No | No |
| 18340977 | THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY HAVING A CONTROLLER CONFIGURED TO EXECUTE A PROGRAM OPERATION ON MEMORY CELLS | June 2023 | August 2024 | Allow | 14 | 1 | 0 | No | No |
| 18338153 | SEMICONDUCTOR DEVICE | June 2023 | March 2025 | Allow | 21 | 0 | 0 | No | No |
| 18323306 | MEMORY DEVICE INCLUDING PRECHARGE VOLTAGE CONTROL AND METHOD OF OPERATING THE MEMORY DEVICE | May 2023 | September 2025 | Allow | 28 | 1 | 0 | No | No |
| 18315703 | SEMICONDUCTOR DEVICES | May 2023 | April 2025 | Allow | 23 | 0 | 0 | No | No |
| 18195181 | REDUCING PROGRAMMING DISTURBANCE IN MEMORY DEVICES | May 2023 | April 2024 | Allow | 11 | 1 | 0 | No | No |
| 18312696 | MEMORY SYSTEM INCLUDING SEMICONDUCTOR MEMORY AND CONTROLLER CAPABLE OF DETERMINING NECESSARY SHIFTED BOUNDARY READ VOLTAGES IN A SHORT PERIOD OF TIME | May 2023 | April 2024 | Allow | 11 | 1 | 0 | No | No |
| 18142423 | PIECEWISE LINEAR AND TRIMMABLE TEMPERATURE SENSOR | May 2023 | March 2024 | Allow | 10 | 1 | 0 | No | No |
| 18141136 | MEMORY DEVICE INCLUDING INITIAL CHARGING PHASE FOR DOUBLE SENSE OPERATION | April 2023 | October 2025 | Allow | 29 | 2 | 0 | No | No |
| 18300958 | MEMORY DEVICE FOR PERFORMING FOGGY-FINE PROGRAM OPERATION AND METHOD OF OPERATING THE MEMORY DEVICE | April 2023 | August 2025 | Allow | 28 | 1 | 0 | No | No |
| 18031356 | HIGH-SPEED AND LARGE-CURRENT ADJUSTABLE PULSE CIRCUIT, OPERATING CIRCUIT AND OPERATING METHOD OF PHASE-CHANGE MEMORY | April 2023 | December 2024 | Allow | 20 | 1 | 0 | No | No |
| 18193336 | SEMICONDUCTOR DEVICE INCLUDING SHIELD LAYER | March 2023 | September 2025 | Allow | 30 | 1 | 0 | No | No |
| 18192294 | SEMICONDUCTOR MEMORY WITH ADJUSTMENT CIRCUIT AND METHOD FOR CONTROLLING A SEMICONDUCTOR MEMORY | March 2023 | July 2025 | Allow | 27 | 1 | 0 | No | No |
| 18188684 | QUANTUM INFORMATION STORAGE DEVICE | March 2023 | May 2025 | Allow | 25 | 0 | 0 | No | No |
| 18186960 | CONVERTIBLE MEMORY DEVICE | March 2023 | March 2025 | Allow | 24 | 1 | 0 | No | No |
| 18186480 | STORAGE DEVICE FOR BACKING UP STATE GROUP DATA IN THE EVENT OF A SUDDEN POWER-OFF AND PROGRAM METHOD THEREOF | March 2023 | May 2025 | Allow | 26 | 2 | 0 | Yes | No |
| 18122928 | MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR MULTI-PASS PROGRAMMING THEREOF TO REDUCE PROGRAMMING TIME | March 2023 | February 2025 | Allow | 23 | 1 | 0 | No | No |
| 18185961 | MULTILAYERED VERTICAL SPIN-ORBIT TORQUE DEVICES | March 2023 | August 2025 | Allow | 29 | 2 | 0 | No | No |
| 18184842 | VOLTAGE GENERATOR AND MEMORY DEVICE INCLUDING THE SAME | March 2023 | March 2025 | Allow | 24 | 1 | 0 | Yes | No |
| 18121466 | SEMICONDUCTOR DEVICE FOR WRITING TO A STORAGE ELEMENT | March 2023 | February 2025 | Allow | 23 | 1 | 0 | No | No |
| 18180864 | FORMING OPERATION METHOD OF RESISTIVE RANDOM ACCESS MEMORY | March 2023 | December 2024 | Allow | 21 | 1 | 0 | No | No |
| 18179505 | MEMORY SYSTEM FOR PERFORMING AN ERASE VOLTAGE APPLICATION OPERATION AND AN ERASE VERIFY OPERATION FOR A NONVOLATILE MEMORY | March 2023 | March 2025 | Allow | 24 | 1 | 0 | Yes | No |
| 18179310 | MEMORY SYSTEM AND CONTROL METHOD TO SAVE DATA AFTER A POWER DISABLE REQUEST | March 2023 | June 2025 | Allow | 27 | 2 | 0 | Yes | No |
| 18117974 | APPARATUSES AND METHODS FOR COMPUTE ENABLED CACHE | March 2023 | March 2024 | Allow | 12 | 1 | 0 | No | No |
| 18115999 | PIPE REGISTER AND SEMICONDUCTOR APPARATUS INCLUDING THE PIPE REGISTER | March 2023 | March 2025 | Allow | 24 | 1 | 0 | No | No |
| 18176442 | SEMICONDUCTOR MEMORY DEVICE HAVING A CONTROL CIRCUIT FOR CHANGING A DRIVE CAPABILITY OF AN OUTPUT CIRCUIT OF THE SEMICONDUCTOR MEMORY DEVICE | February 2023 | March 2025 | Allow | 24 | 1 | 0 | No | No |
| 18176347 | FLASH MEMORY DEVICE FOR ADJUSTING TRIP VOLTAGE USING VOLTAGE REGULATOR AND SENSING METHOD THEREOF | February 2023 | December 2024 | Allow | 21 | 0 | 0 | No | No |
| 18175043 | NONVOLATILE MEMORY DEVICE INCLUDING A LOGIC CIRCUIT TO CONTROL WORD AND BITLINE VOLTAGES | February 2023 | August 2023 | Allow | 6 | 1 | 0 | No | No |
| 18173242 | DEGRADATION-AWARE TRAINING SCHEME FOR RELIABLE MEMRISTOR DEEP LEARNING ACCELERATOR DESIGN | February 2023 | March 2025 | Allow | 25 | 1 | 0 | No | No |
| 18110489 | MEMORIES FOR PERFORMING SUCCESSIVE PROGRAMMING OPERATIONS | February 2023 | February 2025 | Allow | 24 | 1 | 0 | No | No |
| 18169610 | ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A DRAM DEVICE | February 2023 | March 2025 | Allow | 25 | 1 | 0 | No | No |
| 18167617 | MEMORY DEVICE AND METHOD FOR FORMING THE SAME | February 2023 | December 2024 | Allow | 22 | 0 | 0 | No | No |
| 18166737 | MEMORY DEVICE, MEMORY SYSTEM AND METHOD FOR OPERATING MEMORY SYSTEM INCLUDING COMMAND AND ADDRESS TRAINING | February 2023 | February 2025 | Allow | 24 | 0 | 0 | No | No |
| 18107200 | MEMORY DEVICES WITH DYNAMIC PROGRAM VERIFY LEVELS | February 2023 | August 2023 | Allow | 7 | 1 | 0 | No | No |
| 18163584 | WRITE ASSIST CIRCUIT FOR STATIC RANDOM-ACCESS MEMORY (SRAM) | February 2023 | September 2024 | Allow | 19 | 0 | 0 | No | No |
| 18103364 | DRIVE CIRCUIT WITH IMPROVED TIMING MARGIN FOR MEMORY DEVICE | January 2023 | February 2025 | Allow | 25 | 1 | 0 | No | No |
| 18101287 | MEMORY DEVICE SUPPORTING IN-MEMORY MAC OPERATION BETWEEN TERNARY INPUT DATA AND BINARY WEIGHT USING CHARGE SHARING METHOD AND OPERATION METHOD THEREOF | January 2023 | December 2024 | Allow | 22 | 1 | 0 | No | No |
| 18101140 | SEMICONDUCTOR DEVICE INCLUDING TRANSISTOR | January 2023 | February 2024 | Allow | 13 | 1 | 0 | No | No |
| 18156955 | THREE-DIMENSIONAL MEMORY DEVICE AND IMPROVED METHODS OF READING THE SAME BY SHORTENING READ TIMES | January 2023 | August 2024 | Allow | 19 | 3 | 0 | No | No |
| 18155900 | COUNTER CIRCUIT | January 2023 | September 2024 | Allow | 20 | 0 | 0 | No | No |
| 18095711 | MEMORY DEVICES FOR PROGRAM VERIFY OPERATIONS | January 2023 | July 2023 | Allow | 6 | 1 | 0 | No | No |
| 18095049 | MEMORY DEVICES WITH FOUR DATA LINE BIAS LEVELS | January 2023 | October 2023 | Allow | 9 | 1 | 0 | No | No |
| 18147007 | CONTROLLER, MEMORY DEVICE AND CONTROL METHOD FOR ADJUSTING POWER CONSUMPTION | December 2022 | August 2025 | Allow | 32 | 2 | 0 | No | No |
| 18077557 | MANAGING DATA TRANSFER IN SEMICONDUCTOR DEVICES | December 2022 | August 2025 | Allow | 32 | 2 | 0 | Yes | No |
| 18062262 | SEMICONDUCTOR DEVICE AND TESTING METHOD FOR MEMORY CIRCUIT | December 2022 | March 2025 | Allow | 27 | 3 | 0 | No | No |
| 18054359 | RRAM CIRCUIT | November 2022 | November 2023 | Allow | 13 | 1 | 0 | No | No |
| 17975609 | SEMICONDUCTOR MEMORY DEVICE | October 2022 | June 2024 | Allow | 20 | 0 | 0 | No | No |
| 17973726 | SELECTABLE ROW HAMMER MITIGATION | October 2022 | February 2025 | Allow | 27 | 1 | 0 | Yes | No |
| 17962683 | CONFLICT DETECTION AND ADDRESS ARBITRATION FOR ROUTING SCATTER AND GATHER TRANSACTIONS FOR A MEMORY BANK | October 2022 | March 2025 | Allow | 29 | 1 | 0 | Yes | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner BUI, THA-O H.
With a 33.3% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 32.1% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.
✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner BUI, THA-O H works in Art Unit 2825 and has examined 669 patent applications in our dataset. With an allowance rate of 89.2%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 19 months.
Examiner BUI, THA-O H's allowance rate of 89.2% places them in the 71% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.
On average, applications examined by BUI, THA-O H receive 1.56 office actions before reaching final disposition. This places the examiner in the 29% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.
The median time to disposition (half-life) for applications examined by BUI, THA-O H is 19 months. This places the examiner in the 95% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.
Conducting an examiner interview provides a -0.5% benefit to allowance rate for applications examined by BUI, THA-O H. This interview benefit is in the 11% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 29.7% of applications are subsequently allowed. This success rate is in the 57% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 36.2% of cases where such amendments are filed. This entry rate is in the 54% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.
When applicants request a pre-appeal conference (PAC) with this examiner, 53.8% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 47% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.
This examiner withdraws rejections or reopens prosecution in 71.0% of appeals filed. This is in the 58% percentile among all examiners. Of these withdrawals, 50.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows above-average willingness to reconsider rejections during appeals. The mandatory appeal conference (MPEP § 1207.01) provides an opportunity for reconsideration.
When applicants file petitions regarding this examiner's actions, 27.0% are granted (fully or in part). This grant rate is in the 15% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 0.1% of allowed cases (in the 51% percentile). This examiner makes examiner's amendments more often than average to place applications in condition for allowance (MPEP § 1302.04).
Quayle Actions: This examiner issues Ex Parte Quayle actions in 15.1% of allowed cases (in the 92% percentile). Per MPEP § 714.14, a Quayle action indicates that all claims are allowable but formal matters remain. This examiner frequently uses Quayle actions compared to other examiners, which is a positive indicator that once substantive issues are resolved, allowance follows quickly.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.