USPTO Examiner OJHA AJAY - Art Unit 2824

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
17132672NON-DESTRUCTIVE READBACK AND WRITEBACK FOR INTEGRATED CIRCUIT DEVICEDecember 2020May 2024Allow4010NoNo
17130604DISTRIBUTION OF DATA AND MEMORY TIMING PARAMETERS ACROSS MEMORY MODULES BASED ON MEMORY ACCESS PATTERNSDecember 2020October 2022Allow2120NoNo
17121562Well Strap Structures and Methods of Forming the SameDecember 2020April 2021Allow400NoNo
17116759NEUROMORPHIC COMPUTING DEVICES AND METHODSDecember 2020April 2022Allow1610YesNo
17107463APPARATUSES AND METHODS FOR COMPUTE COMPONENTS FORMED OVER AN ARRAY OF MEMORY CELLSNovember 2020September 2021Allow1010YesNo
17104385WORD LINE AND CONTROL GATE LINE TANDEM DECODER FOR ANALOG NEURAL MEMORY IN DEEP LEARNING ARTIFICIAL NEURAL NETWORKNovember 2020November 2021Allow1100NoNo
17101029SEMICONDUCTOR MEMORY DEVICENovember 2020April 2021Allow500NoNo
16951705CLOCK LOCKING FOR PACKET BASED COMMUNICATIONS OF MEMORY DEVICESNovember 2020February 2022Allow1510NoNo
17099347MEMORY SUB-SYSTEM MANAGING REMAPPING FOR MISALIGNED MEMORY COMPONENTSNovember 2020August 2021Allow910NoNo
17055549OPTICALLY INTERFACED STACKED MEMORIES AND RELATED METHODS AND SYSTEMSNovember 2020February 2022Allow1510YesNo
17095221APPARATUS AND METHODS FOR SYNCHRONIZING A PLURALITY OF DOUBLE DATA RATE MEMORY RANKSNovember 2020January 2022Allow1400NoNo
17092896INTEGRATED CIRCUIT DEVICENovember 2020March 2021Allow400NoNo
17087085PUF APPLICATIONS IN MEMORIESNovember 2020March 2022Allow1610NoNo
17081673MEMORY DEVICE AND ACCESS METHODOctober 2020January 2022Allow1510NoNo
17078496NEURAL NETWORK INFERENCE ACCELERATOR BASED ON ONE-TIME-PROGRAMMABLE (OTP) MEMORY ARRAYS WITH ONE-WAY SELECTORSOctober 2020January 2022Allow1510YesNo
16949047Data storage using peptidesOctober 2020December 2021Allow1420NoNo
17062670DEVICE FOR HIGH DIMENSIONAL ENCODINGOctober 2020October 2021Allow1300NoNo
17062700DEVICE FOR HIGH DIMENSIONAL ENCODINGOctober 2020November 2021Allow1400NoNo
17038795CAM DEVICE WITH 3D CAM CELLSSeptember 2020September 2021Allow1210NoNo
17030107SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM) DUAL IN-LINE MEMORY MODULE (DIMM) HAVING INCREASED PER DATA PIN BANDWIDTHSeptember 2020February 2023Allow2910NoNo
17028558CENTRALIZED PLACEMENT OF COMMAND AND ADDRESS IN MEMORY DEVICESSeptember 2020June 2021Allow920NoNo
17026331METHOD FOR MANAGING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND MEMORY DEVICESeptember 2020December 2021Allow1520NoNo
17040036METHOD FOR WRITING DATA IN NUCLEIC ACID BASED MEMORIESSeptember 2020November 2021Allow1410NoNo
17024267MEMORY DEVICE, MEMORY SYSTEM AND AUTONOMOUS DRIVING APPARATUSSeptember 2020November 2021Allow1410NoNo
17017294ELECTRONIC DEVICES FOR EXECUTING A WRITE OPERATIONSeptember 2020December 2021Allow1520NoNo
17015408MEMORY DEVICESeptember 2020June 2021Allow900NoNo
17012268ELECTRONIC DEVICE AND OPERATING METHOD OF ELECTRONIC DEVICESeptember 2020October 2021Allow1310NoNo
17012909CHEMICAL METHODS FOR NUCLEIC ACID-BASED DATA STORAGESeptember 2020May 2021Allow910NoNo
17011039INFERENCE OPERATION METHOD AND CONTROLLING CIRCUIT OF 3D NAND ARTIFICIAL INTELLIGENCE ACCELERATORSeptember 2020February 2022Allow1810YesNo
17011929ELECTRONIC DEVICE FOR CONFIGURING NEURAL NETWORKSeptember 2020January 2022Allow1710NoNo
17010126SEMICONDUCTOR MEMORY DEVICE INCLUDING PAGE BUFFERSSeptember 2020June 2021Allow1000NoNo
17007512NON-VOLATILE STATIC RANDOM ACCESS MEMORYAugust 2020April 2022Abandon2020NoNo
17008225VOLTAGE OFFSET BIN SELECTION BY DIE GROUP FOR MEMORY DEVICESAugust 2020October 2021Allow1410NoNo
17005275APPARATUSES, SYSTEMS, AND METHODS FOR ADDRESS SCRAMBLING IN A VOLATILE MEMORY DEVICEAugust 2020August 2021Allow1210NoNo
17004871MULTI-DIVISION 3D NAND MEMORY DEVICEAugust 2020May 2021Allow910NoNo
16999121NON-VOLATILE SEMICONDUCTOR STORAGE DEVICEAugust 2020September 2021Allow1310NoNo
16996025BURST CLOCK CONTROL BASED ON PARTIAL COMMAND DECODING IN A MEMORY DEVICEAugust 2020September 2021Allow1300NoNo
16996788METHOD AND SYSTEM FOR REFRESH OF MEMORY DEVICESAugust 2020December 2021Allow1620YesNo
16995612SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATINGAugust 2020May 2021Allow900NoNo
16994338APPARATUSES, SYSTEMS, AND METHODS FOR MEMORY DIRECTED ACCESS PAUSEAugust 2020August 2021Allow1220NoNo
16992946ACTIVE INTERPOSER FOR LOCALIZED PROGRAMMABLE INTEGRATED CIRCUIT RECONFIGURATIONAugust 2020July 2023Allow3531YesNo
16991870VALIDATION OF DRAM CONTENT USING INTERNAL DATA SIGNATUREAugust 2020September 2021Allow1310NoNo
16990114DRIFT MITIGATION WITH EMBEDDED REFRESHAugust 2020August 2021Allow1320NoNo
16990242MEMORY CONTROLLER AND METHOD OF OPERATING THE SAMEAugust 2020December 2021Allow1620YesNo
16988355Read Disturb Mitigation based on Signal and Noise Characteristics of Memory Cells Collected for Read CalibrationAugust 2020August 2021Allow1200NoNo
16988360Track Charge Loss based on Signal and Noise Characteristics of Memory Cells Collected in Calibration OperationsAugust 2020August 2021Allow1300NoNo
16986812ANALOG NEURAL MEMORY ARRAY IN ARTIFICIAL NEURAL NETWORK WITH SUBSTANTIALLY CONSTANT ARRAY SOURCE IMPEDANCE WITH ADAPTIVE WEIGHT MAPPING AND DISTRIBUTED POWERAugust 2020January 2022Allow1820NoNo
16986934OPERATION METHOD OF SYSTEM-ON-CHIP CONFIGURED TO CONTROL MEMORY DEVICEAugust 2020August 2021Allow1310NoNo
16987372MEMORY UNIT WITH ADAPTIVE CLAMPING VOLTAGE SCHEME AND CALIBRATION SCHEME FOR MULTI-LEVEL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOFAugust 2020August 2021Allow1310NoNo
16942928THREE-DIMENSIONAL NEUROMORPHIC DEVICE INCLUDING SWITCHING ELEMENT AND RESISTIVE ELEMENTJuly 2020August 2021Allow1310NoNo
16940115READ ONLY MEMORY ARCHITECTURE FOR ANALOG MATRIX OPERATIONSJuly 2020March 2022Allow2030YesNo
16938254EVENT-BASED CLASSIFICATION OF FEATURES IN A RECONFIGURABLE AND TEMPORALLY CODED CONVOLUTIONAL SPIKING NEURAL NETWORKJuly 2020October 2021Allow1500NoNo
16934860Reconfigurable Compute MemoryJuly 2020March 2022Allow2020NoNo
16932266PROGRAMMING NON-VOLATILE MEMORY ARRAYS WITH AUTOMATIC PROGRAMMING PULSE AMPLITUDE ADJUSTMENT USING CURRENT-LIMITING CIRCUITSJuly 2020August 2021Allow1310NoNo
16932239TEMPERATURE EFFECT COMPENSATION IN MEMORY ARRAYSJuly 2020August 2021Allow1310NoNo
16927818NEW BITCELL FOR DATA REDUNDANCYJuly 2020July 2021Allow1210NoNo
16926167MANAGING EXECUTION OF SCRUB OPERATIONS IN A MEMORY SUB-SYSTEMJuly 2020May 2021Allow1000NoNo
16925239METHODS AND SYSTEMS FOR HARDWARE-BASED STATISTICS MANAGEMENT USING A GENERAL PURPOSE MEMORYJuly 2020January 2022Allow1910YesNo
16923334ERROR DETECTION AND CORRECTION USING MACHINE LEARNINGJuly 2020August 2021Allow1300NoNo
16923071MEMORY DEVICE AND OPERATION METHOD THEREOFJuly 2020May 2022Allow2340NoNo
16921729MEMORY WITH PER DIE TEMPERATURE-COMPENSATED REFRESH CONTROLJuly 2020July 2021Allow1210NoNo
16919187METHOD OF CONTROLLING OPERATION OF NONVOLATILE MEMORY DEVICE USING MACHINE LEARNING AND STORAGE SYSTEMJuly 2020September 2021Allow1410NoNo
16919036METHOD AND APPARATUS FOR ACCUMULATING AND STORING RESPECTIVE ACCESS COUNTS OF WORD LINES IN MEMORY MODULEJuly 2020July 2022Allow2430YesNo
16916345NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEMJune 2020August 2021Allow1310NoNo
16912694METHODS AND SYSTEMS OF CELL-ARRAY PROGRAMMING FOR NEURAL COMPUTE USING FLASH ARRAYSJune 2020December 2023Allow4140YesNo
16908576ACCELERATING BINARY NEURAL NETWORKS WITHIN LATCH STRUCTURE OF NON-VOLATILE MEMORY DEVICESJune 2020November 2022Allow2900NoNo
16904255Background Interface Training Using Secondary SensesJune 2020July 2021Allow1310YesNo
16903274INVERTER BASED DELAY CHAIN FOR CALIBRATING DATA SIGNAL TO A CLOCKJune 2020April 2021Allow1000YesNo
16946305READ ONLY MEMORY (ROM)-EMULATED MEMORY (REM) PROFILE MODE OF MEMORY DEVICEJune 2020August 2021Allow1410YesNo
16901077PROGRAMMING PROCESS WHICH COMPENSATES FOR DATA STATE OF ADJACENT MEMORY CELL IN A MEMORY DEVICEJune 2020April 2021Allow1010YesNo
16896669DATA ERASING METHOD OF NON-VOLATILE MEMORY AND STORAGE DEVICE USING THE SAMEJune 2020February 2022Allow2020NoNo
16894527MEMORY MANAGEMENT DEVICE, SYSTEM AND METHODJune 2020October 2021Allow1720NoNo
16769152PROGRAMMABLE DEVICE STRUCTURE BASED ON MIXED FUNCTION STORAGE UNITJune 2020January 2022Allow2010NoNo
16874916DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICE, MEMORY CONTROLLER THEREFOR, AND MEMORY SYSTEMMay 2020April 2021Allow1110NoNo
16872404SPIKING NEURAL NETWORKS CIRCUIT AND OPERATION METHOD THEREOFMay 2020October 2022Allow2910YesNo
16869856SRAM POWER-UP RANDOM NUMBER GENERATORMay 2020March 2021Allow1000NoNo
16865675NONVOLATILE MEMORY DEVICE CONFIGURED TO ADJUST A READ PARAMETER BASED ON DEGRADATION LEVELMay 2020September 2020Allow510NoNo
16864607DATA READING CIRCUIT AND STORAGE UNITMay 2020November 2021Allow1920YesNo
16863959STORAGE DEVICE AND METHODS WITH FAULT TOLERENCE CAPABILITY FOR NEURAL NETWORKSApril 2020December 2020Allow710YesNo
16859833BALANCED NETWORK AND METHODApril 2020February 2021Allow1010NoNo
16856055One Time Programmable (OTP) Bits for Physically Unclonable FunctionsApril 2020June 2021Allow1410NoNo
16854254MULTIPLY AND ACCUMULATE USING CURRENT DIVISION AND SWITCHINGApril 2020June 2022Allow2500NoNo
16847570Sense AmplifiersApril 2020February 2021Allow1000NoNo
16755311ASYNCHRONOUS FIFO CIRCUITApril 2020August 2021Allow1610NoNo
16844997Deep Learning Accelerator and Random Access Memory with a Camera InterfaceApril 2020February 2022Allow2200NoNo
16839438SAFETY EVENT DETECTION FOR A MEMORY DEVICEApril 2020January 2022Allow2110NoNo
16837368DATA TRANSMISSION CODE AND INTERFACEApril 2020July 2021Allow1510NoNo
16834948DATA TRANSFERS IN NEURAL PROCESSINGMarch 2020October 2023Allow4220NoNo
16834090MEMORY DEVICE RECEIVING DATA CLOCK SIGNALS AND OPERATION METHOD THEREOFMarch 2020February 2021Allow1000NoNo
16832289OXIDE SEMICONDUCTOR BASED MEMORY DEVICEMarch 2020April 2021Allow1210NoNo
16830519MEMORY SYSTEM AND METHOD CAPABLE OF PERFORMING WEAR LEVELINGMarch 2020July 2021Allow1510YesNo
16819374MEMORY SYSTEM PROCESSING REQUEST BASED ON INFERENCE AND OPERATING METHOD OF THE SAMEMarch 2020May 2021Allow1410YesNo
16817039RESISTANCE CHANGE MEMORY DEVICE AND ASSOCIATED METHODSMarch 2020May 2021Allow1410NoNo
16815223Self-Clocking Modulator As Analog NeuronMarch 2020June 2022Allow2710NoNo
16815999METHODS FOR PROVIDING DEVICE STATUS IN RESPONSE TO READ COMMANDS DIRECTED TO WRITE-ONLY MODE REGISTER BITS AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAMEMarch 2020July 2021Allow1610NoNo
16815571SYNAPSE STRING AND SYNAPSE STRING ARRAY FOR NEURAL NETWORKSMarch 2020January 2021Allow1000NoNo
16813851METHOD OF PERFORMING INTERNAL PROCESSING OPERATIONS WITH PRE-DEFINED PROTOCOL INTERFACE OF MEMORY DEVICEMarch 2020June 2021Allow1520NoNo
16814479ARITHMETIC DEVICEMarch 2020November 2022Allow3211NoNo
16813901ELECTRONIC DEVICE FOR ENCODING EVENT INDICATED BY SPATIAL-TEMPORAL INPUT SIGNALS AND OPERATING METHOD THEREOFMarch 2020August 2022Allow2910NoNo
16812854APPARATUSES AND METHODS FOR MULTI-BANK REFRESH TIMINGMarch 2020December 2020Allow900NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner OJHA, AJAY.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
5
Examiner Affirmed
4
(80.0%)
Examiner Reversed
1
(20.0%)
Reversal Percentile
33.3%
Lower than average

What This Means

With a 20.0% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
9
Allowed After Appeal Filing
4
(44.4%)
Not Allowed After Appeal Filing
5
(55.6%)
Filing Benefit Percentile
73.0%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 44.4% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is above the USPTO average, suggesting that filing an appeal can be an effective strategy for prompting reconsideration.

Strategic Recommendations

Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner OJHA, AJAY - Prosecution Strategy Guide

Executive Summary

Examiner OJHA, AJAY works in Art Unit 2824 and has examined 749 patent applications in our dataset. With an allowance rate of 91.1%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 15 months.

Allowance Patterns

Examiner OJHA, AJAY's allowance rate of 91.1% places them in the 76% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by OJHA, AJAY receive 1.18 office actions before reaching final disposition. This places the examiner in the 12% percentile for office actions issued. This examiner issues significantly fewer office actions than most examiners.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by OJHA, AJAY is 15 months. This places the examiner in the 99% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +4.4% benefit to allowance rate for applications examined by OJHA, AJAY. This interview benefit is in the 29% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 36.0% of applications are subsequently allowed. This success rate is in the 82% percentile among all examiners. Strategic Insight: RCEs are highly effective with this examiner compared to others. If you receive a final rejection, filing an RCE with substantive amendments or arguments has a strong likelihood of success.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 67.5% of cases where such amendments are filed. This entry rate is in the 91% percentile among all examiners. Strategic Recommendation: This examiner is highly receptive to after-final amendments compared to other examiners. Per MPEP § 714.12, after-final amendments may be entered "under justifiable circumstances." Consider filing after-final amendments with a clear showing of allowability rather than immediately filing an RCE, as this examiner frequently enters such amendments.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 50.0% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 45% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 19% percentile among all examiners. Of these withdrawals, 20.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.

Petition Practice

When applicants file petitions regarding this examiner's actions, 30.3% are granted (fully or in part). This grant rate is in the 16% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 25% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 32% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Consider after-final amendments: This examiner frequently enters after-final amendments. If you can clearly overcome rejections with claim amendments, file an after-final amendment before resorting to an RCE.
  • RCEs are effective: This examiner has a high allowance rate after RCE compared to others. If you receive a final rejection and have substantive amendments or arguments, an RCE is likely to be successful.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.