Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 17257532 | Memory and Its Addressing Method Including Redundant Decoding And Normal Decoding | December 2020 | April 2022 | Allow | 15 | 1 | 0 | No | No |
| 17254592 | MAGNETIC MEMORY DEVICE WITH WRITE CURRENT FLOWING SIMULTANEOUSLY THROUGH NON-ADJACENT LINES IN MEMORY CELL ARRAY | December 2020 | May 2022 | Allow | 17 | 1 | 0 | Yes | No |
| 17123518 | NON-VOLATILE MEMORY DEVICE INCLUDING A ROW DECODER WITH A PULL-UP STAGE CONTROLLED BY A CURRENT MIRROR | December 2020 | December 2021 | Allow | 12 | 0 | 0 | No | No |
| 17120405 | MEMORY DEVICE INCLUDING VARIABLE REFERENCE RESISTOR AND METHOD OF CALIBRATING THE VARIABLE REFERENCE RESISTOR | December 2020 | June 2022 | Allow | 18 | 1 | 0 | No | No |
| 17113595 | MIDPOINT SENSING REFERENCE GENERATION FOR STT-MRAM | December 2020 | January 2023 | Allow | 25 | 3 | 0 | Yes | No |
| 17108737 | ENERGY RECOVERY IN FILAMENTARY RESISTIVE MEMORIES | December 2020 | May 2023 | Allow | 30 | 4 | 0 | No | No |
| 17102266 | APPARATUSES AND METHODS FOR TRACKING WORD LINE ACCESSES | November 2020 | June 2022 | Allow | 19 | 2 | 0 | No | No |
| 17099030 | CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY | November 2020 | June 2022 | Allow | 19 | 1 | 0 | Yes | No |
| 17086908 | INTEGRATED ASSEMBLIES COMPRISING VERTICALLY-STACKED DECKS | November 2020 | March 2022 | Allow | 17 | 2 | 0 | No | No |
| 17083951 | SYSTEMS AND METHODS FOR MAINTAINING REFRESH OPERATIONS OF MEMORY BANKS USING A SHARED ADDRESS PATH | October 2020 | July 2023 | Allow | 32 | 2 | 0 | Yes | No |
| 17082557 | MAGNETIC MEMORY DEVICES INCLUDING MAGNETIC STRUCTURE WITH MAGNETIC DOMAINS | October 2020 | December 2021 | Allow | 14 | 1 | 0 | No | No |
| 17081116 | POWER SUPPLY GENERATOR ASSIST | October 2020 | January 2022 | Allow | 15 | 1 | 0 | No | No |
| 17082000 | MEMORY UNIT WITH MULTI-BIT INPUT LOCAL COMPUTING CELL FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS, MEMORY ARRAY STRUCTURE WITH MULTI-BIT INPUT LOCAL COMPUTING CELL FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOF | October 2020 | September 2022 | Allow | 23 | 1 | 0 | No | No |
| 17050457 | STORAGE STRUCTURE AND ERASE METHOD THEREOF INCLUDING ERASING MEMORY BLOCKS IN PIPELINE MANNER | October 2020 | December 2022 | Abandon | 25 | 2 | 0 | No | No |
| 17064880 | NONVOLATILE MEMORY SENSING CIRCUIT INCLUDING VARIABLE CURRENT SOURCE | October 2020 | December 2021 | Allow | 14 | 1 | 0 | No | No |
| 17061636 | SIGNAL AMPLIFICATION IN MRAM DURING READING, INCLUDING A PAIR OF COMPLEMENTARY TRANSISTORS CONNECTED TO AN ARRAY LINE | October 2020 | February 2022 | Allow | 17 | 0 | 0 | Yes | No |
| 17034405 | PHYSICALLY UNCLONABLE FUNCTION ARCHITECTURE INCLUDING MEMORY CELLS WITH PARALLEL-CONNECTED ACCESS TRANSISTORS AND COMMON WRITE WORDLINES | September 2020 | July 2021 | Allow | 9 | 0 | 0 | No | No |
| 17035118 | MEMORY DEVICE INCLUDING A WORD LINE WITH PORTIONS WITH DIFFERENT SIZES IN DIFFERENT METAL LAYERS | September 2020 | March 2022 | Allow | 18 | 2 | 0 | No | No |
| 17033684 | EXECUTION METHOD OF FIRMWARE CODE, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT | September 2020 | December 2022 | Abandon | 27 | 4 | 0 | Yes | No |
| 17032537 | NON-VOLATILE MEMORY WITH VIRTUAL GROUND VOLTAGE PROVIDED TO UNSELECTED COLUMN LINES DURING MEMORY WRITE OPERATION | September 2020 | November 2021 | Allow | 14 | 1 | 0 | No | No |
| 17032516 | NON-VOLATLE MEMORY WITH VIRTUAL GROUND VOLTAGE PROVIDED TO UNSELECTED COLUMN LINES DURING MEMORY READ OPERATION | September 2020 | March 2022 | Allow | 17 | 1 | 1 | No | No |
| 17031542 | MAGNETIC MEMORY READ CIRCUIT AND CALIBRATION METHOD THEREFOR | September 2020 | August 2021 | Allow | 11 | 0 | 0 | No | No |
| 17028522 | TEST MODES FOR A SEMICONDUCTOR MEMORY DEVICE WITH STACKED MEMORY CHIPS USING A CHIP IDENTIFICATION | September 2020 | June 2021 | Allow | 8 | 1 | 0 | Yes | No |
| 17027007 | MEMORY TEST APPARATUS AND TESTING METHOD THEREOF INCLUDING BUILT-IN SELF TEST (BIST) | September 2020 | January 2022 | Allow | 15 | 1 | 0 | No | No |
| 17021620 | MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE INCLUDING PROGRAM VERIFY OPERATION WITH PROGRAM VOLTAGE ADJUSTMENT | September 2020 | November 2022 | Allow | 26 | 3 | 0 | Yes | No |
| 17018786 | RAMP-BASED BIASING IN A MEMORY DEVICE | September 2020 | August 2021 | Allow | 11 | 0 | 0 | Yes | No |
| 17014480 | RESISTIVE MEMORY DEVICE WITH BOUNDARY AND EDGE TRANSISTORS COUPLED TO EDGE BIT LINES | September 2020 | February 2022 | Allow | 18 | 2 | 1 | No | No |
| 17010455 | MAGNETIC MEMORY WITH CIRCUIT TO SUPPLY SHIFT PULSE TO MOVE A DOMAIN WALL IN A MAGNETIC BODY | September 2020 | September 2021 | Allow | 12 | 1 | 0 | No | No |
| 17009329 | DEVICES ADJUSTING A LEVEL OF AN ACTIVE VOLTAGE SUPPLIED IN A REFRESH OPERATION | September 2020 | February 2022 | Allow | 17 | 2 | 0 | No | No |
| 17004446 | VERIFICATION OF AN EXCESSIVELY HIGH THRESHOLD VOLTAGE IN A MEMORY DEVICE | August 2020 | February 2022 | Allow | 18 | 2 | 0 | No | No |
| 17003541 | SEMICONDUCTOR MEMORY DEVICE WITH A SWITCHING MEMORY CELL IN A MEMORY STRING AND OPERATING METHOD THEREOF | August 2020 | January 2022 | Allow | 17 | 2 | 0 | No | No |
| 16997652 | METHOD FOR DRIVING AN ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR MEMORY IN A TEST MODE | August 2020 | July 2021 | Allow | 11 | 2 | 0 | No | No |
| 16770411 | STORAGE CIRCUIT PROVIDED WITH VARIABLE RESISTANCE ELEMENTS, REFERENCE VOLTAGE CIRCUIT AND SENSE AMPLIFIER | August 2020 | July 2022 | Allow | 25 | 2 | 0 | Yes | No |
| 16983486 | TECHNIQUES FOR PROGRAMMING MULTI-LEVEL SELF-SELECTING MEMORY CELL | August 2020 | January 2022 | Allow | 18 | 1 | 1 | Yes | No |
| 16943874 | SEMICONDUCTOR DEVICE WITH A POWER-DOWN MODE AND A POWER GATING CIRCUIT AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME | July 2020 | June 2021 | Allow | 10 | 0 | 0 | No | No |
| 16939919 | APPARATUSES AND METHODS FOR COMPARING DATA PATTERNS IN MEMORY | July 2020 | March 2022 | Allow | 20 | 2 | 1 | Yes | No |
| 16935598 | THREE-DIMENSIONAL NAND FLASH MEMORY DEVICE HAVING IMPROVED DATA RELIABILITY BY VARYING PROGRAM INTERVALS, AND METHOD OF OPERATING THE SAME | July 2020 | September 2021 | Allow | 14 | 1 | 1 | Yes | No |
| 16922786 | MEMRISTIVE DEVICE AND METHOD BASED ON ION MIGRATION OVER ONE OR MORE NANOWIRES | July 2020 | April 2021 | Allow | 9 | 1 | 0 | Yes | No |
| 16912717 | METHODS TO TOLERATE PROGRAMMING AND RETENTION ERRORS OF CROSSBAR MEMORY ARRAYS | June 2020 | October 2022 | Allow | 28 | 0 | 0 | Yes | No |
| 16911313 | SRAM LOW-POWER WRITE DRIVER | June 2020 | November 2022 | Abandon | 29 | 1 | 0 | No | No |
| 16905694 | TIME DIVISION MULTIPLEXING (TDM) BASED OPTICAL TERNARY CONTENT ADDRESSABLE MEMORY (TCAM) | June 2020 | July 2021 | Allow | 13 | 0 | 1 | No | No |
| 16900015 | MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY TEST IN FIRST PROGRAM PASS | June 2020 | April 2021 | Allow | 10 | 0 | 0 | No | No |
| 16900470 | Locally Timed Sensing of Memory Device | June 2020 | December 2022 | Allow | 30 | 1 | 0 | Yes | No |
| 16878481 | DYNAMIC RANDOM ACCESS MEMORY ARRAY, SEMICONDUCTOR LAYOUT STRUCTURE AND FABRICATION METHOD THEREOF | May 2020 | September 2020 | Allow | 4 | 0 | 0 | No | No |
| 16877752 | MEMORY SYSTEM STORAGE DEVICE INCLUDING PATH CIRCUIT IN PARALLEL WITH AUXILIARY POWER DEVICE | May 2020 | November 2021 | Allow | 18 | 1 | 1 | No | No |
| 16870506 | NON-VOLATILE RESISTIVE MEMORY DEVICE INCLUDING A PLURALITY OF WRITE MODES | May 2020 | January 2023 | Allow | 32 | 1 | 1 | Yes | No |
| 16861435 | APPARATUS FOR DISCHARGING CONTROL GATES AFTER PERFORMING AN ACCESS OPERATION ON A MEMORY CELL | April 2020 | March 2021 | Allow | 11 | 1 | 0 | No | No |
| 16861090 | APPARATUSES AND METHODS FOR POST-PACKAGE REPAIR PROTECTION | April 2020 | January 2022 | Allow | 20 | 2 | 0 | No | No |
| 16857053 | LOW RESISTANCE MONOSILICIDE ELECTRODE FOR PHASE CHANGE MEMORY AND METHODS OF MAKING THE SAME | April 2020 | June 2021 | Allow | 14 | 0 | 1 | No | No |
| 16852239 | SYSTEM AND METHOD FOR COUNTING FAIL BIT AND READING OUT THE SAME | April 2020 | April 2022 | Allow | 24 | 4 | 1 | Yes | No |
| 16847629 | MEMORY AND CALIBRATION AND OPERATION METHODS THEREOF FOR READING DATA IN MEMORY CELLS | April 2020 | August 2021 | Allow | 16 | 1 | 1 | Yes | No |
| 16831116 | MEMORY ARRAY WITH MULTIPLEXED SELECT LINES AND TWO TRANSISTOR MEMORY CELLS | March 2020 | November 2021 | Allow | 19 | 2 | 0 | No | No |
| 16827109 | MEMORY DEVICE AND BIT LINE PRECHARGING METHOD DURING PROGRAM VERIFY OPERATION IN THE MEMORY DEVICE | March 2020 | November 2022 | Allow | 32 | 4 | 0 | Yes | No |
| 16826558 | NONVOLATILE MEMORY DEVICE WITH A MONITORING CELL IN A CELL STRING | March 2020 | August 2021 | Allow | 16 | 1 | 1 | Yes | No |
| 16824618 | ACCELERATED IN-MEMORY CACHE WITH MEMORY ARRAY SECTIONS HAVING DIFFERENT CONFIGURATIONS | March 2020 | May 2021 | Allow | 14 | 1 | 1 | Yes | No |
| 16647155 | MEMORY CIRCUIT DEVICE INCLUDING A SELECTION CIRCUIT UNIT SHARED BY A WRITE CIRCUIT UNIT AND A READ CIRCUT UNIT | March 2020 | July 2021 | Allow | 16 | 1 | 0 | Yes | No |
| 16808955 | NON VOLATILE FLASH MEMORY WITH IMPROVED VERIFICATION RECOVERY AND COLUMN SEEDING | March 2020 | December 2022 | Allow | 33 | 5 | 1 | Yes | No |
| 16808227 | BIPOLAR ALL-MEMRISTOR CIRCUIT FOR IN-MEMORY COMPUTING | March 2020 | March 2023 | Allow | 36 | 2 | 1 | No | No |
| 16805839 | METHOD FOR ENHANCING TUNNEL MAGNETORESISTANCE IN MEMORY DEVICE | March 2020 | January 2021 | Allow | 10 | 0 | 0 | No | No |
| 16805574 | Data Storage With Improved Read Performance By Avoiding Line Discharge | February 2020 | May 2022 | Abandon | 27 | 3 | 0 | No | No |
| 16639235 | THYRISTORS | February 2020 | May 2021 | Abandon | 15 | 1 | 0 | No | No |
| 16786725 | REFRESH RATE CONTROL FOR A MEMORY DEVICE | February 2020 | April 2021 | Allow | 14 | 1 | 0 | No | No |
| 16776383 | VARIABLE RESISTANCE MEMORY WITH LATTICE ARRAY USING ENCLOSING TRANSISTORS | January 2020 | February 2021 | Allow | 13 | 0 | 1 | No | No |
| 16745823 | RESISTIVE MEMORY DEVICES AND METHODS OF OPERATING RESISTIVE MEMORY DEVICES INCLUDING ADJUSTMENT OF CURRENT PATH RESISTANCE OF A SELECTED MEMORY CELL IN A RESISTIVE MEMORY DEVICE | January 2020 | February 2021 | Allow | 13 | 1 | 0 | No | No |
| 16738945 | NONVOLATILE MEMORY APPARATUS FOR MITIGATING READ DISTURBANCE AND SYSTEM USING THE SAME | January 2020 | July 2021 | Allow | 18 | 1 | 1 | No | No |
| 16625479 | JTAG BASED ARCHITECTURE ALLOWING MULTI-CORE OPERATION | December 2019 | February 2024 | Abandon | 50 | 6 | 0 | Yes | No |
| 16717460 | MEMORY SUB-SYSTEM TEMPERATURE REGULATION | December 2019 | February 2021 | Allow | 14 | 1 | 0 | Yes | No |
| 16691173 | CROSS POINT RESISTIVE MEMORY DEVICE WITH COMPENSATION FOR LEAKAGE CURRENT IN READ OPERATION | November 2019 | March 2021 | Allow | 16 | 1 | 0 | No | No |
| 16615243 | WIRING LINE LAYOUT IN A SEMICONDUCTOR MEMORY DEVICE | November 2019 | March 2021 | Allow | 16 | 2 | 0 | No | No |
| 16687000 | MEMORY SYSTEM, MEMORY CONTROLLER AND MEMORY DEVICE FOR CONFIGURING SUPER BLOCKS | November 2019 | April 2021 | Allow | 17 | 1 | 0 | Yes | No |
| 16687297 | MEMORY DEVICE STRUCTURE INCLUDING TILTED SIDEWALL AND METHOD FOR FABRICATING THE SAME | November 2019 | October 2021 | Allow | 23 | 3 | 0 | No | No |
| 16684989 | Efuse Programming Unit, Efuse Circuit and Programming Process Thereof | November 2019 | June 2021 | Abandon | 19 | 2 | 0 | No | No |
| 16683173 | OPERATION METHODS OF FERROELECTRIC MEMORY | November 2019 | June 2021 | Allow | 19 | 2 | 1 | Yes | No |
| 16662900 | MEMORY DEVICE INCLUDING GROUPED PAGE BUFFERS AND READ OPERATION METHOD THEREOF | October 2019 | June 2021 | Allow | 20 | 2 | 0 | No | No |
| 16655575 | METHODS TO TOLERATE PROGRAMMING AND RETENTION ERRORS OF CROSSBAR MEMORY ARRAYS | October 2019 | September 2022 | Allow | 35 | 0 | 0 | Yes | No |
| 16596368 | MEMORY AND OPERATION METHOD THEREOF INCLUDING ACCESSING REDUNDANCY WORLD LINES BY MEMORY CONTROLLER | October 2019 | May 2024 | Allow | 55 | 5 | 0 | Yes | No |
| 16603710 | SEMICONDUCTOR NEURAL NETWORK DEVICE INCLUDING A SYNAPSE CIRCUIT COMPRISING MEMORY CELLS AND AN ACTIVATION FUNCTION CIRCUIT | October 2019 | September 2022 | Allow | 35 | 1 | 0 | No | No |
| 16578770 | SEMICONDUCTOR MEMORY DEVICE INCLUDING PROGRAM OPERATION STATUS FLAG CELLS | September 2019 | February 2021 | Allow | 17 | 1 | 0 | No | No |
| 16567906 | SEMICONDUCTOR MEMORY APPARATUS WITH A WRITE VOLTAGE LEVEL DETECTION | September 2019 | May 2021 | Allow | 20 | 2 | 0 | Yes | No |
| 16551530 | GROUPING BITS OF A CODE WORD FOR MEMORY DEVICE OPERATIONS | August 2019 | February 2021 | Allow | 17 | 2 | 0 | No | No |
| 16521235 | NONVOLATILE MEMORY APPARATUS AND VERIFICATION WRITE METHOD THEREOF FOR REDUCING PROGRAM TIME | July 2019 | March 2021 | Abandon | 20 | 1 | 0 | No | No |
| 16517212 | ENCODER FOR MEMORY SYSTEM AND METHOD THEREOF | July 2019 | December 2020 | Allow | 17 | 1 | 0 | Yes | No |
| 16516900 | DATA STORAGE MANAGEMENT IN A DEVICE INCLUDING REMOVABLE AND EMBEDDED STORAGE AREAS | July 2019 | October 2020 | Allow | 15 | 1 | 0 | No | No |
| 16516094 | POWERGATE BIASING TECHNIQUES FOR MEMORY APPLICATIONS | July 2019 | August 2023 | Allow | 49 | 9 | 0 | Yes | No |
| 16503169 | Nonvolatile Memory Device And Method Of Operation With A Word Line Setup Time Based On Two Sequential Read Voltages | July 2019 | March 2020 | Allow | 8 | 1 | 0 | Yes | No |
| 16502978 | NEURAL NETWORK MEMORY WITH AN ARRAY OF VARIABLE RESISTANCE MEMORY CELLS | July 2019 | November 2022 | Allow | 40 | 1 | 0 | No | No |
| 16418016 | METHODS FOR MITIGATING POWER LOSS EVENTS DURING OPERATION OF MEMORY DEVICES AND MEMORY DEVICES EMPLOYING THE SAME | May 2019 | May 2022 | Allow | 36 | 4 | 0 | Yes | No |
| 16412661 | METHODS FOR PROGRAMMING MEMORY INCLUDING AN OVERDRIVE VOLTAGE FOR GATING AN ACCESS LINE VOLTAGE | May 2019 | February 2021 | Allow | 21 | 2 | 0 | No | No |
| 16412627 | VOLTAGE GENERATION SYSTEMS FOR PROGRAMMING MEMORY | May 2019 | October 2020 | Allow | 17 | 1 | 0 | Yes | No |
| 16410231 | FDSOI SENSE AMPLIFIER CONFIGURATION IN A MEMORY DEVICE | May 2019 | March 2021 | Allow | 22 | 1 | 1 | No | No |
| 16408873 | MEMORY ACCESS INTERFACE DEVICE INCLUDING PHASE AND DUTY CYCLE ADJUSTING CIRCUITS FOR MEMORY ACCESS SIGNALS | May 2019 | June 2020 | Allow | 13 | 0 | 0 | No | No |
| 16401429 | SINGLE-GATE MULTIPLE-TIME PROGRAMMING NON-VOLATILE MEMORY AND OPERATION METHOD THEREOF | May 2019 | November 2020 | Abandon | 19 | 1 | 0 | No | No |
| 16400280 | LOCATION DEPENDENT IMPEDANCE MITIGATION IN NON-VOLATILE MEMORY | May 2019 | November 2020 | Allow | 18 | 1 | 0 | Yes | No |
| 16400048 | MAGNETORESISTIVE MEMORY DEVICE WITH DIFFERENT WRITE PULSE PATTERNS | May 2019 | October 2020 | Allow | 17 | 3 | 0 | No | No |
| 16393050 | SKEWED SENSE AMPLIFIER FOR SINGLE-ENDED SENSING | April 2019 | November 2020 | Allow | 19 | 1 | 1 | Yes | No |
| 16299413 | ACCESS ASSIST WITH WORDLINE ADJUSTMENT WITH TRACKING CELL | March 2019 | June 2020 | Allow | 15 | 1 | 0 | No | No |
| 16299684 | MEMORY DEVICE HAVING IMPROVED DATA RELIABILITY BY VARYING PROGRAM INTERVALS, AND METHOD OF OPERATING THE SAME | March 2019 | March 2021 | Allow | 24 | 2 | 1 | Yes | No |
| 16298507 | SEMICONDUCTOR MEMORY DEVICE | March 2019 | October 2020 | Abandon | 19 | 1 | 0 | No | No |
| 16292338 | ADJUSTING READ VOLTAGE LEVEL IN REWRITABLE NONVOLATILE MEMORY MODULE | March 2019 | January 2021 | Allow | 22 | 2 | 0 | Yes | No |
| 16261379 | CLOCKED COMMANDS TIMING ADJUSTMENTS METHOD IN SYNCHRONOUS SEMICONDUCTOR INTEGRATED CIRCUITS | January 2019 | August 2020 | Allow | 18 | 2 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner HUR, JUNG H.
With a 22.2% reversal rate, the PTAB affirms the examiner's rejections in the vast majority of cases. This reversal rate is below the USPTO average, indicating that appeals face more challenges here than typical.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 22.2% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is below the USPTO average, suggesting that filing an appeal has limited effectiveness in prompting favorable reconsideration.
⚠ Appeals to PTAB face challenges. Ensure your case has strong merit before committing to full Board review.
⚠ Filing a Notice of Appeal shows limited benefit. Consider other strategies like interviews or amendments before appealing.
Examiner HUR, JUNG H works in Art Unit 2824 and has examined 989 patent applications in our dataset. With an allowance rate of 85.8%, this examiner has an above-average tendency to allow applications. Applications typically reach final disposition in approximately 24 months.
Examiner HUR, JUNG H's allowance rate of 85.8% places them in the 64% percentile among all USPTO examiners. This examiner has an above-average tendency to allow applications.
On average, applications examined by HUR, JUNG H receive 1.58 office actions before reaching final disposition. This places the examiner in the 27% percentile for office actions issued. This examiner issues fewer office actions than average, which may indicate efficient prosecution or a more lenient examination style.
The median time to disposition (half-life) for applications examined by HUR, JUNG H is 24 months. This places the examiner in the 82% percentile for prosecution speed. Applications move through prosecution relatively quickly with this examiner.
Conducting an examiner interview provides a +4.7% benefit to allowance rate for applications examined by HUR, JUNG H. This interview benefit is in the 30% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.
When applicants file an RCE with this examiner, 32.2% of applications are subsequently allowed. This success rate is in the 69% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.
This examiner enters after-final amendments leading to allowance in 49.5% of cases where such amendments are filed. This entry rate is in the 75% percentile among all examiners. Strategic Recommendation: This examiner shows above-average receptiveness to after-final amendments. If your amendments clearly overcome the rejections and do not raise new issues, consider filing after-final amendments before resorting to an RCE.
When applicants request a pre-appeal conference (PAC) with this examiner, 15.4% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 26% percentile among all examiners. Note: Pre-appeal conferences show below-average success with this examiner. Consider whether your arguments are strong enough to warrant a PAC request.
This examiner withdraws rejections or reopens prosecution in 59.1% of appeals filed. This is in the 34% percentile among all examiners. Of these withdrawals, 61.5% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner shows below-average willingness to reconsider rejections during appeals. Be prepared to fully prosecute appeals if filed.
When applicants file petitions regarding this examiner's actions, 58.6% are granted (fully or in part). This grant rate is in the 60% percentile among all examiners. Strategic Note: Petitions show above-average success regarding this examiner's actions. Petitionable matters include restriction requirements (MPEP § 1002.02(c)(2)) and various procedural issues.
Examiner's Amendments: This examiner makes examiner's amendments in 13.1% of allowed cases (in the 96% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.2% of allowed cases (in the 55% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.