Detailed information about the 100 most recent patent applications.
| Application Number | Title | Filing Date | Disposal Date | Disposition | Time (months) | Office Actions | Restrictions | Interview | Appeal |
|---|---|---|---|---|---|---|---|---|---|
| 18437130 | METHODS FOR GENERATING A CIRCUIT WITH HIGH DENSITY ROUTING LAYOUT | February 2024 | July 2025 | Allow | 17 | 2 | 0 | Yes | No |
| 18359950 | VARIABLE GRADUATED CAPACITOR STRUCTURE AND METHODS FOR FORMING THE SAME | July 2023 | July 2025 | Allow | 24 | 2 | 1 | Yes | No |
| 18359289 | BOTTOM ELECTRODE VIA AND CONDUCTIVE BARRIER DESIGN TO ELIMINATE ELECTRICAL SHORT IN MEMORY DEVICES | July 2023 | February 2025 | Allow | 19 | 2 | 0 | No | No |
| 18358206 | OPTICAL BLOCKING STRUCTURES FOR BLACK LEVEL CORRECTION PIXELS IN AN IMAGE SENSOR | July 2023 | September 2024 | Allow | 14 | 1 | 0 | Yes | No |
| 18084186 | TRANSFER METHOD OF ALIGNING, PLACING, AND BONDING MICRO SEMICONDUCTOR CHIPS ON SUBSTRATE | December 2022 | February 2026 | Allow | 38 | 1 | 0 | No | No |
| 17992502 | BLOCKING LINE OVERLAPPING CONDUCTIVE LINE CONTACT AREA AND DISPLAY DEVICE HAVING THE SAME | November 2022 | March 2026 | Allow | 39 | 1 | 1 | Yes | No |
| 17960162 | SEMICONDUCTOR DEVICE HAVING FIRST AND SECOND LAYERS AND COVERING LAYER | October 2022 | September 2025 | Abandon | 35 | 2 | 1 | No | No |
| 17823970 | SEMICONDUCTOR DEVICE INCLUDING WORK FUNCTION LAYER DOPED WITH BARRIER ELEMENTS AND METHOD FOR FORMING THE SAME | September 2022 | November 2025 | Allow | 39 | 2 | 0 | No | No |
| 17878800 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | August 2022 | March 2026 | Abandon | 43 | 1 | 1 | No | No |
| 17838707 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | June 2022 | November 2025 | Abandon | 41 | 1 | 1 | No | No |
| 17837925 | INTEGRATED STANDARD CELL STRUCTURE | June 2022 | January 2026 | Allow | 43 | 2 | 1 | Yes | No |
| 17582924 | SCHOTTKY BARRIER DIODE WITH HIGH WITHSTAND VOLTAGE | January 2022 | October 2025 | Allow | 45 | 3 | 0 | Yes | No |
| 17562441 | METHODS OF FORMING CONFORMAL TRANSITION METAL DICHALCOGENIDE FILMS FOR MEMORY AND LOGIC APPLICATIONS | December 2021 | March 2026 | Allow | 50 | 4 | 0 | Yes | Yes |
| 17540560 | RECESSED INNER GATE SPACERS AND PARTIAL REPLACEMENT CHANNEL IN NON-PLANAR TRANSISTORS | December 2021 | March 2026 | Abandon | 51 | 2 | 0 | Yes | No |
| 17482940 | STACKED PLANAR FIELD EFFECT TRANSISTORS WITH 2D MATERIAL CHANNELS | September 2021 | January 2025 | Allow | 40 | 3 | 0 | Yes | No |
| 17475057 | Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells Comprising Forming Undoped Semiconductive Material Into A Void-Space | September 2021 | March 2026 | Allow | 54 | 4 | 1 | No | No |
| 17474688 | DISPLAY DEVICE HAVING TRUNCATED CONE SHAPED LIGHT EMITTING ELEMENT | September 2021 | December 2025 | Allow | 51 | 4 | 0 | No | No |
| 17465514 | Semiconductor Devices With Enhanced Carrier Mobility | September 2021 | September 2025 | Allow | 48 | 4 | 1 | Yes | No |
| 17411389 | SEMICONDUCTOR DEVICE HAVING SINGLE AND POLYCRYSTALLINE SUBSTRATE WITH INTERFACE LAYER THEREBETWEEN | August 2021 | April 2025 | Abandon | 44 | 3 | 0 | No | No |
| 17398494 | SEMICONDUCTOR DEVICES INCLUDING SEMICONDUCTOR PATTERNS VERTICALLY SPACED APART FROM EACH OTHER AND COMRISING SiGe ALLOY AND METHODS OF FABRICATING THE SAME | August 2021 | January 2026 | Abandon | 54 | 4 | 1 | Yes | No |
| 17426658 | NITRIDE-BASED SEMICONDUCTOR DEVICE WITH GATE PROTECTION LAYER AND METHOD FOR MANUFACTURING THE SAME | July 2021 | January 2026 | Allow | 54 | 2 | 1 | No | No |
| 17377849 | METHOD FOR CHARACTERIZING MAGNETIC DEVICE | July 2021 | April 2025 | Allow | 45 | 3 | 0 | No | No |
| 17351789 | THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THEREOF USING DOUBLE PITCH WORD LINE FORMATION | June 2021 | June 2024 | Allow | 36 | 1 | 1 | No | No |
| 17348266 | IMAGE PICKUP APPARATUS HAVING A FRAME AND FIRST AND SECOND RESINS BETWEEN THE FRAME AND AN IMAGE PICKUP CHIP | June 2021 | February 2025 | Abandon | 44 | 2 | 1 | Yes | No |
| 17326334 | DOUBLE-PATTERNING METHOD TO IMPROVE SIDEWALL UNIFORMITY | May 2021 | August 2024 | Allow | 39 | 4 | 0 | No | No |
| 17322405 | Method of Forming a Nano-Fet Semiconductor Device | May 2021 | March 2024 | Allow | 34 | 1 | 1 | Yes | No |
| 17318285 | VARIABLE GRADUATED CAPACITOR STRUCTURE AND METHODS FOR FORMING THE SAME | May 2021 | August 2024 | Allow | 40 | 2 | 1 | No | No |
| 17314752 | Method of Forming Gate Structures for Nanostructures | May 2021 | July 2025 | Allow | 51 | 4 | 1 | No | No |
| 17313156 | STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH EMBEDDED EPITAXIAL STRUCTURE | May 2021 | April 2025 | Allow | 47 | 4 | 1 | Yes | No |
| 17245221 | BOTTOM ELECTRODE VIA AND CONDUCTIVE BARRIER DESIGN TO ELIMINATE ELECTRICAL SHORT IN MEMORY DEVICES | April 2021 | June 2025 | Allow | 50 | 4 | 1 | Yes | No |
| 17238311 | EPITAXIAL STRUCTURE HAVING DIFFUSION BARRIER LAYER | April 2021 | October 2024 | Allow | 42 | 3 | 1 | Yes | No |
| 17234730 | PHOTO SENSOR ELEMENT HAVING FIRST ELECTRODE AND SECOND ELECTRODE OVERLAPPING THE FIRST ELECTRODE | April 2021 | May 2024 | Abandon | 36 | 2 | 0 | Yes | No |
| 17230640 | MEMORY CELL WITH LOW RESISTANCE TOP ELECTRODE CONTACT AND METHODS FOR FORMING THE SAME | April 2021 | October 2024 | Allow | 42 | 3 | 0 | Yes | No |
| 17284825 | Method for Producing Optoelectronic Semiconductor Devices and Optoelectronic Semiconductor Device | April 2021 | December 2024 | Allow | 44 | 4 | 0 | No | No |
| 17229045 | SEMICONDUCTOR DEVICE INCLUDING AN INTERNAL SPACER | April 2021 | February 2026 | Allow | 58 | 4 | 0 | Yes | Yes |
| 17224658 | SUBSTRATE PROCESSING CONTROL USING A MEASURED SIZE DISTRIBUTION OF BY-PRODUCT PARTICLES | April 2021 | August 2024 | Allow | 40 | 2 | 1 | No | No |
| 17216903 | SEMICONDUCTOR DEVICES INCLUDING EPITAXIAL PATTERNS WITH PLURALITY OF FIN-SHAPED PATTERNS | March 2021 | September 2024 | Allow | 42 | 4 | 0 | Yes | No |
| 17212740 | SEMICONDUCTOR DEVICE INCLUDING CHANNEL LAYERS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE | March 2021 | December 2025 | Allow | 57 | 6 | 1 | Yes | No |
| 17211129 | SEMICONDUCTOR MEMORY DEVICE INCLUDING VERTICAL INSULATING PATTERN INCLUDING A DIFFUSED METAL AND METHOD OF FABRICATING THE SAME | March 2021 | September 2024 | Allow | 42 | 4 | 1 | Yes | No |
| 17196401 | DISPLAY PANEL AND DISPLAY DEVICE INCLUDING ENCAPSULATION LAYER | March 2021 | April 2025 | Allow | 49 | 5 | 0 | Yes | No |
| 17191393 | OPTICAL BLOCKING STRUCTURES FOR BLACK LEVEL CORRECTION PIXELS IN AN IMAGE SENSOR | March 2021 | January 2024 | Allow | 35 | 2 | 1 | Yes | No |
| 17189347 | SEMICONDUCTOR MEMORY DEVICE INCLUDING AN INSULATING PORTION HAVING A VARYING WIDTH | March 2021 | February 2025 | Allow | 48 | 4 | 1 | Yes | No |
| 17185275 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | February 2021 | February 2024 | Allow | 36 | 3 | 0 | Yes | No |
| 17183650 | DISPLAY PANEL, FABRICATION METHOD, AND ELECTRONIC DEVICE | February 2021 | December 2024 | Abandon | 46 | 2 | 0 | No | No |
| 17183077 | IMAGE SENSING DEVICE INCLUDING BOOSTING CONDUCTIVE MATERIAL | February 2021 | December 2025 | Abandon | 58 | 6 | 0 | Yes | No |
| 17179892 | DISPLAY PANEL HAVING LIGHT CONTROL LAYERS AND METHOD FOR MANUFACTURING THE SAME | February 2021 | September 2024 | Allow | 43 | 3 | 1 | Yes | No |
| 17269118 | ORGANIC LIGHT-EMITTING DISPLAY SUBSTRATE HAVING PARTITION GROOVES AND MANUFACTURING METHOD THEREOF, AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE | February 2021 | May 2024 | Allow | 39 | 2 | 0 | No | No |
| 17166357 | METHOD OF FORMING A STEPPED SURFACE IN A THREE-DIMENSIONAL MEMORY DEVICE AND STRUCTURES INCORPORATING THE SAME | February 2021 | April 2024 | Allow | 38 | 4 | 1 | No | No |
| 17256941 | Layered Material Laminate Structure on a Semiconductor Layer and Method for Producing Same | December 2020 | December 2024 | Abandon | 48 | 3 | 0 | No | No |
This analysis examines appeal outcomes and the strategic value of filing appeals for examiner XU, ZHIJUN.
With a 50.0% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.
Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.
In this dataset, 50.0% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
✓ Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.
✓ Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.
Examiner XU, ZHIJUN works in Art Unit 2818 and has examined 37 patent applications in our dataset. With an allowance rate of 78.4%, this examiner has a below-average tendency to allow applications. Applications typically reach final disposition in approximately 44 months.
Examiner XU, ZHIJUN's allowance rate of 78.4% places them in the 46% percentile among all USPTO examiners. This examiner has a below-average tendency to allow applications.
On average, applications examined by XU, ZHIJUN receive 3.27 office actions before reaching final disposition. This places the examiner in the 91% percentile for office actions issued. This examiner issues more office actions than most examiners, which may indicate thorough examination or difficulty in reaching agreement with applicants.
The median time to disposition (half-life) for applications examined by XU, ZHIJUN is 44 months. This places the examiner in the 15% percentile for prosecution speed. Applications take longer to reach final disposition with this examiner compared to most others.
Conducting an examiner interview provides a -2.7% benefit to allowance rate for applications examined by XU, ZHIJUN. This interview benefit is in the 8% percentile among all examiners. Note: Interviews show limited statistical benefit with this examiner compared to others, though they may still be valuable for clarifying issues.
When applicants file an RCE with this examiner, 23.8% of applications are subsequently allowed. This success rate is in the 33% percentile among all examiners. Strategic Insight: RCEs show below-average effectiveness with this examiner. Carefully evaluate whether an RCE or continuation is the better strategy.
This examiner enters after-final amendments leading to allowance in 19.4% of cases where such amendments are filed. This entry rate is in the 23% percentile among all examiners. Strategic Recommendation: This examiner rarely enters after-final amendments compared to other examiners. You should generally plan to file an RCE or appeal rather than relying on after-final amendment entry. Per MPEP § 714.12, primary examiners have discretion in entering after-final amendments, and this examiner exercises that discretion conservatively.
This examiner withdraws rejections or reopens prosecution in 50.0% of appeals filed. This is in the 18% percentile among all examiners. Strategic Insight: This examiner rarely withdraws rejections during the appeal process compared to other examiners. If you file an appeal, be prepared to fully prosecute it to a PTAB decision. Per MPEP § 1207, the examiner will prepare an Examiner's Answer maintaining the rejections.
When applicants file petitions regarding this examiner's actions, 0.0% are granted (fully or in part). This grant rate is in the 4% percentile among all examiners. Strategic Note: Petitions are rarely granted regarding this examiner's actions compared to other examiners. Ensure you have a strong procedural basis before filing a petition, as the Technology Center Director typically upholds this examiner's decisions.
Examiner's Amendments: This examiner makes examiner's amendments in 0.0% of allowed cases (in the 24% percentile). This examiner rarely makes examiner's amendments compared to other examiners. You should expect to make all necessary claim amendments yourself through formal amendment practice.
Quayle Actions: This examiner issues Ex Parte Quayle actions in 0.0% of allowed cases (in the 31% percentile). This examiner issues Quayle actions less often than average. Allowances may come directly without a separate action for formal matters.
Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:
Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.
No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.
Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.
Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.