USPTO Examiner NGUYEN DUY T V - Art Unit 2818

Recent Applications

Detailed information about the 100 most recent patent applications.

Application NumberTitleFiling DateDisposal DateDispositionTime (months)Office ActionsRestrictionsInterviewAppeal
187987083D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERSAugust 2024November 2025Allow1610NoNo
18643628HIGH-VOLTAGE ELECTROSTATIC DISCHARGE DEVICEApril 2024May 2025Allow1321YesNo
18444455STACKED STAGGERED ELECTRODE FOIL CAPACITOR STRUCTURES IN SEMICONDUCTOR DEVICES FOR SINGLE AND MULTI-VOLTAGE DOMAIN APPLICATIONS AND METHOD OF FABRICATIONFebruary 2024October 2024Allow811YesNo
18542983METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERSDecember 2023May 2024Allow510NoNo
18569588VERTICALLY STACKED MEMORY DEVICE AND MANUFACTURING METHOD THEREOFDecember 2023February 2026Allow2600NoNo
185272693D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERSDecember 2023August 2024Allow920NoNo
18389577METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERSNovember 2023July 2024Allow810NoNo
18503210SEMICONDUCTOR DEVICE INCLUDING A GATE TRENCH IN AN INTER-PAD REGIONNovember 2023December 2025Allow2610NoNo
18473098INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURESeptember 2023December 2025Allow2620NoNo
18465439METHOD OF MANUFACTURING METAL NITRIDE FILM USING OPERATIONS WITH A METAL ORGANIC LIGAND, A FIRST PURGING, A HALOGEN COMPOUND, A SECOND PURGING, AND A NITRIDANT, AND A METHOD OF MANUFACTURING AN ELECTRONIC DEVICE INCLUDING METAL NITRIDE FILMSeptember 2023September 2025Allow2420YesNo
18464789MICROELECTRONIC WORKPIECE PROCESSING SYSTEMS AND ASSOCIATED METHODS OF COLOR CORRECTIONSeptember 2023April 2025Abandon1910NoNo
18459942SENSOR EMBEDDED DISPLAY PANEL AND ELECTRONIC DEVICESeptember 2023March 2026Allow3001NoNo
17762098DISPLAY PANEL HAVING LIGHT-TRANSMITTING HOLE AND UNDER-SCREEN CAMERA DISPLAY DEVICEAugust 2023March 2026Allow4810NoNo
18455980METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A NODE CAPPING PATTERN AND A GATE CAPPING PATTERNAugust 2023May 2025Allow2110YesNo
18454471SRAM CELL LAYOUT INCLUDING ARRANGEMENT OF MULTIPLE ACTIVE REGIONS AND MULTIPLE GATE REGIONSAugust 2023November 2024Allow1511YesNo
18447053METHODS OF MANUFACTURE OF SEMICONDUCTOR DEVICESAugust 2023September 2025Allow2541NoNo
18446873MIDDLE END OF LINE DECOUPLING CAPACITORS FOR SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOFAugust 2023October 2024Allow1411YesNo
18230782DUMMY METAL BONDING PADS FOR UNDERFILL APPLICATION IN SEMICONDUCTOR DIE PACKAGING AND METHODS OF FORMING THE SAMEAugust 2023October 2024Allow1411YesNo
18361722INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTUREJuly 2023March 2025Allow2021NoNo
18359825METHOD OF FABRICATING A SEMICONDUCTOR CHIP HAVING STRENGTH ADJUSTMENT PATTERN IN BONDING LAYERJuly 2023October 2024Allow1410NoNo
18357220Method of Measuring Mask Overlay Using Test PatternsJuly 2023December 2024Allow1610NoNo
18224524METHOD OF MANUFACTURING A CERAMIC STRUCTURE WITH METAL TRACESJuly 2023October 2024Allow1520NoNo
18341793DEVICE STRUCTURE INCLUDING FIELD EFFECT TRANSISTORS AND FERROELECTRIC CAPACITORSJune 2023November 2024Allow1610NoNo
18213396Asymmetric Semiconductor Memory Device Having Electrically Floating Body TransistorJune 2023September 2024Allow1510NoNo
18331917SEMICONDUCTOR DEVICE WITH SOURCE/DRAIN CONTACT FORMED USING BOTTOM-UP DEPOSITIONJune 2023November 2024Allow1821NoNo
18204619Semiconductor capacitor array layout capable of generating parasitic capacitance toward edge of layoutJune 2023August 2024Allow1410NoNo
18255383METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE BY REMOVING CARRIER AFTER FORMING RE-DISTRIBUTION LAYERJune 2023February 2026Allow3310NoNo
18197550HIGHLY FLEXIBLE, ELECTRICAL DISTRIBUTION GRID EDGE ENERGY MANAGER AND ROUTERMay 2023October 2024Allow1710NoNo
18315066SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS FOR CONTROLLING INTRODUCTION INTO INSULATING FILMMay 2023February 2026Allow3411NoNo
18312332ULTRASONIC DEVICE, SEMICONDUCTOR DEVICE, AND METHOD OF CONTROLLING ULTRASONIC DEVICEMay 2023September 2025Allow2801NoNo
183111673D MEMORY CELL STRUCTURES WITH FLOATING BODIESMay 2023December 2025Allow3211YesNo
18308702DEEP TRENCH STRUCTURE FOR A CAPACITIVE DEVICEApril 2023May 2025Allow2431YesNo
18136988HIGH ABSORPTION PHOTOVOLTAIC MATERIAL HAVING A GRADIENT REFRACTIVE INDEX PROFILE AND METHODS OF MAKING THE SAMEApril 2023January 2026Allow3310NoNo
18303378CERAMIC CARRIER AND BUILD UP CARRIER FOR LIGHT-EMITTING DIODE (LED) ARRAYApril 2023August 2024Allow1610NoNo
18127751AN INTEGRATED CIRCUIT COMPRISING TRENCHES FORMED IN A SUBSTRATEMarch 2023September 2024Allow1820NoNo
18188592MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE HAVING HIGH-VOLTAGE ISOLATION CAPACITORMarch 2023March 2026Allow3510NoNo
18123972MANUFACTURING METHOD OF CAPACITOR STRUCTURE INCLUDING PATTERNED CONDUCTIVE LAYER DISPOSED BETWEEN TWO ELECTRODESMarch 2023August 2024Allow1720NoNo
18182921METHOD AND DEVICE RELATED TO SEAMLESS METAL CONTACTMarch 2023January 2026Allow3511NoNo
18182527SEMICONDUCTOR STRUCTURE BODY AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE BODY WITH ALIGNMENT BETWEEN STORIES OF THE SAMEMarch 2023February 2026Allow3511NoNo
18043669METAL OXIDE FILM AND SEMICONDUCTOR DEVICEMarch 2023January 2026Allow3411NoNo
18173313INTEGRATED CIRCUIT STRUCTURE IN POROUS SEMICONDUCTOR REGION AND METHOD TO FORM SAMEFebruary 2023November 2025Allow3221NoNo
18172077METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE WITH CAVITY TO FACILITATE SUBSTRATE CLEAVAGEFebruary 2023January 2025Abandon2320YesNo
18171205A VERTICAL SEMICONDUCTOR DIODE OR TRANSISTOR DEVICE HAVING AT LEAST ONE COMPOUND SEMICONDUCTOR AND A THREE-DIMENSIONAL ELECTRONIC SEMICONDUCTOR DEVICE COMPRISING AT LEAST ONE VERTICAL COMPOUND STRUCTUREFebruary 2023August 2024Allow1810NoNo
18110610SENSOR PACKAGE STRUCTURE HAVING SOLDER MASK FRAMEFebruary 2023March 2024Allow1310NoNo
18110666SENSOR PACKAGE STRUCTURE HAVING RING-SHAPED SOLDER MASK FRAMEFebruary 2023March 2024Allow1310NoNo
18110568METHOD OF FABRICATING AN ELECTRONIC DEVICE COMPRISING AN OPTICAL CHIPFebruary 2023April 2024Allow1410NoNo
18110637SENSOR PACKAGE STRUCTURE HAVING SOLDER MASK FRAMEFebruary 2023December 2024Allow2230NoNo
18168332SEMICONDUCTOR DEVICES HAVING DIFFERENT NUMBERS OF STACKED CHANNELS IN DIFFERENT REGIONSFebruary 2023April 2024Allow1410YesNo
18104650SEMICONDUCTOR PACKAGE INCLUDING A METAL PLATE AND PACKAGE-ON-PACKAGE HAVING THE SAMEFebruary 2023October 2025Allow3310YesNo
18161985SEMICONDUCTOR STRUCTURE WITH BUFFER LAYER BETWEEN CONDUCTIVE CONTACT AND WORD LINE AND METHOD FOR FORMING THE SAME, AND MEMORYJanuary 2023February 2026Allow3711NoNo
18161130SEMICONDUCTOR DEVICE INCLUDING ACTIVE PILLARS MADE OF THREE SEMICONDUCTOR LAYERS, METHOD FOR OPERATING SAME, AND SEMICONDUCTOR STRUCTUREJanuary 2023September 2025Allow3121NoNo
18161463OXIDE SEMICONDUCTOR DEVICE AND OXIDE SEMICONDUCTOR MEMORY DEVICEJanuary 2023March 2026Allow3711NoNo
18016738DISPLAY DEVICE WITH ORGANIC LAYER BETWEEN RESPECTIVE ELECTRODESJanuary 2023December 2025Allow3511YesNo
18094719SEMICONDUCTOR MEMORY DEVICE HAVING STACKED WORD LINES INCLUDING SUB-GATE ELECTRODESJanuary 2023January 2026Allow3611YesNo
18152054DISPLAY DEVICE HAVING A DISPLAY AREA INCLUDING A FIRST AREA, A SECOND AREA, AND A THIRD AREAJanuary 2023October 2025Allow3310NoNo
18150372STACKED CMOS IMAGE SENSOR WITH STI-FREE PHOTODETECTOR ISOLATION AND METHOD FOR FORMING THE SAMEJanuary 2023January 2026Allow3611NoNo
18150184METHOD FOR FORMING SEMICONDUCTOR STRUCTURE INCLUDING CAPACITORJanuary 2023February 2026Allow3821NoNo
18066733SEMICONDUCTOR DEVICE WITH INCREASED UNITY DENSITYDecember 2022January 2025Allow2531NoNo
18065770SEMICONDUCTOR STRUCTURE WITH A BIT LINE IN A DIFFERENT CONFIGURATION THAN A LOCAL INTERCONNECT LINEDecember 2022February 2024Allow1410NoNo
18064777METHOD OF FORMING SEMICONDUCTOR DEVICE WITH INCREASED UNIT DENSITYDecember 2022July 2024Allow2021NoNo
18054994SEMICONDUCTOR STRUCTURE WITH A HIGH DEPTH-WIDTH RATIO CAPACITOR AND MANUFACTURING METHOD THEREOFNovember 2022December 2025Allow3710NoNo
17923595METHOD FOR OPTIMIZING PROTECTION CIRCUITS OF ELECTRONIC DEVICE CHIPS IN A WAFERNovember 2022December 2025Abandon3701NoNo
17978882DISPLAY DEVICE HAVING MULTI-WIDTH CONNECTION ELECTRODENovember 2022December 2025Allow3711NoNo
17977487LIGHT EMITTING DISPLAY DEVICE HAVING BUMPY PATTERN ON RAMPOctober 2022February 2026Allow4020NoNo
18050600Systems, Articles, and Methods related to Multilayered Magnetic Memory DevicesOctober 2022November 2025Allow3710NoNo
17972211SEMICONDUCTOR DEVICE HAVING A THREE-DIMENSIONAL STRUCTURE AND METHOD FOR FABRICATING THE SAMEOctober 2022October 2025Allow3610NoNo
17970360SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICEOctober 2022March 2024Allow1610NoNo
17955067SEMICONDUCTOR DEVICE WITH CARBON-DENSITY-DECREASING REGIONSeptember 2022January 2024Allow1610NoNo
17954377DISPLAY PANEL AND DISPLAY DEVICE FOR IVL TESTINGSeptember 2022February 2024Allow1610NoNo
17934743SEMICONDUCTOR DEVICE INCLUDING ELECTRODES EACH HAVING A PAD PART AND ELECTRONIC SYSTEM INCLUDING THE SAMESeptember 2022November 2025Allow3811YesNo
17932817SEMICONDUCTOR MEMORY DEVICE INCLUDING MULTI-LAYER ELECTRODESeptember 2022October 2024Abandon2520YesNo
179456713D SEMICONDUCTOR DEVICES AND STRUCTURES WITH AT LEAST TWO SINGLE-CRYSTAL LAYERSSeptember 2022March 2024Abandon1820NoNo
17894645SEMICONDUCTOR DEVICE HAVING AN INSULATING SHEET AND A CONDUCTIVE FILM, AND METHOD OF MANUFACTURING THE SAMEAugust 2022May 2024Allow2121YesNo
17892326CHIPS BONDING AUXILIARY STRUCTUREAugust 2022February 2025Allow3040NoNo
17889161ELECTRONIC SENSOR DEVICES AND METHODS OF MANUFACTURING ELECTRONIC SENSOR DEVICESAugust 2022August 2024Allow2430NoNo
17886161A SEMICONDUCTOR STRUCTURE HAVING A SEMICONDUCTOR SUBSTRATE AND AN ISOLATION COMPONENTAugust 2022June 2024Allow2231NoNo
17886200A SEMICONDUCTOR STRUCTURE HAVING A SEMICONDUCTOR SUBSTRATE AND AN ISOLATION COMPONENTAugust 2022January 2025Allow3041NoNo
17884790MEMORY DEVICE HAVING A FIRST LAYER DISPOSED BETWEEN A MEMORY ELEMENT AND A SWITCHING ELEMENT THEREOFAugust 2022November 2025Allow3921NoNo
17876067MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE WITH HIGH-DIELECTRIC-CONSTANT GATE INSULATORJuly 2022December 2025Abandon4021NoNo
17870296Method of Manufacturing Semiconductor Devices with System on Chip DevicesJuly 2022July 2025Allow3650NoNo
17758720ELECTRON-GAS THERMOELECTRIC SENSORJuly 2022November 2025Abandon4010NoNo
17860325Vertical Transistors Having At Least 50% Grain Boundaries Offset Between Top And Bottom Source/Drain Regions And The Channel Region That Is Vertically TherebetweenJuly 2022August 2024Allow2621NoNo
17834837DEVICE WITH DUMMY METALLIC TRACESJune 2022January 2024Allow2021NoNo
17782979DISPLAY SUBSTRATE HAVING PLANARIZATION LAYER COVERING SPACING REGION BETWEEN SIGNAL LINES, MANUFACTURING METHOD THEREOF AND DISPLAY APPARATUSJune 2022September 2025Allow3911NoNo
17833885SEMICONDUCTOR DEVICE INCLUDING III-V COMPOUND SEMICONDUCTOR LAYER AND MANUFACTURING METHOD THEREOFJune 2022June 2025Allow3611NoNo
17782261SYSTEMS AND METHODS FOR FABRICATING FLUX TRAP MITIGATING SUPERCONDUCTING INTEGRATED CIRCUITSJune 2022April 2025Allow3411NoNo
17830470DISPLAY DEVICE WITH STACKED WIRING AND DISPLAY DEVICE WITH TRANSLUCENT REGIONJune 2022March 2025Allow3411NoNo
17831143A SEMICONDUCTOR DEVICE INCLUDING A LEAD AND A SEALING RESINJune 2022February 2025Allow3210NoNo
17831108SEMICONDUCTOR DEVICE AND INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTUREJune 2022March 2024Allow2121NoNo
17829781SEMICONDUCTOR DEVICES INCLUDING BUFFER LAYER STRUCTUREJune 2022February 2026Allow4521YesNo
17804676SEMICONDUCTOR DEVICE WITH MULTILAYER SOURCE AND DRAIN REGIONS FORMED IN OPENINGS OF ELECTRON SUPPLY AND TRANSIT LAYERSMay 2022February 2026Allow4521NoNo
17744253IMAGE SENSING DEVICE WITH MULTIPLE TRANSMISSION GATES FOR GLOBAL SHUTTER OPERATIONMay 2022March 2025Allow3411NoNo
17742372SEMICONDUCTOR MEMORY DEVICE HAVING BURIED WORD LINE WITH A NECK PROFILE PORTIONMay 2022March 2025Allow3411NoNo
17771824OLED DISPLAY PANEL HAVING MULTIPLE LIGHT-EMITTING LAYERS AND A PIXEL DEFINITION LAYER PROVIDED WITH OPENINGS, AND PREPARATION METHOD THEREFOR, AND DISPLAY APPARATUSApril 2022March 2025Allow3511NoNo
17728785METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE THEREOFApril 2022November 2024Allow3011NoNo
17771351LITHIUM NIOBATE SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOFApril 2022March 2025Allow3511NoNo
17722682SEMICONDUCTOR POWER MODULE PACKAGE HAVING LEAD FRAME ANCHORED BARSApril 2022August 2025Allow4021YesNo
17717875ELECTRONIC DEVICE WITH DIE PADS AND LEADSApril 2022February 2024Allow2320YesNo
17657937LAYOUT STRUCTURE OF ANTI-FUSE ARRAYApril 2022January 2025Abandon3311NoNo
17711381DISPLAY PANEL AND DISPLAY APPARATUS FOR UNIFORM DISPLAY OF A FIRST DISPLAY AREA AND A SECOND DISPLAY AREAApril 2022March 2025Allow3511NoNo

Appeals Overview

This analysis examines appeal outcomes and the strategic value of filing appeals for examiner NGUYEN, DUY T V.

Patent Trial and Appeal Board (PTAB) Decisions

Total PTAB Decisions
2
Examiner Affirmed
1
(50.0%)
Examiner Reversed
1
(50.0%)
Reversal Percentile
74.5%
Higher than average

What This Means

With a 50.0% reversal rate, the PTAB reverses the examiner's rejections in a meaningful percentage of cases. This reversal rate is above the USPTO average, indicating that appeals have better success here than typical.

Strategic Value of Filing an Appeal

Total Appeal Filings
22
Allowed After Appeal Filing
13
(59.1%)
Not Allowed After Appeal Filing
9
(40.9%)
Filing Benefit Percentile
88.3%
Higher than average

Understanding Appeal Filing Strategy

Filing a Notice of Appeal can sometimes lead to allowance even before the appeal is fully briefed or decided by the PTAB. This occurs when the examiner or their supervisor reconsiders the rejection during the mandatory appeal conference (MPEP § 1207.01) after the appeal is filed.

In this dataset, 59.1% of applications that filed an appeal were subsequently allowed. This appeal filing benefit rate is in the top 25% across the USPTO, indicating that filing appeals is particularly effective here. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Strategic Recommendations

Appeals to PTAB show good success rates. If you have a strong case on the merits, consider fully prosecuting the appeal to a Board decision.

Filing a Notice of Appeal is strategically valuable. The act of filing often prompts favorable reconsideration during the mandatory appeal conference.

Examiner NGUYEN, DUY T V - Prosecution Strategy Guide

Executive Summary

Examiner NGUYEN, DUY T V works in Art Unit 2818 and has examined 174 patent applications in our dataset. With an allowance rate of 97.7%, this examiner allows applications at a higher rate than most examiners at the USPTO. Applications typically reach final disposition in approximately 31 months.

Allowance Patterns

Examiner NGUYEN, DUY T V's allowance rate of 97.7% places them in the 89% percentile among all USPTO examiners. This examiner is more likely to allow applications than most examiners at the USPTO.

Office Action Patterns

On average, applications examined by NGUYEN, DUY T V receive 2.32 office actions before reaching final disposition. This places the examiner in the 66% percentile for office actions issued. This examiner issues a slightly above-average number of office actions.

Prosecution Timeline

The median time to disposition (half-life) for applications examined by NGUYEN, DUY T V is 31 months. This places the examiner in the 56% percentile for prosecution speed. Prosecution timelines are slightly faster than average with this examiner.

Interview Effectiveness

Conducting an examiner interview provides a +3.5% benefit to allowance rate for applications examined by NGUYEN, DUY T V. This interview benefit is in the 26% percentile among all examiners. Recommendation: Interviews provide a below-average benefit with this examiner.

Request for Continued Examination (RCE) Effectiveness

When applicants file an RCE with this examiner, 28.9% of applications are subsequently allowed. This success rate is in the 54% percentile among all examiners. Strategic Insight: RCEs show above-average effectiveness with this examiner. Consider whether your amendments or new arguments are strong enough to warrant an RCE versus filing a continuation.

After-Final Amendment Practice

This examiner enters after-final amendments leading to allowance in 27.6% of cases where such amendments are filed. This entry rate is in the 39% percentile among all examiners. Strategic Recommendation: This examiner shows below-average receptiveness to after-final amendments. You may need to file an RCE or appeal rather than relying on after-final amendment entry.

Pre-Appeal Conference Effectiveness

When applicants request a pre-appeal conference (PAC) with this examiner, 133.3% result in withdrawal of the rejection or reopening of prosecution. This success rate is in the 86% percentile among all examiners. Strategic Recommendation: Pre-appeal conferences are highly effective with this examiner compared to others. Before filing a full appeal brief, strongly consider requesting a PAC. The PAC provides an opportunity for the examiner and supervisory personnel to reconsider the rejection before the case proceeds to the PTAB.

Appeal Withdrawal and Reconsideration

This examiner withdraws rejections or reopens prosecution in 90.9% of appeals filed. This is in the 83% percentile among all examiners. Of these withdrawals, 45.0% occur early in the appeal process (after Notice of Appeal but before Appeal Brief). Strategic Insight: This examiner frequently reconsiders rejections during the appeal process compared to other examiners. Per MPEP § 1207.01, all appeals must go through a mandatory appeal conference. Filing a Notice of Appeal may prompt favorable reconsideration even before you file an Appeal Brief.

Petition Practice

When applicants file petitions regarding this examiner's actions, 42.1% are granted (fully or in part). This grant rate is in the 34% percentile among all examiners. Strategic Note: Petitions show below-average success regarding this examiner's actions. Ensure you have a strong procedural basis before filing.

Examiner Cooperation and Flexibility

Examiner's Amendments: This examiner makes examiner's amendments in 9.2% of allowed cases (in the 92% percentile). Per MPEP § 1302.04, examiner's amendments are used to place applications in condition for allowance when only minor changes are needed. This examiner frequently uses this tool compared to other examiners, indicating a cooperative approach to getting applications allowed. Strategic Insight: If you are close to allowance but minor claim amendments are needed, this examiner may be willing to make an examiner's amendment rather than requiring another round of prosecution.

Quayle Actions: This examiner issues Ex Parte Quayle actions in 1.2% of allowed cases (in the 62% percentile). This examiner issues Quayle actions more often than average when claims are allowable but formal matters remain (MPEP § 714.14).

Prosecution Strategy Recommendations

Based on the statistical analysis of this examiner's prosecution patterns, here are tailored strategic recommendations:

  • Request pre-appeal conferences: PACs are highly effective with this examiner. Before filing a full appeal brief, request a PAC to potentially resolve issues without full PTAB review.
  • Appeal filing as negotiation tool: This examiner frequently reconsiders rejections during the appeal process. Filing a Notice of Appeal may prompt favorable reconsideration during the mandatory appeal conference.
  • Examiner cooperation: This examiner frequently makes examiner's amendments to place applications in condition for allowance. If you are close to allowance, the examiner may help finalize the claims.

Relevant MPEP Sections for Prosecution Strategy

  • MPEP § 713.10: Examiner interviews - available before Notice of Allowance or transfer to PTAB
  • MPEP § 714.12: After-final amendments - may be entered "under justifiable circumstances"
  • MPEP § 1002.02(c): Petitionable matters to Technology Center Director
  • MPEP § 1004: Actions requiring primary examiner signature (allowances, final rejections, examiner's answers)
  • MPEP § 1207.01: Appeal conferences - mandatory for all appeals
  • MPEP § 1214.07: Reopening prosecution after appeal

Important Disclaimer

Not Legal Advice: The information provided in this report is for informational purposes only and does not constitute legal advice. You should consult with a qualified patent attorney or agent for advice specific to your situation.

No Guarantees: We do not provide any guarantees as to the accuracy, completeness, or timeliness of the statistics presented above. Patent prosecution statistics are derived from publicly available USPTO data and are subject to data quality limitations, processing errors, and changes in USPTO practices over time.

Limitation of Liability: Under no circumstances will IronCrow AI be liable for any outcome, decision, or action resulting from your reliance on the statistics, analysis, or recommendations presented in this report. Past prosecution patterns do not guarantee future results.

Use at Your Own Risk: While we strive to provide accurate and useful prosecution statistics, you should independently verify any information that is material to your prosecution strategy and use your professional judgment in all patent prosecution matters.